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https://github.com/izzy2lost/xemu.git
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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211102' into staging
- Split out host signal handing from accel/tcg/user-exec.c to linux-user/host/arch/host-signal.h - Replace TCGCPUOps.tlb_fill with TCGCPUOps.record_sigsegv for user-only - Add TCGCPUOps.record_sigbus for user-only - Remove a lot of target-specific cpu_loop handling for signals, now accomplished with generic code. # gpg: Signature made Tue 02 Nov 2021 07:06:14 AM EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * remotes/rth/tags/pull-tcg-20211102: (60 commits) linux-user: Handle BUS_ADRALN in host_signal_handler tcg: Add helper_unaligned_{ld,st} for user-only sigbus accel/tcg: Report unaligned load/store for user-only accel/tcg: Report unaligned atomics for user-only target/sparc: Set fault address in sparc_cpu_do_unaligned_access target/sparc: Split out build_sfsr target/sparc: Remove DEBUG_UNALIGNED target/sh4: Set fault address in superh_cpu_do_unaligned_access target/s390x: Implement s390x_cpu_record_sigbus linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu target/ppc: Set fault address in ppc_cpu_do_unaligned_access target/ppc: Move SPR_DSISR setting to powerpc_excp target/microblaze: Do not set MO_ALIGN for user-only linux-user/hppa: Remove EXCP_UNALIGN handling target/arm: Implement arm_cpu_record_sigbus target/alpha: Implement alpha_cpu_record_sigbus linux-user: Add cpu_loop_exit_sigbus hw/core: Add TCGCPUOps.record_sigbus accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
+47
-8
@@ -664,16 +664,55 @@ static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env,
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}
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/**
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* cpu_signal_handler
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* @signum: host signal number
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* @pinfo: host siginfo_t
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* @puc: host ucontext_t
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* adjust_signal_pc:
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* @pc: raw pc from the host signal ucontext_t.
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* @is_write: host memory operation was write, or read-modify-write.
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*
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* To be called from the SIGBUS and SIGSEGV signal handler to inform the
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* virtual cpu of exceptions. Returns true if the signal was handled by
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* the virtual CPU.
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* Alter @pc as required for unwinding. Return the type of the
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* guest memory access -- host reads may be for guest execution.
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*/
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int cpu_signal_handler(int signum, void *pinfo, void *puc);
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MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write);
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/**
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* handle_sigsegv_accerr_write:
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* @cpu: the cpu context
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* @old_set: the sigset_t from the signal ucontext_t
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* @host_pc: the host pc, adjusted for the signal
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* @host_addr: the host address of the fault
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*
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* Return true if the write fault has been handled, and should be re-tried.
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*/
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bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
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uintptr_t host_pc, abi_ptr guest_addr);
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/**
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* cpu_loop_exit_sigsegv:
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* @cpu: the cpu context
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* @addr: the guest address of the fault
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* @access_type: access was read/write/execute
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* @maperr: true for invalid page, false for permission fault
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* @ra: host pc for unwinding
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*
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* Use the TCGCPUOps hook to record cpu state, do guest operating system
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* specific things to raise SIGSEGV, and jump to the main cpu loop.
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*/
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void QEMU_NORETURN cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
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MMUAccessType access_type,
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bool maperr, uintptr_t ra);
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/**
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* cpu_loop_exit_sigbus:
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* @cpu: the cpu context
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* @addr: the guest address of the alignment fault
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* @access_type: access was read/write/execute
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* @ra: host pc for unwinding
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*
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* Use the TCGCPUOps hook to record cpu state, do guest operating system
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* specific things to raise SIGBUS, and jump to the main cpu loop.
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*/
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void QEMU_NORETURN cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
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MMUAccessType access_type,
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uintptr_t ra);
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#else
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static inline void mmap_lock(void) {}
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@@ -35,18 +35,6 @@ struct TCGCPUOps {
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void (*cpu_exec_enter)(CPUState *cpu);
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/** @cpu_exec_exit: Callback for cpu_exec cleanup */
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void (*cpu_exec_exit)(CPUState *cpu);
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/**
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* @tlb_fill: Handle a softmmu tlb miss or user-only address fault
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*
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* For system mode, if the access is valid, call tlb_set_page
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* and return true; if the access is invalid, and probe is
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* true, return false; otherwise raise an exception and do
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* not return. For user-only mode, always raise an exception
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* and do not return.
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*/
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bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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/** @debug_excp_handler: Callback for handling debug exceptions */
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void (*debug_excp_handler)(CPUState *cpu);
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@@ -68,6 +56,16 @@ struct TCGCPUOps {
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#ifdef CONFIG_SOFTMMU
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/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
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bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
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/**
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* @tlb_fill: Handle a softmmu tlb miss
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*
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* If the access is valid, call tlb_set_page and return true;
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* if the access is invalid and probe is true, return false;
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* otherwise raise an exception and do not return.
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*/
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bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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/**
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* @do_transaction_failed: Callback for handling failed memory transactions
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* (ie bus faults or external aborts; not MMU faults)
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@@ -111,6 +109,55 @@ struct TCGCPUOps {
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*/
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bool (*io_recompile_replay_branch)(CPUState *cpu,
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const TranslationBlock *tb);
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#else
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/**
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* record_sigsegv:
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* @cpu: cpu context
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* @addr: faulting guest address
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* @access_type: access was read/write/execute
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* @maperr: true for invalid page, false for permission fault
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* @ra: host pc for unwinding
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*
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* We are about to raise SIGSEGV with si_code set for @maperr,
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* and si_addr set for @addr. Record anything further needed
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* for the signal ucontext_t.
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*
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* If the emulated kernel does not provide anything to the signal
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* handler with anything besides the user context registers, and
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* the siginfo_t, then this hook need do nothing and may be omitted.
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* Otherwise, record the data and return; the caller will raise
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* the signal, unwind the cpu state, and return to the main loop.
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*
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* If it is simpler to re-use the sysemu tlb_fill code, @ra is provided
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* so that a "normal" cpu exception can be raised. In this case,
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* the signal must be raised by the architecture cpu_loop.
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*/
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void (*record_sigsegv)(CPUState *cpu, vaddr addr,
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MMUAccessType access_type,
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bool maperr, uintptr_t ra);
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/**
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* record_sigbus:
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* @cpu: cpu context
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* @addr: misaligned guest address
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* @access_type: access was read/write/execute
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* @ra: host pc for unwinding
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*
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* We are about to raise SIGBUS with si_code BUS_ADRALN,
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* and si_addr set for @addr. Record anything further needed
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* for the signal ucontext_t.
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*
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* If the emulated kernel does not provide the signal handler with
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* anything besides the user context registers, and the siginfo_t,
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* then this hook need do nothing and may be omitted.
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* Otherwise, record the data and return; the caller will raise
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* the signal, unwind the cpu state, and return to the main loop.
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*
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* If it is simpler to re-use the sysemu do_unaligned_access code,
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* @ra is provided so that a "normal" cpu exception can be raised.
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* In this case, the signal must be raised by the architecture cpu_loop.
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*/
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void (*record_sigbus)(CPUState *cpu, vaddr addr,
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MMUAccessType access_type, uintptr_t ra);
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#endif /* CONFIG_SOFTMMU */
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#endif /* NEED_CPU_H */
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@@ -70,5 +70,10 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
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void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
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MemOpIdx oi, uintptr_t retaddr);
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#else
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void QEMU_NORETURN helper_unaligned_ld(CPUArchState *env, target_ulong addr);
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void QEMU_NORETURN helper_unaligned_st(CPUArchState *env, target_ulong addr);
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#endif /* CONFIG_SOFTMMU */
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#endif /* TCG_LDST_H */
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