Unknown W. Brackets
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2347498667
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x86jit: Use templates to avoid some void * casts.
Makes it a bit cleaner and potentially safer.
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2014-01-18 09:57:13 -08:00 |
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Unknown W. Brackets
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455a7e090d
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Compile the cache instruction to nothing.
Was showing up in a few profiles, does nothing currently.
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2013-11-10 14:38:10 -08:00 |
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Henrik Rydgard
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5ad04a23f4
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x86 jit: Rename BindToRegister to MapReg
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2013-11-09 15:23:31 +01:00 |
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Unknown W. Brackets
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97aa1a631e
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Improve typesafety in the x86 regalloc.
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2013-08-24 19:41:10 -07:00 |
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Unknown W. Brackets
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109ad17ac6
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Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
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2013-08-24 15:36:24 -07:00 |
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Unknown W. Brackets
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286c153c6a
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Fix memchecks for halfwords and bytes.
Before it was doing the range on a 4 byte read, which would trip a
memcheck that wasn't actually being hit if the byte of halfword was
unaligned.
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2013-07-06 13:15:48 -07:00 |
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Unknown W. Brackets
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2d15eb2acd
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Re-enable lwl/lwr/swl/swr on the x86 jit.
Now correctly handling ECX on x64.
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2013-07-06 01:21:52 -07:00 |
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Unknown W. Brackets
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1c9086617a
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DISABLE the swr/swl and friends for now.
Broke Disgaea on x64 only, not sure why right now.
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2013-07-05 02:53:15 -07:00 |
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Unknown W. Brackets
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e27ab6fa11
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Add swl/swr to the x86 jit.
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2013-07-04 17:34:56 -07:00 |
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Unknown W. Brackets
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203daf955b
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Implement lwl/lwr in the x86 jit.
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2013-07-04 17:30:36 -07:00 |
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Unknown W. Brackets
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2d6a730cac
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Add some basics for memory checks to x86 jit.
Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
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2013-03-09 02:41:46 -08:00 |
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Unknown W. Brackets
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f6f2927526
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Add curlies around DISABLE/CONDITIONAL_DISABLE.
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2013-02-15 08:35:33 -08:00 |
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Unknown W. Brackets
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f777c872e6
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Jit unaligned reads/writes.
This mostly just improves perf on debug, not really on the map for release.
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2013-02-02 13:12:34 -08:00 |
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Unknown W. Brackets
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b77ce99d01
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Oops, no slow read for immediates usually.
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2013-01-26 09:27:52 -08:00 |
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Unknown W. Brackets
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9cd5836b85
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Rename WriteFinish() to Finish() is safe mem.
It's nothing to do with writing.
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2013-01-26 09:09:47 -08:00 |
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Unknown W. Brackets
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3e419f513a
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Refactor jit safe memory reads without dup code.
But, maybe too automagical...
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2013-01-26 08:42:34 -08:00 |
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Unknown W. Brackets
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b7ef3e7bef
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Make sure to log / check bad immediate mem access.
Although, theoretically, this should never happen.
Also, definitely time to refactor.
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2013-01-25 23:06:43 -08:00 |
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Unknown W. Brackets
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3418383917
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Immediately break on bad mem access in jit slowmem.
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2013-01-25 22:52:51 -08:00 |
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Unknown W. Brackets
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f5963df0dc
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Optimize write to a single x64 op too.
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2013-01-20 13:06:19 -08:00 |
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Unknown W. Brackets
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e8dc99328a
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Avoid using EAX as a temporary where possible.
All the regs should be indirect addressing compatible. So if it's
in a reg, let's use that instead of EAX.
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2013-01-20 12:57:14 -08:00 |
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Unknown W. Brackets
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eaa24ee047
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Use EDX as a temporary for sb, and jit it.
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2013-01-20 12:25:08 -08:00 |
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Unknown W. Brackets
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30f6a4ba87
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Fix stupid stupid typo breaking slowmem jit.
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2013-01-20 09:39:13 -08:00 |
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Unknown W. Brackets
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53600161ba
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Don't write anything to a bad static pointer.
Not sure what came over me...
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2013-01-20 00:19:18 -08:00 |
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Unknown W. Brackets
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e78223d2c0
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Since flipping the op is easy, also do lb/lh.
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2013-01-19 16:25:57 -08:00 |
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Unknown W. Brackets
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5e8f1917ee
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Fix 64-bit memory dereferencing.
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2013-01-19 16:25:57 -08:00 |
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