41 Commits

Author	SHA1	Message	Date
Unknown W. Brackets	2347498667	x86jit: Use templates to avoid some void * casts. ... Makes it a bit cleaner and potentially safer.	2014-01-18 09:57:13 -08:00
Unknown W. Brackets	dffa35ef2f	When ins is used with a zero argument, don't OR. ... Seems it's used effectively to mask out bits with rs=zero. Makes sense...	2013-11-29 09:17:12 -08:00
Unknown W. Brackets	fd38b10ab6	x86jit: Rename imm funcs to match armjit.	2013-11-10 21:59:49 -08:00
Unknown W. Brackets	3a8f0598c4	x86jit: Implement wsbh/wsbw.	2013-11-10 14:38:09 -08:00
Henrik Rydgard	5ad04a23f4	x86 jit: Rename BindToRegister to MapReg	2013-11-09 15:23:31 +01:00
Unknown W. Brackets	02dd250354	armjit: Optimize out a few immediate logic cases.	2013-11-08 11:39:24 -08:00
Unknown W. Brackets	97aa1a631e	Improve typesafety in the x86 regalloc.	2013-08-24 19:41:10 -07:00
Unknown W. Brackets	109ad17ac6	Use a typesafe struct for opcodes. ... Also, correctly read delayslots using Read_Instruction on ARM.	2013-08-24 15:36:24 -07:00
Unknown W. Brackets	3278b5e373	Handle the immediate case of clz/clo.	2013-07-04 23:07:42 -07:00
Unknown W. Brackets	654490566f	Implement clz/clo in x86 jit.	2013-07-04 18:01:17 -07:00
Sacha	a26b48fc0b	Stub wsbh/wsbw for x86.	2013-06-05 14:55:01 +10:00
Unknown W. Brackets	028e85dc92	Cleanup some differences between the two jits.	2013-03-07 02:08:44 -08:00
Unknown W. Brackets	313ffdb495	Add a stub for clz/clo in x86 jit.	2013-02-21 01:25:02 -08:00
Unknown W. Brackets	08923c092b	Implement ins and ext in the x86 jit.	2013-02-21 01:25:01 -08:00
Unknown W. Brackets	dede852c03	Optimize out slti in the x86 jit. ... I'm kinda surprised this actually happens...	2013-02-21 01:25:01 -08:00
Unknown W. Brackets	abde404c00	Optimize out some addu/etc. calls against imms.	2013-02-21 01:25:01 -08:00
Unknown W. Brackets	9e479b4391	Optimize addi/addiu to just LEA when possible.	2013-02-21 01:25:00 -08:00
Unknown W. Brackets	2db368c29a	Add more imm handling for shifts in x86 jit. ... This is actually hit, and propagates more imms through.	2013-02-21 01:25:00 -08:00
Unknown W. Brackets	958d95a029	Make bitrev use less instructions in the x86 jit. ... Much less.	2013-02-20 13:43:17 -08:00
Unknown W. Brackets	7b612cf28d	Don't need this with the imm code path.	2013-02-20 12:16:57 -08:00
Unknown W. Brackets	c8f85ace41	Implement bitrev in x86 jit + some imms.	2013-02-20 12:09:02 -08:00
Unknown W. Brackets	c3be50acbb	Implement movz/movn in the x86 jit.	2013-02-20 12:09:01 -08:00
Unknown W. Brackets	0d6d58fed4	Add min and max to the x86 jit portfolio.	2013-02-20 12:09:01 -08:00
Unknown W. Brackets	f6f2927526	Add curlies around DISABLE/CONDITIONAL_DISABLE.	2013-02-15 08:35:33 -08:00
Unknown W. Brackets	7c428bfeba	Fix immediate div CMP.	2013-02-10 10:02:55 -08:00