Henrik Rydgård
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79ff2f0ba8
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Start untangling our include mess a little.
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2013-12-29 23:34:45 +01:00 |
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Unknown W. Brackets
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dd2e996838
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Fix some type comparison warnings.
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2013-12-01 11:21:16 -08:00 |
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Henrik Rydgard
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50a589ea72
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Extend sanity check for vfpu reordering array.
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2013-11-28 13:27:52 +01:00 |
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Henrik Rydgard
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f9f6e9492d
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Reorder vfpu data in saved kernel contexts when loading in a new version.
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2013-11-28 13:27:51 +01:00 |
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Henrik Rydgard
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55500d4bb6
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Reorder VFPU registers in memory so that we can flush and reload them in bulk more often.
Doesn't actually do that yet, that's for the NEON branch.
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2013-11-28 13:27:51 +01:00 |
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Unknown W. Brackets
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f165a15eff
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Fix a -unsigned warning.
Looks ugly, but (u32)-(s32)val is what we really want here.
Also make a __FUNCTION__ redeclaration warning go away.
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2013-11-15 08:18:34 -08:00 |
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Unknown W. Brackets
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5128083d93
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Mask out fcr31 bits that can't be set on a PSP.
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2013-11-14 23:57:28 -08:00 |
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Unknown W. Brackets
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26f5922174
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Return the correct value for fcr0/fir.
This is what the PSP actually returns, it's read only.
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2013-11-14 23:39:08 -08:00 |
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Unknown W. Brackets
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50e9e45d65
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Check version in each DoState() func.
They bail on PointerWrap error or bad version.
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2013-09-14 20:23:03 -07:00 |
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Ced2911
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c94d9b62d0
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Update ppc jit
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2013-09-12 10:18:59 +02:00 |
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Unknown W. Brackets
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da0c9a86e5
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Invalidate stubs/var imports when writing them.
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2013-09-01 00:32:43 -07:00 |
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Unknown W. Brackets
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97aa1a631e
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Improve typesafety in the x86 regalloc.
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2013-08-24 19:41:10 -07:00 |
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Unknown W. Brackets
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3f49101868
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Clean up the COP1 MIPS tables, and reporting.
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2013-08-11 19:35:39 -07:00 |
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Henrik Rydgard
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d8294f025f
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More VFPU stuff (nothing new activated)
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2013-07-30 01:09:11 +02:00 |
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Henrik Rydgard
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afcb5add51
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Minor code cleanup/reindent around ARM jit
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2013-07-27 22:14:01 +02:00 |
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Henrik Rydgard
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5877929fe5
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Add Mersenne Twister random number generator.
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2013-05-20 00:57:45 +02:00 |
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Henrik Rydgard
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9eace8a80e
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Combine the two JitCache implementations (x86, ARM) into one.
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2013-04-27 01:32:03 +02:00 |
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Unknown W. Brackets
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c4ab0855b4
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Make sure interpreter and jit savestates match.
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2013-03-08 08:49:21 -08:00 |
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Unknown W. Brackets
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afb7c0b83c
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Assume prefixes start default until proven wrong.
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
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2013-02-18 01:14:57 -08:00 |
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Henrik Rydgard
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37f998407b
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Replace "Core" with "Jit" in ini. Don't show Open dialog by default (use Ctrl+A or Ctrl+O to open it).
Delete "Slightly Faster Interpreter".
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2013-02-16 09:49:33 +01:00 |
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Henrik Rydgard
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909b768f47
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Don't need separate variables for writemask. Some optimizations.
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2013-02-16 09:28:55 +01:00 |
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Unknown W. Brackets
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2a6457b6ab
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Cut down on h files including PointerWrap.
This makes changes to it a bit faster to build.
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2013-02-04 08:26:59 -08:00 |
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Henrik Rydgard
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74a46f60ed
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Initialize downcount.
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2013-01-14 23:03:37 +01:00 |
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Henrik Rydgard
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674911ddba
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Move downcount into MIPSState for efficiency, enable block linking.
On ARM JIT we can now reach it through the cpu context reg.
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2013-01-12 00:44:18 +01:00 |
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Henrik Rydgard
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a2ff416534
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Rename files. Rewrite ArmRegCache from scratch.
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2013-01-07 22:33:09 +01:00 |
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