Florent Castelli
8c3552de74
cmake: Detect features at compile time
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Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
2016-10-19 12:31:19 +02:00
Unknown W. Brackets
db3dffb44d
arm64: Oops, fix flushing zero from an armreg.
2015-07-05 11:57:18 -07:00
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003668fe66
armjit: Fix discarding imms.
2015-07-04 07:30:32 -07:00
Unknown W. Brackets
e6a7ba3fae
arm64: Bring imms along for the STP ride.
2015-07-03 16:51:33 -07:00
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2331df8c70
arm64: Try to be more consistent in ZERO handling.
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Let's keep it IMM where possible, even though we've added checks for
MIPS_REG_ZERO.
2015-07-03 10:21:24 -07:00
Unknown W. Brackets
66adc4e695
jit: Normalize CONDITIONAL_DISABLE formatting.
2015-07-02 20:31:37 -07:00
Henrik Rydgård
d014d420db
Unify JitOptions across the backends.
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This is required to make ExtractIR not a member of the various backends.
2015-04-12 11:41:26 -07:00
Henrik Rydgard
05a8e2e35d
Some work towards being able to build two JITs together
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This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
Unknown W. Brackets
afc779a824
jit: Add IN_RT to lwl/lwr and re-enable clobbering.
2014-12-08 21:17:01 -08:00
Unknown W. Brackets
bfe5f9276e
jit: Re-disable clobbered thing.
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No idea what's wrong...
2014-12-08 02:06:25 -08:00
Unknown W. Brackets
7734a4c912
jit: Re-enable clobbering with movz/movn support.
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Oops, these should be the only ones that take rd "in".
2014-12-08 01:29:41 -08:00
Unknown W. Brackets
119c1ef83e
jit: Disable clobber detection for now.
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Should still spill better. Something is wrong with flags detection, a
clobber to rd is incorrectly discarding outside a delay slot. Don't have
time now to look into it further.
2014-12-08 01:24:17 -08:00
Unknown W. Brackets
f817d49dfb
jit: Discard clobbered registers on spill.
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If we're spilling anyway, discard rather than saving.
2014-12-07 23:08:21 -08:00
Unknown W. Brackets
eeff110c0f
jit: Improve and unify GPR spill logic.
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Now the same logic on x86 and ARM, and handles HI/LO/etc. better.
2014-12-07 21:10:28 -08:00
Unknown W. Brackets
9dd6bb56bb
jit: Make available js_ and jo_ in regcaches.
2014-12-07 21:07:23 -08:00
Henrik Rydgard
d98bde8e50
Merge the RegCache changes from the old neon-vfpu branch
2014-12-06 12:26:58 +01:00
Unknown W. Brackets
f6f943de63
jit: MAP_NOINIT should always mean MAP_DIRTY.
2014-11-29 00:14:08 -08:00
Sacha
6ce3765b12
Sailfish: More compatibility with SailFish OS. It also needs stddef where Maemo does.
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Set packaging by default for iOS with b.sh.
2014-07-24 23:20:09 +10:00
Unknown W. Brackets
5a89c17cf0
armjit: Allow R1 in regalloc, use LR as temp.
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LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
2014-03-28 18:38:38 -07:00
Henrik Rydgard
c80510fb3b
MemMap should not be included in MIPS.h.
2014-03-15 10:45:39 +01:00
Unknown W. Brackets
98fb2e0402
armjit: Refer to R11 as MEMBASEREG for clarity.
2013-11-14 23:37:48 -08:00
Henrik Rydgård
ef8631c57f
Cache VFPU_CTRL_CC in a register
2013-11-12 17:58:29 +01:00
Unknown W. Brackets
f4b5e8a4c1
Merge pull request #4518 from hrydgard/fpcond
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ARMJIT: Cache fpcond in a register to avoid store/load between compare and branch
2013-11-12 01:50:16 -08:00
Henrik Rydgård
17074f5a7f
Cache fpcond in a register to avoid store/load between compare and branch
2013-11-12 10:33:38 +01:00
Unknown W. Brackets
32504ed46e
armjit: Prioritize spilling regs not used soon.
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This may improve trashing.
2013-11-12 00:03:39 -08:00
