6 Commits

Author	SHA1	Message	Date
Unknown W. Brackets	82f0502b4e	riscv: Implement CPU feature detection.	2022-12-21 03:12:16 +00:00
Pierce Andjelkovic	9ac4931636	Fix get CPU & CPU Brand	2021-07-31 03:03:13 +10:00
Pierce Andjelkovic	bd8759853b	Fix ABI	2021-07-31 01:50:48 +10:00
Pierce Andjelkovic	0d0e2c44e0	Fix copied mips bugs	2021-07-29 07:47:09 +10:00
Pierce Andjelkovic	d452b0c1f7	No CPU part for RISC-V	2021-07-29 03:26:18 +10:00
Pierce Andjelkovic	d9a3741fcb	RISC-V CPU detect	2021-07-28 21:58:56 +10:00