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7,017 Commits 54 Branches 120 Tags
2e6f1e0a41e144a4c77c53d0442cb1ce7bbc94de
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48 Commits

Author SHA1 Message Date
Unknown W. Brackets
3f49101868 Clean up the COP1 MIPS tables, and reporting. 2013-08-11 19:35:39 -07:00
Unknown W. Brackets
7e92b17dd4 Cleanup some COP2/VFPU2 table flags. 2013-08-11 19:13:41 -07:00
Unknown W. Brackets
d08f2bc3fb Fix some formatting in the MIPS table. 
And also a couple cases of manually specifying RS.
 2013-08-11 17:12:54 -07:00
The Dax
0ce45848b5 These funcs are already defined in math_util.h, so why are they redefined in this file? In any case, it seems to break 2010/2012 compilation to have those in there.. 2013-07-29 19:31:31 -04:00
Unknown W. Brackets
abe3d95877 Revert "Remove hack for BREAK in Sol Trigger" 
This reverts commit 3d2c3c7227.

This wasn't a hack dedicated to Sol Trigger.  It helps other games, and
keeping it is just like allowing games to continue on bad memory address
reads.
 2013-06-26 07:56:36 -07:00
raven02
3d2c3c7227 Remove hack for BREAK in Sol Trigger 2013-06-26 19:27:36 +08:00
Henrik Rydgard
e809e39681 Mips interpreter: Use unions instead of ugly casts. Strict-aliasing builds now work, but needs more testing so I don't enable it yet. Also some aliasing fixes for TransformPipeline. 2013-06-11 21:44:37 +02:00
Henrik Rydgard
c5c3189436 Fix some framebuffer-related crash bugs. Ignore cache instruction 'FILL'. 2013-04-27 20:06:31 +02:00
Henrik Rydgard
06679fcce6 Switch to homemade isinf/isnan implementations. 2013-04-13 21:51:38 +02:00
raven02
39c3cf8744 Ignore MIPS break error 2013-04-09 16:13:24 +08:00
niepodam
94c2f0cd9d Fix build with gcc 4.8.0 2013-04-04 19:16:15 +02:00
Henrik Rydgard
5293c152c6 Untested support for Android-x86. No idea if this actually works. 2013-03-21 20:52:33 +01:00
Henrik Rydgard
062c975b46 Ignore cache function 24. 2013-03-04 23:51:19 +01:00
Unknown W. Brackets
ac1209204c Add some reporting for CPU related stuff. 2013-03-04 00:01:41 -08:00
Henrik Rydgard
516ca8a0c4 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmJit.h
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/Framebuffer.cpp
 2013-02-28 23:56:28 +01:00
Unknown W. Brackets
2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
Unknown W. Brackets
08923c092b Implement ins and ext in the x86 jit. 2013-02-21 01:25:01 -08:00
Unknown W. Brackets
2bdc9dc491 Reset llBit on thread switch. 
Never actually seen ll used, though... but this way it should
work as advertized, as long as a syscall doesn't happen in between...
 2013-02-20 12:09:13 -08:00
Unknown W. Brackets
3a365fef64 Protect against some writes to $0. 2013-02-20 12:09:12 -08:00
Henrik Rydgard
44e4ba8772 Merge branch 'master' into armjit-fpu 2013-02-15 21:42:44 +01:00
Unknown W. Brackets
abe390e6f3 Add some checks for fpu/vfpu writing to $0. 2013-02-14 00:27:09 -08:00
Henrik Rydgard
b0c160fa93 Fix armjit fpu load / store 2013-02-13 21:07:06 +01:00
Unknown W. Brackets
19cc652a37 Correct NaN handling in fpu comparisons. 2013-02-13 01:54:07 -08:00
Unknown W. Brackets
3cab6986c5 Jit the FPU comparisons on x86. 
Probably not too fast.  Also, NaN handling seems wrong?
 2013-02-13 00:55:10 -08:00
Unknown W. Brackets
44b5adeaac Properly jit the break instruction. 
Otherwise, it just keeps on going past it.
We never want to hit this anyway, but it's good to know if we do.
 2013-02-01 00:49:14 -08:00