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0474ff5c238bd79110faedf85a304fc4128bc8a4
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88 Commits

Author SHA1 Message Date
Unknown W. Brackets
9ff812b313 arm64jit: Negate in ADDI2R/SUBI2R as well. 
Should've done this at the same time as CMN.  It's not as common, mostly
catches addu calls, but it's good to have these generic for other uses.
 2017-12-30 11:11:04 -08:00
Unknown W. Brackets
c00044c5d8 arm64jit: Avoid arithmetic movs. 
ORR is the preferred encoding and may be faster on some chips.
 2017-12-29 17:30:18 -08:00
Unknown W. Brackets
b59c0d0b45 arm64jit: Use CMN for CMPI2R if possible. 
It's not hit all that often, but it is hit.
 2017-12-29 17:30:13 -08:00
Unknown W. Brackets
1ecce2a2e1 arm64jit: Reuse code in I2R funcs. 2017-12-29 17:30:07 -08:00
Unknown W. Brackets
b21af3321a arm64jit: Allow ANDI2R/etc. with zero. 
Since they're all possible anyway, and it's easy to forget to special case
0.
 2017-12-28 14:36:37 -08:00
Unknown W. Brackets
6fd17fb026 arm64jit: Use reg sum for LDR/STR. 
Skips an add, and should be less ops anyway.
 2017-12-28 10:19:55 -08:00
Unknown W. Brackets
4a27e99ee9 arm64jit: Remove buggy icache invalidate. 
This is always of size 0, and crashes on iOS anyway...
 2017-12-27 19:30:10 -08:00
Henrik Rydgård
e07861991b Apply a fix to the ARM64 emitter ported over from Dolphin 2017-12-10 02:05:25 +01:00
Henrik Rydgård
4129459495 Avoid an assert in ARM64 emitter, seen in Google Play crash logs 2017-11-29 21:31:42 +01:00
Henrik Rydgård
0ec1e5e3b2 Don't erase and rewrite the dispatcher when the cache is cleared. Fixes #9708 2017-05-26 15:48:03 +02:00
Henrik Rydgård
29ad3180a0 Add hack to make the JIT stable(r) on UWP ARM. Can't make it right without FlushInstructionCache which is not available. Sigh... 2017-03-23 10:02:29 +01:00
Henrik Rydgård
c4bac2d379 ABI: Switch to paired load/stores of floats too 2017-01-27 14:56:38 +01:00
Henrik Rydgård
e1bae9aa67 Follow the ARM64 ABI better (update the frame pointer). 2017-01-27 14:19:03 +01:00
Henrik Rydgard
a1ec735f6c ARM64Emitter: Implement instructions to move data to/from SP 2017-01-26 14:23:42 +01:00
Henrik Rydgård
56acafdb52 Fix page size for page-aligning generated code 2017-01-25 20:39:16 +01:00
Henrik Rydgard
6e7e62f3d5 Fix compiler check in Arm64Emitter.cpp. Should help #9104 2016-10-31 22:34:15 +01:00
Florent Castelli
83aaf30207 cmake: Use preprocessor for conditional compilation in Common 
CommonExtra is gone!
Still need to fix CommonFake later though.
 2016-10-11 16:55:29 +02:00
Henrik Rydgard
2adec71f87 Be completely safe on Exynos even if future OS:es start running the big and LITTLE cores simultaneously (don't know if they already do) 2016-09-12 22:19:52 +02:00
Henrik Rydgard
edae55d827 Revert "ARM64 icache flush: Don't bother with the minimum cache line size, just use the current." 
(In case big and LITTLE cores are used at the same time on some chips,
this might still help, at least in theory)

This reverts commit 0b8a3e8c26.
 2016-09-12 22:09:05 +02:00
Henrik Rydgard
0b8a3e8c26 ARM64 icache flush: Don't bother with the minimum cache line size, just use the current. 2016-09-10 17:21:11 +02:00
Henrik Rydgard
03279e1212 Port over the Exynos cacheline size fix from Dolphin. Thanks to lewurm of the mono project for the discovery and original fix. 
See https://github.com/dolphin-emu/dolphin/pull/4204 and https://github.com/mono/mono/pull/3549
 2016-09-10 09:25:06 +02:00
Unknown W. Brackets
4113fd940c Add ugly invalidation workaround for SGS7s. 
Otherwise they just crash, and crash often.  Special thanks to Jaaan for
numerous trials to try to find the best way to solve the crashes.
 2016-05-23 21:35:28 -07:00
Henrik Rydgard
ffe4c266ef Add CodeBlockCommon base class to remove further arch-specificity in JitBlockCache 
Remove unused ArmThunk.
 2016-05-01 11:40:00 +02:00
Henrik Rydgård
0c1e7dcc18 Use the OS to clear the CPU cache instead of the gcc builtin. Experiment for the S7 issues. 2016-04-09 16:16:45 +02:00
latot
afeb012d04 Add missing include files to unittest 2015-10-24 13:24:05 -03:00