92 Commits

Author SHA1 Message Date
Unknown W. Brackets
4178f09e57 Build: More consistently avoid _M_ defines.
We use PPSSPP_ARCH in several places already, this makes it more complete.
2021-03-02 21:49:21 -08:00
Unknown W. Brackets
cae0815095 jit: Avoid using mips identifier directly.
Apparently this gets defined on mips systems.
2021-02-26 07:24:58 -08:00
Henrik Rydgård
608d082e49 FPURegCache: The invariant checking is very slow in debug mode. Let's only turn it on when we need it. 2020-09-17 20:52:32 +02:00
Henrik Rydgård
0829543987 Third part of getting rid of PanicAlert 2020-07-19 20:34:02 +02:00
Henrik Rydgård
c5e0b799d9 Remove category from _assert_msg_ functions. We don't filter these by category anyway.
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
2020-07-19 20:33:25 +02:00
Henrik Rydgård
8d86463b1a More RIP fixes 2017-07-07 15:46:14 +02:00
Henrik Rydgård
837118d230 More RIP elimination 2017-07-07 15:07:56 +02:00
Henrik Rydgård
e5a7d0df95 Buildfix for platforms with standards-compliant offsetof (no dynamic indexing allowed)k 2017-07-07 12:59:23 +02:00
Henrik Rydgård
ecbeee5225 RegCacheFPU 2017-07-07 11:33:07 +02:00
Henrik Rydgård
567937fa4d x64: Enable non-RIP addressing for FPU registers 2017-07-07 11:33:07 +02:00
Henrik Rydgård
0645677fea Access FPU temps through CTXREG 2017-07-07 11:33:06 +02:00
Henrik Rydgård
7c1ae5b3e6 Move tempValues into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
78538ff61e Some code cleanup. More work towards removing RIP addressing 2017-07-07 11:33:04 +02:00
Henrik Rydgard
b0bd7e3c6f Minor changes for compatibility with VS2017 2017-03-12 17:33:00 +01:00
Florent Castelli
8c3552de74 cmake: Detect features at compile time
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
2016-10-19 12:31:19 +02:00
Unknown W. Brackets
f4a06cd79a Remove an impossible assert condition. 2016-05-31 11:56:23 -07:00
Henrik Rydgård
c1b91ff5c1 x86: Add a way to eliminate some mov instructions.
Not currently used yet.
2015-04-12 13:50:23 -07:00
Chin
37f50a3792 Change to pass some arguments by reference 2015-03-01 16:49:00 +01:00
Unknown W. Brackets
0dc3e4e2db x86jit: Handle unable to spill better.
Might as well check the result to be safe.
2015-01-17 18:42:58 -08:00
Henrik Rydgård
bb1d571493 Merge pull request #7261 from hilesaz/master
Fix simd vmmul transpose optimizations.
2015-01-06 11:59:14 +01:00
Henrik Rydgard
90376267b1 More reg number asserts 2015-01-04 23:15:33 +01:00
Henrik Rydgard
fe63a15e22 x86jit fpu regcache: Add extra invariant check for too-large mips register numbers 2015-01-04 22:54:01 +01:00
Bovine
0fdebdc1ca Fix discardVS.
It's not valid for non-away values to have a lane.
2015-01-03 16:54:31 -07:00
Henrik Rydgard
3cc633f091 x86jit: Minor logging improvements in FPU recache 2015-01-03 22:55:39 +01:00
Unknown W. Brackets
5f6f8ac0a2 x86jit: Fix another sequential detect problem.
Arg.  Maybe should use voffset after all, but it won't fit in a u8
anyway...
2014-12-31 22:43:31 -08:00