Henrik Rydgård
83af54950f
Move more core-related stuff into Core.cpp/h
2024-12-08 11:54:58 +01:00
Henrik Rydgård
c25e6b3933
Add "Split syscall" mechanism
2024-12-05 00:05:39 +01:00
Henrik Rydgård
96c4a10e8c
Add two new core states, rename RUNNING to RUNNING_CPU and similar for stepping.
2024-12-01 21:04:21 +01:00
Henrik Rydgård
2e85eb5128
More static code analysis fixes
2024-10-28 17:59:06 +01:00
oltolm
62194185d4
fix shutdown crash on Windows
2024-08-24 13:41:33 +02:00
Henrik Rydgård
5926886c0c
Some include cleanup, delete some obsolete code
2024-07-25 14:52:41 +02:00
Henrik Rydgård
e01ca5b057
Logging API change (refactor) ( #19324 )
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* Rename LogType to Log
* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.
* Mac/ARM64 buildfix
* Do the same with the hle result log macros
* Rename the log names to mixed case while at it.
* iOS buildfix
* Qt buildfix attempt, ARM32 buildfix
2024-07-14 14:42:59 +02:00
Henrik Rydgård
9ef5250387
IRJit: If we're in "JIT using IR" mode, don't accidentally optimize for the interpreter.
2024-06-11 10:24:08 +02:00
Henrik Rydgård
e852771480
Integrate the voffset shuffle in ReadVector
2023-10-05 18:52:50 +02:00
Unknown W. Brackets
2e64abd2a0
x86jit: Improve some debug labels.
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Helps when running a profiler that reads these.
2023-08-27 12:51:29 -07:00
Unknown W. Brackets
622c69dbb9
x86jit: Expose option to select new IR based jit.
2023-08-20 22:28:54 -07:00
fp64
a97c911d46
Address feedback
2023-05-25 17:28:38 -04:00
fp64
23ef21ba9b
Fix a bug, and bump savestate version
2023-05-25 16:18:58 -04:00
fp64
71884d5843
Make vrnd match HW closer
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See investigation starting
https://github.com/hrydgard/ppsspp/issues/16946#issuecomment-1467261209
for more details.
Still needs more testing.
2023-05-25 14:18:19 -04:00
Henrik Rydgård
0719f1d4ea
Merge branch 'cheat-icache' (PR #16234 )
2022-10-16 09:55:30 +02:00
Unknown W. Brackets
0226d95000
jit: Run invalidates immediately.
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Previously, I thought we might clear native code when invalidating - we
don't. We only do that when clearing.
2022-10-15 18:52:46 -07:00
Unknown W. Brackets
c4bf2cb5c0
jit: Ignore zero byte icache invalidates.
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These were getting marked pending and were clearing all cache, causing
performance concerns in for example LittleBigPlanet.
2022-10-15 18:27:52 -07:00
Henrik Rydgård
a34e32abe1
Revert "Disables "ForceCheck" on jit invalidation on ARM32, introduced in #16194 "
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This reverts commit bc28f54612
2022-10-11 15:42:59 +02:00
Henrik Rydgård
bc28f54612
Disables "ForceCheck" on jit invalidation on ARM32, introduced in #16194
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I'm not sure if we should call it at all here, but at least this makes
games work again on ARM32. Will need more investigation.
2022-10-11 10:10:52 +02:00
Unknown W. Brackets
825450a373
jit: Defer invalidations made while running.
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Previously, invalidating icache could happen while running, which might
cause the CPU to return into outer space. This runs such invalidations
after letting the CPU exit.
It was easy to trigger this with the debugger: step using the GE debugger,
add a CPU memory breakpoint, then resume from the GE debugger.
However, cheats and the like could cause similar issues.
2022-10-09 21:26:13 -07:00
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2479d52202
Global: Reduce includes of common headers.
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In many places, string, map, or Common.h were included but not needed.
2022-01-30 16:35:33 -08:00
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48b597a1b9
Display: Move core counters/stats to HW file.
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This separates things better, so not everything is pulling in HLE.
2022-01-30 11:53:48 -08:00
Unknown W. Brackets
b8ab7f39df
jit: Lock around changes to the jit pointer.
2021-11-28 10:04:22 -08:00
Unknown W. Brackets
0c6c2fb47a
jit: More atomically update pointer.
2021-11-27 06:00:18 -08:00
Unknown W. Brackets
e0afdfe9be
Core: Leave delay slot when re-entering jit.
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If stepping, we may get into a delay slot within interpreted code, and
then try to run (i.e. Step Out), which won't clear the delay slot
properly.
This can cause weird behavior when interp is used again later, in addition
to immediate wrong branching behavior.
2021-05-09 08:52:38 -07:00
