Henrik Rydgård
85e7ff7ac3
Target->Native renaming. More intuitive (at least to me)
2024-07-22 01:24:34 +02:00
Henrik Rydgård
e01ca5b057
Logging API change (refactor) ( #19324 )
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* Rename LogType to Log
* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.
* Mac/ARM64 buildfix
* Do the same with the hle result log macros
* Rename the log names to mixed case while at it.
* iOS buildfix
* Qt buildfix attempt, ARM32 buildfix
2024-07-14 14:42:59 +02:00
Henrik Rydgård
6ebec02f05
Fix crash in JITIR after disassembly improvement.
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Fixes #19292
2024-06-22 15:16:27 +02:00
Henrik Rydgård
5526ef012c
Store IR instructions in a large arena vector instead of loosely in each block.
2024-06-07 09:28:27 +02:00
Unknown W. Brackets
4e0761b104
irjit: Fix regcache disable for FPRs.
2023-09-30 15:54:54 -07:00
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685d2acffe
x86jit: Retain old lanes when there's space.
2023-09-24 17:31:25 -07:00
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88b6442527
irjit: Add facility for native reg transfer.
2023-09-24 16:28:29 -07:00
Unknown W. Brackets
24da5a3ba2
irjit: Small simplification to regcache.
2023-09-23 22:00:49 -07:00
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9439a43323
riscv: Correct an overlap case, fix assert.
2023-09-03 13:29:57 -07:00
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9bac755491
x86jit: Avoid pointerify if clobbered.
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For x86, it's not worth it for one.
2023-09-01 22:34:22 -07:00
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d5a51da95e
x86jit: Fix pointer modify when masked.
2023-08-30 22:04:26 -07:00
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742dc0a0c7
x86jit: Fix vec4 clobber issue.
2023-08-30 22:04:25 -07:00
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1bfa054a41
irjit: Correct GetFPRLaneCount().
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Oops, this was just wrong...
2023-08-28 21:09:56 -07:00
Henrik Rydgård
0ecfb6b112
Merge pull request #17992 from unknownbrackets/x86-jit-float
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x86jit: Implement trig instructions, couple other FPU
2023-08-28 10:20:38 +02:00
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f10444eb42
x86jit: Special case broadcast shuffles.
2023-08-27 23:24:30 -07:00
Unknown W. Brackets
61a99b4bac
x86jit: Implement trig/reciprocals.
2023-08-27 23:24:30 -07:00
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7d8dc0f8ab
irjit: Detect clobber in lane change.
2023-08-27 12:27:05 -07:00
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d1a30334bf
x86jit: Implement multiplies.
2023-08-25 00:01:03 -07:00
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363f2b68e1
x86jit: Implement shifts.
2023-08-25 00:01:03 -07:00
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efaf14a19f
x86jit: Fix spilling zero register.
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We can't flush it, but it's likely not to get "clobbered".
2023-08-22 23:29:13 -07:00
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c397e2e4da
x86jit: Flush reg if dirty on map as ptr.
2023-08-22 23:29:13 -07:00
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edcb156897
x86jit: Add Vec4 and Float load/store.
2023-08-22 10:39:46 +02:00
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07fa1ed573
x86jit: Automatically flush incompatible regs.
2023-08-21 21:16:54 -07:00
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db34b85107
irjit: Allow flag-based allocation order.
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Sometimes backends have needs, like XMM0/v0-only, or similar.
2023-08-21 20:46:05 -07:00
Unknown W. Brackets
5045cf012e
x86jit: Fix flushing of zero register.
2023-08-20 22:28:54 -07:00
