Henrik Rydgård
96c4a10e8c
Add two new core states, rename RUNNING to RUNNING_CPU and similar for stepping.
2024-12-01 21:04:21 +01:00
Henrik Rydgård
b6a3996e65
Remove a warning, change some & params to pointers for clarity, func rename
2024-09-11 11:48:12 +02:00
Henrik Rydgård
85e7ff7ac3
Target->Native renaming. More intuitive (at least to me)
2024-07-22 01:24:34 +02:00
Henrik Rydgård
78c75e1a0b
Delete duplicate function (now that we can easily check for compileToNative)
2024-07-21 19:17:21 +02:00
Henrik Rydgård
9d36a08ec4
Some renaming, remove a gross hack
2024-07-21 19:12:51 +02:00
Henrik Rydgård
8a535ed5d4
Bugfix in DoIRInst, thanks Nemoumbra
2024-07-21 18:56:22 +02:00
Henrik Rydgård
e01ca5b057
Logging API change (refactor) ( #19324 )
...
* Rename LogType to Log
* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.
* Mac/ARM64 buildfix
* Do the same with the hle result log macros
* Rename the log names to mixed case while at it.
* iOS buildfix
* Qt buildfix attempt, ARM32 buildfix
2024-07-14 14:42:59 +02:00
Henrik Rydgård
9ef5250387
IRJit: If we're in "JIT using IR" mode, don't accidentally optimize for the interpreter.
2024-06-11 10:24:08 +02:00
Henrik Rydgård
5526ef012c
Store IR instructions in a large arena vector instead of loosely in each block.
2024-06-07 09:28:27 +02:00
Henrik Rydgård
0ea9120ca5
Add a stats view
2024-06-06 19:21:50 +02:00
Henrik Rydgård
294593f741
Fix IR profiling
2024-06-05 19:12:08 +02:00
Henrik Rydgård
3bb74ea9ad
Rework the JitCompare window to hold a list of blocks, and allow some filtering and browsing
2024-06-05 18:16:33 +02:00
Henrik Rydgård
f2837e3b55
JIT compare screen with IR blocks - fix some crashing issues
2024-05-26 14:10:50 +02:00
Henrik Rydgård
fae846e52a
Remove the count parameter from IRInterpret. This is a good speed boost!
2024-05-10 23:31:24 +02:00
Herman Semenov
4ea842a3c1
Minor replaced insert to emplace C++11
2023-12-19 16:06:48 +03:00
Unknown W. Brackets
9b2fa46861
IR: Add mini native jit MIPS block profiler.
2023-09-24 23:04:29 -07:00
Henrik Rydgård
06a1f0b72c
Merge pull request #18226 from unknownbrackets/x86-ir-breakpoints
...
x86jit: Improve memory breakpoint speed
2023-09-25 00:47:22 +02:00
Unknown W. Brackets
e433a8be4a
arm64jit: Speed up memchecks, add validation.
2023-09-24 07:42:11 -07:00
Unknown W. Brackets
34ff24a4f3
irjit: Describe native offsets better.
...
Also check in case of non-linear blocks, can happen with preload.
2023-09-24 07:05:30 -07:00
Unknown W. Brackets
1b756ff8c1
arm64jit: Add initial base for IR jit.
...
This works, but very slowly at this point.
2023-09-03 12:14:28 -07:00
Unknown W. Brackets
2e64abd2a0
x86jit: Improve some debug labels.
...
Helps when running a profiler that reads these.
2023-08-27 12:51:29 -07:00
Unknown W. Brackets
3f8f8d36d9
riscv: Fix crash on clear icache.
...
Oops, can't avoid marking all blocks invalid. Luckily a syscall should
always take more bytes than the bail invalidated block code.
2023-08-13 18:25:46 -07:00
Henrik Rydgård
d6cdb6e5d9
Merge pull request #17900 from unknownbrackets/irjit-vsgelt
...
irjit: Implement vsge/vslt
2023-08-13 19:59:14 +02:00
Unknown W. Brackets
2b36e0a625
irjit: ZeroFpCond -> FpCondFromReg.
...
We already have a zero reg, so this is more useful and symmetrical.
2023-08-13 10:40:47 -07:00
Unknown W. Brackets
81f67c717c
riscv: Fix block link for prev blocks.
...
Oops, was just reversed so never linking.
2023-08-12 10:48:39 -07:00
