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2700 Commits

Author SHA1 Message Date
Unknown W. Brackets
efe92666fb Allow more cases in IsDelaySlotNiceVFPU(). 2013-09-05 23:24:31 -07:00
Unknown W. Brackets
96b4ef47e1 Add MIPS info flags for VFPU cc usage. 2013-09-05 23:19:17 -07:00
Unknown W. Brackets
9a048e9cf6 Don't assume GPRs can't be used with vfpu. 2013-09-05 23:12:14 -07:00
Unknown W. Brackets
a95264ad41 Small warning fixes in MIPSAsm. 2013-09-01 13:38:42 -07:00
Unknown W. Brackets
8d537f014f Fix some const char * conversion warnings. 2013-09-01 10:25:20 -07:00
Sacha
1189f10397 Buildfix (a few platforms) 2013-09-01 21:51:06 +10:00
Henrik Rydgård
c05a2b652e Merge pull request #3545 from unknownbrackets/warnings 
Warning fixes
 2013-09-01 01:34:59 -07:00
Kingcom
46c9142406 Correct move pseudo opcode 2013-09-01 10:23:12 +02:00
Kingcom
2a56694626 Display proper error messages when assembling failed 2013-09-01 10:21:05 +02:00
Unknown W. Brackets
538a4c064c Add a note so as not to forget. 2013-09-01 01:15:08 -07:00
Unknown W. Brackets
da0c9a86e5 Invalidate stubs/var imports when writing them. 2013-09-01 00:32:43 -07:00
Unknown W. Brackets
b558189c37 Just invalidate blocks on ClearCacheAt(). 
This makes it safe to call from a jitted syscall, etc.
 2013-09-01 00:32:43 -07:00
Unknown W. Brackets
14bcca1f53 Fix InvalidateICache() breaking binary searching. 2013-09-01 00:32:42 -07:00
Unknown W. Brackets
8ccd3773d9 Open files using wide functions on win32. 
Fixes #3432.
 2013-08-27 00:28:46 -07:00
Henrik Rydgard
55aa3d13c7 Win32: Switch to a UNICODE build. This took quite a bit of fixing. 2013-08-26 19:00:16 +02:00
The Dax
a35a407207 Add two new instructions to the MIPS interpreter for logging. vertex.pbp demo seems to use one of them. 2013-08-25 16:28:19 -04:00
adrian17
06a015983a Fixed some doubled semicolons 2013-08-25 19:43:18 +02:00
Unknown W. Brackets
97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets
3156b95d3f Make sure there's enough space while compiling. 2013-08-24 17:38:22 -07:00
Unknown W. Brackets
6c97b66806 Cap imm branch instructions, reset compiling. 
Break and other delay slot ops could've set it to false.

It's actually sometimes faster now.
 2013-08-24 17:26:24 -07:00
Unknown W. Brackets
52d6080fb4 Pass in some analysis results, don't use yet. 2013-08-24 15:36:24 -07:00
Unknown W. Brackets
109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
Unknown W. Brackets
4495559b75 Clean up register usage analysis a bit. 2013-08-24 15:36:23 -07:00
Unknown W. Brackets
b37f09cedf Make MIPSInfo a struct for typesafety. 
Found a bug in ReadsFromReg().
 2013-08-24 13:22:10 -07:00
Unknown W. Brackets
743b27c9cc Add conditional breakpoints to interpreter. 2013-08-24 09:51:45 -07:00