Unknown W. Brackets
2bd13c5d9d
Debugger: Track reason for entering stepping.
2021-10-23 16:56:15 -07:00
kotcrab
450d0ef015
Remove .s suffix from vwbn disassembly
2021-09-27 22:42:10 +02:00
kotcrab
7a124d84ae
Fix disassembly of vcst
2021-09-25 19:34:41 +02:00
kotcrab
4bdba8ae6f
Fix disassembly of vmfvc and vmtvc
2021-09-25 16:33:07 +02:00
Unknown W. Brackets
529329785b
interp: Prevent crash on bad lv.q or sv.q addr.
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See #5496 .
2021-09-02 07:18:49 -07:00
Unknown W. Brackets
52e9856b4b
Debugger: Fix breakpoints on delay slots.
2021-08-23 23:00:30 -07:00
Henrik Rydgård
a74e1a422d
GameScreen: Minor logic cleanup, remove Calculate CRC button when not needed.
2021-08-21 20:58:25 +02:00
Henrik Rydgård
025bcb1673
Introduce Path, start using it all over the place.
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Still lots left to convert!
Convert GetSysDirectory to return Path.
More buildfixing
Remove unnecessary Path( constructors
2021-05-13 10:39:16 +02:00
Unknown W. Brackets
e0afdfe9be
Core: Leave delay slot when re-entering jit.
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If stepping, we may get into a delay slot within interpreted code, and
then try to run (i.e. Step Out), which won't clear the delay slot
properly.
This can cause weird behavior when interp is used again later, in addition
to immediate wrong branching behavior.
2021-05-09 08:52:38 -07:00
Unknown W. Brackets
a84df2536a
Core: Fix vrot cos(2) typo.
2021-04-25 19:26:16 -07:00
Unknown W. Brackets
07cb37c2c1
Compat: Remove single/double sincos path.
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New implementation should work for both cases.
2021-04-25 07:09:50 -07:00
Unknown W. Brackets
ad876f06f3
Core: Special case 1/-1 for cosine.
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It still gets these off from zero, so let's just special case.
2021-04-24 16:29:20 -07:00
Unknown W. Brackets
8f41c78ed7
Core: Strip off lower bits of sin/cos results.
2021-04-24 16:29:20 -07:00
Unknown W. Brackets
ad9ad0f70b
Core: Apply custom narrowing before VFPU sin/cos.
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This makes the results much more accurate to the PSP's results.
Could narrow a bit further swapping sin/cos/neg, which might be what the
hardware does given vrot.
2021-04-24 16:29:20 -07:00
Unknown W. Brackets
e9076c90bb
Core: Cleanup VFPU float bit handling.
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Just to use a common union.
2021-04-24 15:49:22 -07:00
Unknown W. Brackets
86585e9551
unittest: Fix jit harness init.
2021-04-24 15:48:17 -07:00
Unknown W. Brackets
c4eafcf008
jit: Increase the cycle cost of div.s.
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This largely matches tests on a real PSP.
2021-04-12 07:06:18 -07:00
Unknown W. Brackets
53104639ff
jit: Increase the cycle cost of VFPU ops.
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It seems like they all take at least 2 cycles, which kinda makes sense.
2021-04-12 07:06:18 -07:00
Unknown W. Brackets
bc16a55028
jit: Count delay slot cycles separately.
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This makes it easier to count cycles per instruction, instead of ignoring
the delay slot's instruction for cycle count.
2021-04-12 07:04:22 -07:00
Henrik Rydgård
e86e3cc7cd
Merge pull request #14344 from unknownbrackets/debugger-mem
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Include more memory info in debugger tags
2021-04-04 11:20:33 +02:00
Unknown W. Brackets
f5de7c23fe
Debugger: Note writes from debugger.
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To avoid confusion.
2021-04-03 18:14:59 -07:00
Unknown W. Brackets
1d413c2470
Core: Limit scan for functions to end of valid RAM.
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Otherwise we can scan ahead and cause a memory exception.
2021-03-28 19:43:26 -07:00
Unknown W. Brackets
4178f09e57
Build: More consistently avoid _M_ defines.
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We use PPSSPP_ARCH in several places already, this makes it more complete.
2021-03-02 21:49:21 -08:00
Unknown W. Brackets
d9aecffd72
Build: Remove old ARM define.
2021-03-02 21:26:03 -08:00
Unknown W. Brackets
5119d79082
Build: Remove IOS define.
2021-03-02 21:04:03 -08:00
