Henrik Rydgård
daa0586641
Merge pull request #18059 from unknownbrackets/arm64-ir-jit
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arm64jit: Add initial base for IR jit
2023-09-03 22:33:24 +02:00
Unknown W. Brackets
259734bd47
irjit: Fix likely delay slot breakpoints.
2023-09-03 12:27:10 -07:00
Unknown W. Brackets
e1a1f56f4c
irjit: Cleanup breakpoint ops.
2023-09-03 12:27:10 -07:00
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1b756ff8c1
arm64jit: Add initial base for IR jit.
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This works, but very slowly at this point.
2023-09-03 12:14:28 -07:00
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5f84887dea
irjit: Add a pass to keep Vec4s in Vec4s.
2023-09-01 22:35:59 -07:00
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75e20af886
x86jit: Fix default prefix on core switch.
2023-08-28 21:09:56 -07:00
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74e5e43fdc
jit: Skip known prefix writes.
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If we already know what's in memory and it's default, we can skip
overwriting with default values. This is common, actually.
2023-08-22 23:26:31 -07:00
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46101581c0
Core: Cleanup disasm buffer usage.
2023-04-29 09:07:25 -07:00
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90517ace59
irjit: Validate alignment in slow memory mode.
2022-08-21 13:24:10 -07:00
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6715f41410
irjit: Add constructs for validing mem access.
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Basically to allow slow/fast memory to work with IR, including for
alignment checks.
2022-08-21 13:01:23 -07:00
Henrik Rydgård
b43698a13d
Remove most instances of base/logging.h from Common, Core, GPU, more
2020-08-15 19:08:44 +02:00
Unknown W. Brackets
b8342fb8ec
SaveState: Rename ChunkFile files to Serialize.
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Makes more sense and less weird than ChunkFileDoMap, etc.
2020-08-10 08:04:05 +00:00
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4b4e3432cd
SaveState: Split Do() into a separate header.
2020-08-10 08:03:41 +00:00
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ab809bd19e
jit: Apply hasSetRounding at compile time.
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Otherwise, the block will be executed with the wrong rounding mode the
first time rounding is set. This could be important if it was set for a
single operation.
This is only a problem the first time it's set.
2018-04-01 10:36:16 -07:00
Henrik Rydgård
4a32ec3102
Merge pull request #10516 from unknownbrackets/irjit-lwr
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irjit: Optimize out more temps and lwl/lwr operations
2018-01-10 09:11:10 +01:00
Unknown W. Brackets
b11f00cead
irjit: Combine lwl/lwr and swl/swr, like before.
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Still want to inline the operation, because the backend shouldn't have to
redo it every time, and we want the temps cleaned up if possible.
2018-01-07 21:05:58 -08:00
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97674b80bd
irjit: Skip preloading blocks with jump to 0.
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These will be changed before executing anyway.
2018-01-06 17:23:53 -08:00
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bc541bd020
irjit: Encode downcount directly as a constant.
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Simpler this way, now.
2018-01-03 23:32:31 -08:00
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cffb2d61a7
irjit: Embed constant inside IRInst.
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This simplifies a bunch of code and improves compile performance by about
30%, at the cost of a bit more memory.
2018-01-03 23:24:04 -08:00
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b11858d9a0
irjit: Properly account for delay slots in size.
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Otherwise we think blocks are 4 bytes too short, which can affect
invalidation.
2018-01-01 22:54:40 -08:00
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b37ba9e599
irjit: Add options for compile/optimize steps.
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This way the backend can set flags for the type of IR it wants. It's
seems too complex to combine certain things like lwl/lwr in a pass.
2018-01-01 08:38:12 -08:00
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905d2c2da6
irjit: Cleanup some invalid op handling.
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And log blocks the same way as other backends.
2018-01-01 08:38:11 -08:00
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8ffb0101fe
jit: Report blocks with uneaten VFPU prefixes.
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There may be options to avoid, like continuing these blocks, especially if
they're likely or something.
2018-01-01 08:38:10 -08:00
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4578c3cb54
jit-ir: Implement memory breakpoints.
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These generally work, but likely delay slots will make downcount slightly
off, and won't resume when you hit run again without manually stepping
through them.
2016-07-02 16:38:30 -07:00
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1df08518ae
jit-ir: Implement basic icache clear.
2016-07-01 17:27:24 -07:00
