Henrik Rydgard
8b450c8034
Merge NativeJit.cpp/h with JitCommon.cpp/h
2016-05-01 11:39:59 +02:00
Henrik Rydgard
5aadce59a2
Move architecture-specific code out of JitBlockCache
2016-05-01 11:39:58 +02:00
Henrik Rydgard
a5be0976bd
Remove preprocessor hacks to choose JIT implementation.
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Opens up for having multiple JIT implementations available at runtime,
which could be use for experimenting with new JIT compiler types or for
unit testing one JIT on another architecture.
Very few of the newly virtual calls are on any sort of critical path so
hopefully there will not be a performance loss.
2016-05-01 11:39:53 +02:00
Unknown W. Brackets
2461a849f9
Correct some warnings reported by clang.
2016-03-20 23:13:28 -07:00
Unknown W. Brackets
eebe3e7bce
armjit: Fix block exit safety writes.
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This ensures we don't link to invalid blocks, fixes BKPTs on relinking,
and fixes BKPTs when relinking a prelinked block.
Should help #8524 .
2016-01-30 20:44:57 -08:00
Unknown W. Brackets
0fc774927f
jit: Minor cleanups.
2016-01-10 12:28:29 -08:00
Unknown W. Brackets
3ec7404d2d
Jit: Always link RA, even if branch not taken.
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The ops don't write RA conditionally.
2015-12-27 20:47:15 -08:00
Henrik Rydgard
a6294f3e2d
Now the three backends actually do the same thing with rounding. Fixes a bug in the x86 backend, too.
2015-10-10 13:11:38 +02:00
Henrik Rydgard
30555f31ca
ARM64 typo fix. Add a couple of worrying comments...
2015-10-10 11:56:59 +02:00
Henrik Rydgard
d628b9b57b
Minor fixes, mostly comments
2015-10-10 10:03:34 +02:00
Henrik Rydgard
b2b5f3424f
Fix for 32-bit ARM
2015-10-08 23:11:57 +02:00
Henrik Rydgard
c41baab747
Pregenerate code to handle rounding mode switches. This time, for all three cores.
2015-10-08 19:58:37 +02:00
Henrik Rydgard
b7725c4f40
Remove empty header files
2015-10-08 18:54:33 +02:00
Henrik Rydgard
bfed830f91
Remove the ability to disable rounding mode support. It's time.
2015-10-08 14:54:42 +02:00
Henrik Rydgard
6dd86cd843
Get rid of the ForceFlushToZero hidden config option
2015-10-08 14:54:41 +02:00
Unknown W. Brackets
9262ddfc13
Avoid any possible shifts by 32.
2015-07-19 13:25:50 -07:00
Henrik Rydgard
dc2f6a30fb
ARM64: Fix joining of lwl/lwr and swl/swr. "implement" the cache instruction.
2015-07-11 16:25:22 +02:00
Henrik Rydgard
f50828a66a
ARM32 JIT: Implement vs2i, vus2i, vc2i (but not vuc2i)
2015-07-11 00:37:57 +02:00
Henrik Rydgard
cd1665e8f6
ARM32 jit: Implement vi2s, vi2c (but not the unsigned variants yet). uses the new shifts from the last commit
2015-07-09 00:27:12 +02:00
Unknown W. Brackets
db3dffb44d
arm64: Oops, fix flushing zero from an armreg.
2015-07-05 11:57:18 -07:00
Unknown W. Brackets
003668fe66
armjit: Fix discarding imms.
2015-07-04 07:30:32 -07:00
Unknown W. Brackets
e6a7ba3fae
arm64: Bring imms along for the STP ride.
2015-07-03 16:51:33 -07:00
Henrik Rydgård
82c66bc463
Merge pull request #7840 from unknownbrackets/arm64-micro
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Flush using STP where possible in ARM64
2015-07-03 23:20:43 +02:00
Unknown W. Brackets
8fdceba7ca
Add timing for all the basics.
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This way we can see overall stats for a frame.
2015-07-03 12:05:08 -07:00
Unknown W. Brackets
2331df8c70
arm64: Try to be more consistent in ZERO handling.
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Let's keep it IMM where possible, even though we've added checks for
MIPS_REG_ZERO.
2015-07-03 10:21:24 -07:00
