Commit Graph

58 Commits

Author SHA1 Message Date
Unknown W. Brackets
9b94266c4a arm64: Avoid overflow in imm math. 2015-08-30 13:00:18 -07:00
Henrik Rydgard
9fe382ad18 ARM64: Shortcut moves between gpr and vfpu when not mapped 2015-07-11 23:53:06 +02:00
Henrik Rydgard
b73920fcba ARM64: Cleanups in regcache and jit 2015-07-11 17:00:01 +02:00
Henrik Rydgard
444fc0885c Fix the crash bug (need to mark static non-pointer regs as depointerified on flush) 2015-07-11 16:59:14 +02:00
Henrik Rydgard
2a8560e522 ARM64: Another pair of fixes for static alloc. Still crashes in many games... 2015-07-11 16:59:14 +02:00
Henrik Rydgard
d1bbc1d3c0 More regcache fixes. ML_IMM works now although there is another stability issue somewhere. 2015-07-11 16:59:13 +02:00
Henrik Rydgard
1b8549b26f Couple more regcache fixes 2015-07-11 16:59:12 +02:00
Henrik Rydgard
4920f3e3c1 Work towards handling ML_IMM in static registers but doesn't work yet (enable on line 649) 2015-07-11 16:59:11 +02:00
Henrik Rydgard
f42f81a4da ARM64: Optimize small adjustments of pointerified registers 2015-07-11 16:59:11 +02:00
Henrik Rydgard
9af6abd8a1 ARM64: Support pointerified static allocs, statically allocate SP 2015-07-11 16:59:10 +02:00
Henrik Rydgard
844a3f19a9 Fix bugs and issues in ARM64 static alloc. Thanks unknown for finding the problem. 2015-07-11 16:59:09 +02:00
Henrik Rydgard
a0bf934796 ARM64: Some work on static allocation. Close to working, cube.elf runs 700 blocks but then hangs (?!) 2015-07-11 16:59:09 +02:00
Unknown W. Brackets
db3dffb44d arm64: Oops, fix flushing zero from an armreg. 2015-07-05 11:57:18 -07:00
Unknown W. Brackets
003668fe66 armjit: Fix discarding imms. 2015-07-04 07:30:32 -07:00
Unknown W. Brackets
8ea7f99072 arm64: Fix imm wasting when STP doesn't work out. 2015-07-04 07:09:47 -07:00
Unknown W. Brackets
e6a7ba3fae arm64: Bring imms along for the STP ride. 2015-07-03 16:51:33 -07:00
Unknown W. Brackets
ca1e482a56 arm64: Avoid setting a reg to zero to store it. 2015-07-03 16:05:25 -07:00
Unknown W. Brackets
90b7d135cb arm64: Flush in pairs if possible.
On an A57, this is around twice as fast (for just the STR/STR vs STP.)
2015-07-03 11:07:09 -07:00
Unknown W. Brackets
ddb955a527 arm64: Try to optimize imm stores.
If we already have a reg, we can use it.  This can happen when immediate
addresses are loaded and used as bases, although it's not super common.
2015-07-03 10:48:11 -07:00
Unknown W. Brackets
2331df8c70 arm64: Try to be more consistent in ZERO handling.
Let's keep it IMM where possible, even though we've added checks for
MIPS_REG_ZERO.
2015-07-03 10:21:24 -07:00
Unknown W. Brackets
66d85233b9 arm64: Flush only caller-saved regs before calls. 2015-07-03 10:09:43 -07:00
Unknown W. Brackets
66adc4e695 jit: Normalize CONDITIONAL_DISABLE formatting. 2015-07-02 20:31:37 -07:00
Unknown W. Brackets
fed687fb59 arm64: Meld LO and HI together for multiplies. 2015-07-02 20:31:37 -07:00
Unknown W. Brackets
1d1c80d9cf arm64: Use BFI for cfc1. 2015-07-02 20:31:35 -07:00
Henrik Rydgård
d014d420db Unify JitOptions across the backends.
This is required to make ExtractIR not a member of the various backends.
2015-04-12 11:41:26 -07:00