Unknown W. Brackets
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b9de1a44df
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jit: Reduce some include pollution.
Usually no need for all of MIPSAnalyst.
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2022-10-27 23:26:44 -07:00 |
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Unknown W. Brackets
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cae0815095
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jit: Avoid using mips identifier directly.
Apparently this gets defined on mips systems.
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2021-02-26 07:24:58 -08:00 |
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Florent Castelli
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373db56a16
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blackberry: Remove!
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2016-10-11 17:40:32 +02:00 |
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Unknown W. Brackets
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fed687fb59
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arm64: Meld LO and HI together for multiplies.
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2015-07-02 20:31:37 -07:00 |
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Henrik Rydgård
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d014d420db
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Unify JitOptions across the backends.
This is required to make ExtractIR not a member of the various backends.
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2015-04-12 11:41:26 -07:00 |
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Unknown W. Brackets
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afdbf5610b
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jit: Use nicknames for a few more static regs.
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2014-12-17 01:11:33 -08:00 |
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Unknown W. Brackets
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cb7e7643db
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Blackberry buildfix.
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2014-12-13 19:38:04 -08:00 |
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Henrik Rydgard
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05a8e2e35d
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Some work towards being able to build two JITs together
This will be useful for testing/debugging, but not there yet.
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2014-12-13 21:13:54 +01:00 |
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Unknown W. Brackets
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f817d49dfb
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jit: Discard clobbered registers on spill.
If we're spilling anyway, discard rather than saving.
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2014-12-07 23:08:21 -08:00 |
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Unknown W. Brackets
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9dd6bb56bb
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jit: Make available js_ and jo_ in regcaches.
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2014-12-07 21:07:23 -08:00 |
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Henrik Rydgard
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51d55bd645
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Namespacing cleanup (it's bad to do "using namespace" in a header)
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2014-12-07 14:44:15 +01:00 |
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Henrik Rydgard
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d98bde8e50
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Merge the RegCache changes from the old neon-vfpu branch
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2014-12-06 12:26:58 +01:00 |
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Unknown W. Brackets
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f6f943de63
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jit: MAP_NOINIT should always mean MAP_DIRTY.
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2014-11-29 00:14:08 -08:00 |
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Unknown W. Brackets
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5a89c17cf0
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armjit: Allow R1 in regalloc, use LR as temp.
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
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2014-03-28 18:38:38 -07:00 |
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Henrik Rydgard
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dca457e6df
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Optimize multiple sv.s and lv.s calls on ARM. Also some cleanup.
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2013-11-19 21:41:47 +01:00 |
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Unknown W. Brackets
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98fb2e0402
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armjit: Refer to R11 as MEMBASEREG for clarity.
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2013-11-14 23:37:48 -08:00 |
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Henrik Rydgård
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ef8631c57f
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Cache VFPU_CTRL_CC in a register
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2013-11-12 17:58:29 +01:00 |
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Unknown W. Brackets
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f4b5e8a4c1
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Merge pull request #4518 from hrydgard/fpcond
ARMJIT: Cache fpcond in a register to avoid store/load between compare and branch
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2013-11-12 01:50:16 -08:00 |
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Henrik Rydgård
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17074f5a7f
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Cache fpcond in a register to avoid store/load between compare and branch
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2013-11-12 10:33:38 +01:00 |
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Unknown W. Brackets
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32504ed46e
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armjit: Prioritize spilling regs not used soon.
This may improve trashing.
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2013-11-12 00:03:39 -08:00 |
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Unknown W. Brackets
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7e46ee0b0f
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armjit: Replace MOVI2R with using the regcache.
So that it can optimize the value with existing imms.
Not actually optimizing yet.
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2013-11-10 15:50:45 -08:00 |
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Unknown W. Brackets
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d092f7dd2d
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armjit: Remember reg imm values even after flush.
This way, we can base other imm values off them, or even do imm math using
them. We can also avoid re-flushing an imm.
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2013-11-10 15:50:14 -08:00 |
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Unknown W. Brackets
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a3a061a69f
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armjit: Optimize a division by a power of two.
These really happen.
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2013-11-09 08:43:53 -08:00 |
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Unknown W. Brackets
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6038d96b46
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armjit: Flush regs using STMIA where possible.
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2013-11-09 08:25:07 -08:00 |
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Unknown W. Brackets
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e686ff59bf
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armjit: Allocate regs in preferred slots.
This may allow better flushing. Not sure if these are the best regs,
but if they aren't it shouldn't really hurt.
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2013-11-09 08:25:07 -08:00 |
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