Unknown W. Brackets
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32504ed46e
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armjit: Prioritize spilling regs not used soon.
This may improve trashing.
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2013-11-12 00:03:39 -08:00 |
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Unknown W. Brackets
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1bfce12fdd
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armjit: Report some unexpected situations.
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2013-11-11 23:41:18 -08:00 |
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Unknown W. Brackets
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ac5aacbd16
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armjit: Spill an imm armreg back to an imm.
We might be able to avoid the store or etc.
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2013-11-11 23:39:13 -08:00 |
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Unknown W. Brackets
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e1fffdb37a
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armjit: Don't reload an armreg ptr marked noinit.
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2013-11-10 16:43:38 -08:00 |
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Unknown W. Brackets
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bc0a846475
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armjit: Optimize imm addresses (could do better...)
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2013-11-10 16:30:20 -08:00 |
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Unknown W. Brackets
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c63560c0dd
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armjit: Try to find imms to optimize a reg load.
This way we skip the MOVW/MOVT and go for one op only.
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2013-11-10 16:20:34 -08:00 |
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Unknown W. Brackets
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7e46ee0b0f
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armjit: Replace MOVI2R with using the regcache.
So that it can optimize the value with existing imms.
Not actually optimizing yet.
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2013-11-10 15:50:45 -08:00 |
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Unknown W. Brackets
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d092f7dd2d
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armjit: Remember reg imm values even after flush.
This way, we can base other imm values off them, or even do imm math using
them. We can also avoid re-flushing an imm.
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2013-11-10 15:50:14 -08:00 |
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Unknown W. Brackets
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7f9cbc0f10
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armjit: Minor cleanup and logging tweaks.
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2013-11-10 15:12:40 -08:00 |
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Unknown W. Brackets
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a3a061a69f
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armjit: Optimize a division by a power of two.
These really happen.
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2013-11-09 08:43:53 -08:00 |
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Unknown W. Brackets
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54168b173e
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armjit: Clean up some magic numbers.
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2013-11-09 08:25:08 -08:00 |
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Unknown W. Brackets
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6038d96b46
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armjit: Flush regs using STMIA where possible.
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2013-11-09 08:25:07 -08:00 |
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Unknown W. Brackets
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e686ff59bf
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armjit: Allocate regs in preferred slots.
This may allow better flushing. Not sure if these are the best regs,
but if they aren't it shouldn't really hurt.
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2013-11-09 08:25:07 -08:00 |
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Unknown W. Brackets
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cb3bb73148
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armjit: Improve GPR typesafety.
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2013-11-09 08:24:15 -08:00 |
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Henrik Rydgard
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58c39a38ee
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ARM regcache: Add mechanism to keep registers converted to pointers around
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2013-11-09 16:57:29 +01:00 |
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Henrik Rydgard
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5a95e267fb
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Add an optimization to discard registers at the end of functions when possible.
Works in some games but crashes many so hiding it for now. Do not add UI.
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2013-11-08 12:43:48 +01:00 |
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Henrik Rydgard
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32c95af820
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ARM: Some zero-register fixes
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2013-11-07 15:29:13 +01:00 |
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Henrik Rydgard
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8c88dff5a4
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More log categories, use them (and existing ones). Improve log config.
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2013-09-07 22:02:55 +02:00 |
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Henrik Rydgard
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3b9e6243eb
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Only flush the required registers on function calls (only implemented for real on ARM)
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2013-07-28 22:21:43 +02:00 |
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Sacha
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056ae5db44
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Buildfix for Qt.
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2013-07-29 00:26:36 +10:00 |
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Henrik Rydgard
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59644ad59b
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Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST.
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2013-07-28 12:14:35 +02:00 |
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Henrik Rydgard
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76a937f489
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ARMJIT Experiment: Keep downcount in a register. Needs benchmarking.
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2013-07-27 17:27:26 +02:00 |
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Unknown W. Brackets
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e355518549
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Fix a bad enum compare.
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2013-07-26 22:30:05 -07:00 |
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Aapo Rantalainen
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2b965a6f03
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Maemo5 support
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2013-03-22 09:15:00 +02:00 |
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Unknown W. Brackets
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cea396e901
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armjit: Don't use R1 in the regcache.
This way it can be used in swl/swr/ins as a temp reg.
Note: those instructions are currently DISABLEd, though.
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2013-03-07 02:09:13 -08:00 |
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