Unknown W. Brackets
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f339f7d539
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armjit: Handle NAN correctly in float conversion.
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2014-06-29 20:05:59 -07:00 |
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Unknown W. Brackets
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c168db5943
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armjit: Fix really bad typo in cvt.w.s.
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2014-06-29 19:43:17 -07:00 |
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Unknown W. Brackets
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f008bebab4
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armjit: Fix floor/ceil/cvt.w.s rounding.
Unfortunately, correctly rounding is probably slower.
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2014-06-28 00:38:57 -07:00 |
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Unknown W. Brackets
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acad2e1763
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x86jit: Cache fpcond in a register.
Mostly to match armjit.
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2014-06-28 00:38:55 -07:00 |
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Unknown W. Brackets
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5a89c17cf0
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armjit: Allow R1 in regalloc, use LR as temp.
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
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2014-03-28 18:38:38 -07:00 |
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Unknown W. Brackets
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05ab192c9c
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Reduce includes in Core/HLE/.
Especially templates.
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2014-03-15 11:22:19 -07:00 |
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Unknown W. Brackets
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5128083d93
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Mask out fcr31 bits that can't be set on a PSP.
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2013-11-14 23:57:28 -08:00 |
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Unknown W. Brackets
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3c73d0d1f1
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armjit: Read fpu control regs other than 0/31 as 0.
Always seem to give zero, regardless of the value of fcr31, etc.
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2013-11-14 23:39:39 -08:00 |
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Unknown W. Brackets
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26f5922174
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Return the correct value for fcr0/fir.
This is what the PSP actually returns, it's read only.
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2013-11-14 23:39:08 -08:00 |
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Unknown W. Brackets
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98fb2e0402
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armjit: Refer to R11 as MEMBASEREG for clarity.
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2013-11-14 23:37:48 -08:00 |
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Sacha
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20e8a81268
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Switch to compile-time ARMV7 define.
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2013-11-15 11:20:39 +10:00 |
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Henrik Rydgård
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17074f5a7f
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Cache fpcond in a register to avoid store/load between compare and branch
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2013-11-12 10:33:38 +01:00 |
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Unknown W. Brackets
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7e46ee0b0f
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armjit: Replace MOVI2R with using the regcache.
So that it can optimize the value with existing imms.
Not actually optimizing yet.
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2013-11-10 15:50:45 -08:00 |
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Henrik Rydgard
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502f772856
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Add experimental mode to cache pointers in the arm jit.
Turned off for now as it needs more work but seems quite promising already.
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2013-11-09 17:15:30 +01:00 |
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Henrik Rydgard
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dff0c431aa
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ARMjit: Optimize mfc1, mtc1
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2013-11-08 12:43:48 +01:00 |
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Henrik Rydgård
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9be3f8fc0a
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Use ANDI2R instead of a BIC with a too large parameter
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2013-11-06 10:50:30 +01:00 |
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Sacha
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81d3df0841
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ARMJIT: Minor optimisations for armv6 and armv7.
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2013-11-06 15:28:26 +10:00 |
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Sacha
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18b7503dd5
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Fix rounding errors in armjit.
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2013-10-14 19:24:13 +10:00 |
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Unknown W. Brackets
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97aa1a631e
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Improve typesafety in the x86 regalloc.
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2013-08-24 19:41:10 -07:00 |
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Unknown W. Brackets
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109ad17ac6
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Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
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2013-08-24 15:36:24 -07:00 |
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Henrik Rydgard
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ebcdd637ee
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ARMJit bugfixes, enable vmul, vadd, vdiv, vsub.
Prefixes disabled until I can fix clamping.
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2013-07-31 00:12:43 +02:00 |
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Henrik Rydgard
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d8294f025f
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More VFPU stuff (nothing new activated)
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2013-07-30 01:09:11 +02:00 |
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Henrik Rydgard
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59644ad59b
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Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST.
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2013-07-28 12:14:35 +02:00 |
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Henrik Rydgard
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2eaf581bbe
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Add experimental UV prescaling hack, hidden as it's not finished yet.
Most people should ignore this for now, it's a step towards faster skinning in the future.
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2013-07-27 23:23:17 +02:00 |
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Henrik Rydgard
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afcb5add51
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Minor code cleanup/reindent around ARM jit
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2013-07-27 22:14:01 +02:00 |
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