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x86jit: Implement shifts.

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2023-08-24 20:07:44 -07:00
parent 601bf344c1
commit 363f2b68e1
5 changed files with 144 additions and 14 deletions
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41
Core/MIPS/IR/IRRegCache.cpp
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@@ -698,6 +698,10 @@ void IRNativeRegCacheBase::ApplyMapping(const Mapping *mapping, int count) {
}
}
auto isNoinit = [](MIPSMap f) {
return (f & MIPSMap::NOINIT) == MIPSMap::NOINIT;
};
auto mapRegs = [&](int i) {
MIPSLoc type = MIPSLoc::MEM;
switch (mapping[i].type) {
@@ -714,24 +718,39 @@ void IRNativeRegCacheBase::ApplyMapping(const Mapping *mapping, int count) {
return;
}
MIPSMap flags = mapping[i].flags;
for (int j = 0; j < count; ++j) {
if (mapping[j].type == mapping[i].type && mapping[j].reg == mapping[i].reg && i != j) {
_assert_msg_(mapping[j].lanes == mapping[i].lanes, "Lane aliasing not supported yet");
if (!isNoinit(mapping[j].flags) && isNoinit(flags)) {
flags = (flags & MIPSMap::BACKEND_MASK) | MIPSMap::DIRTY;
}
}
}
if (config_.mapFPUSIMD || mapping[i].type == 'G') {
MapNativeReg(type, mapping[i].reg, mapping[i].lanes, mapping[i].flags);
MapNativeReg(type, mapping[i].reg, mapping[i].lanes, flags);
return;
}
for (int j = 0; j < mapping[i].lanes; ++j)
MapNativeReg(type, mapping[i].reg + j, 1, mapping[i].flags);
MapNativeReg(type, mapping[i].reg + j, 1, flags);
};
auto mapFilteredRegs = [&](auto pred) {
for (int i = 0; i < count; ++i) {
if (pred(mapping[i].flags))
mapRegs(i);
}
};
// Do two passes: first any without NOINIT, then NOINIT.
for (int i = 0; i < count; ++i) {
if ((mapping[i].flags & MIPSMap::NOINIT) != MIPSMap::NOINIT)
mapRegs(i);
}
for (int i = 0; i < count; ++i) {
if ((mapping[i].flags & MIPSMap::NOINIT) == MIPSMap::NOINIT)
mapRegs(i);
}
// Do two passes: with backend special flags, and without.
mapFilteredRegs([](MIPSMap flags) {
return (flags & MIPSMap::BACKEND_MASK) != MIPSMap::INIT;
});
mapFilteredRegs([](MIPSMap flags) {
return (flags & MIPSMap::BACKEND_MASK) == MIPSMap::INIT;
});
}
void IRNativeRegCacheBase::CleanupMapping(const Mapping *mapping, int count) {