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Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
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+5
-2
@@ -17,10 +17,13 @@
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#pragma once
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#include "../../Globals.h"
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#include "../CPU.h"
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#include "Globals.h"
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#include "Core/MemMap.h"
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#include "Core/CPU.h"
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#include "util/random/rng.h"
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typedef Memory::Opcode MIPSOpcode;
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enum
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{
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MIPS_REG_ZERO=0,
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