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c82feb6c08aa6e77ac4c906caee6dd5eb557fb39
Commit Graph
52 Commits
Author SHA1 Message Date
mathieui f15ffda5a7 Correct ampersands as well 2016-01-21 21:27:56 +01:00
mathieui 3e283ea9f1 More asterisks 2016-01-21 21:16:51 +01:00
mathieui 78aa398e7c Common: asterisks go against the type name 
not the variable name
 2016-01-21 20:46:25 +01:00
Lioncash 2630752ffe Arm64Emitter: Get rid of a pointer cast 2015-10-22 15:32:11 -04:00
Lioncash 018c85c248 Arm64Emitter: Mark trivial functions as constexpr 2015-10-22 15:22:38 -04:00
Lioncash 19ac565e0d Common: Move asserts to their own header 2015-09-26 18:51:27 -04:00
Ryan Houdek 2ad26ab3e9 [AArch64] Fix Test&Branch to relative location instructions. 
Wasn't masking by the size of the offset encoding so negative values were killing the instruction
Missed commiting this in my integer gatherpipe PR.
Fixes crashing on AArch64.
 2015-09-07 13:38:58 -05:00
Ryan Houdek d003934b8a Merge pull request #2929 from Sonicadvance1/aarch64_optimize_gpr_flush 
Aarch64 optimize gpr flush
 2015-08-31 10:55:45 -05:00
Ryan Houdek f2c17436ab [AArch64] Fix issue in emitter. 
Loadstore pairs support only signed offsets, not unsigned.
 2015-08-30 23:05:59 -05:00
Ryan Houdek b907576510 [AArch64] Support profiling by cycle counters if they are available to EL0 2015-08-30 10:25:16 -05:00
Ryan Houdek 4fa23abbe1 [AArch64] Implement MOVI and ORR(imm) in the NEON emitter. 2015-08-23 15:34:53 -05:00
degasus 9bfff0d461 JitArm64: Fix jit clearing 
We have to reset m_lastCacheFlushEnd on clearing.
 2015-08-15 11:41:01 +02:00
Lioncash 144ea9f4aa Arm64Emitter: Fix encoding of '2-reg misc' variant of FCMEQ 2015-08-10 19:48:36 -04:00
Ryan Houdek 922d476dab [AArch64] Fix FCMGE instruction encoding. 
Fixes a crash when ps_sel is used (PSO 1&2 intro movies).
 2015-08-09 14:54:55 -05:00
degasus b8dd68beef JitArm64: Far Code Cache 2015-07-12 09:41:32 +02:00
Lioncash d09d59007a Arm64Emitter: Add a missing const specifier for an array table 2015-07-02 11:09:44 -04:00
Ryan Houdek afc3d30f5c [AArch64] Implement BFI & UBFIZ in the emitter. 
Also fixes a bug in the UBFX instruction emitter. Naughty Naughty PPSSPP, not testing emitter functions you add.
 2015-06-29 19:00:22 -05:00
Ryan Houdek 5dc148159f [AArch64] Implement {U, S}QXTN{,2} 
Also split out XTN to XTN and XTN2.
 2015-06-13 23:16:17 -05:00
Lioncash 74b359e390 Arm64Emitter: Remove unused variable from EncodeLoadStoreRegisterOffset 2015-06-13 14:27:15 -04:00
Ryan Houdek 3d2b116323 [AArch64] Implement a couple instructions in the emitter. 
Implements LD2R.
Implements LD1R/LD2R with post-indexing support.
Implements vector min/max instructions.
 2015-06-09 18:10:56 -05:00
Ryan Houdek 8ae12d8005 [AArch64] Add ASIMD LDR/STR with register offset 2015-06-07 19:53:05 -05:00
Ryan Houdek 05b72c5d31 [AArch64] Upstream PPSSPP's emitter changes. 
Requires a minor change to in the JIT to make sure everything still works.
 2015-06-07 19:50:21 -05:00
Tillmann Karras 30ebb2459e Set copyright year to when a file was created 2015-05-25 13:22:31 +02:00
Tillmann Karras cefcb0ace9 Update license headers to GPLv2+ 2015-05-25 13:22:31 +02:00
Ryan Houdek f6511c3ba5 [AArch64] Add an assert to SMOV in the emitter. 
SMOV doesn't have an encoding for moving a 32bit element to a 32bit GPR.
One should use UMOV if they want that.
 2015-03-08 12:29:45 -05:00