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07894f4a07
Fixed include paths to be relative to the private or public folders. Hid or removed includes that reached into other private module folders. Updated PublicInclude paths when necessary. #jira #preflight 631a717cec45fbf3d74d4ba7 [CL 21916033 by bryan sefcik in ue5-main branch]
116 lines
4.2 KiB
C++
116 lines
4.2 KiB
C++
// Copyright Epic Games, Inc. All Rights Reserved.
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#include "CoreMinimal.h"
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#include "Misc/AutomationTest.h"
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#include "VectorVM.h"
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#include "VectorVMPrivate.h"
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#define OP_REGISTER (0)
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#define OP1_CONST (1 << 1)
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#define OP2_CONST (1 << 2)
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#define SRCOP_RRRR (OP_REGISTER | OP_REGISTER | OP_REGISTER | OP_REGISTER)
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#define SRCOP_RRCR (OP_REGISTER | OP_REGISTER | OP1_CONST | OP_REGISTER)
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#define SRCOP_RCCR (OP_REGISTER | OP2_CONST | OP1_CONST | OP_REGISTER)
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#if WITH_DEV_AUTOMATION_TESTS
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IMPLEMENT_SIMPLE_AUTOMATION_TEST(FVectorVMTest, "System.Core.Math.Vector VM", EAutomationTestFlags::ApplicationContextMask | EAutomationTestFlags::SmokeFilter)
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/*------------------------------------------------------------------------------
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Automation test for the VM.
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------------------------------------------------------------------------------*/
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bool FVectorVMTest::RunTest(const FString& Parameters)
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{
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VectorVM::Init();
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//TODO REWRITE VECTOR VM TESTS
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// uint8 TestCode[] =
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// {
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// (uint8)EVectorVMOp::mul, SRCOP_RRRR, 0x00, 0x0 + VectorVM::NumTempRegisters, 0x0 + VectorVM::NumTempRegisters, // mul r0, r8, r8
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// (uint8)EVectorVMOp::mad, SRCOP_RRRR, 0x01, 0x01 + VectorVM::NumTempRegisters, 0x01 + VectorVM::NumTempRegisters, 0x00, // mad r1, r9, r9, r0
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// (uint8)EVectorVMOp::mad, SRCOP_RRRR, 0x00, 0x02 + VectorVM::NumTempRegisters, 0x02 + VectorVM::NumTempRegisters, 0x01, // mad r0, r10, r10, r1
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// (uint8)EVectorVMOp::add, SRCOP_RRCR, 0x01, 0x00, 0x01, // addi r1, r0, c1
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// (uint8)EVectorVMOp::neg, SRCOP_RRRR, 0x00, 0x01, // neg r0, r1
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// (uint8)EVectorVMOp::clamp, SRCOP_RCCR, VectorVM::FirstOutputRegister, 0x00, 0x02, 0x03, // clampii r40, r0, c2, c3
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// 0x00 // terminator
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// };
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//
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// VectorRegister TestRegisters[4][VectorVM::VectorsPerChunk];
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// VectorRegister* InputRegisters[3] ={ TestRegisters[0], TestRegisters[1], TestRegisters[2] };
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// VectorRegister* OutputRegisters[1] ={ TestRegisters[3] };
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//
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// VectorRegister Inputs[3][VectorVM::VectorsPerChunk];
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// for (int32 i = 0; i < VectorVM::ChunkSize; i++)
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// {
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// reinterpret_cast<float*>(&Inputs[0])[i] = static_cast<float>(i);
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// reinterpret_cast<float*>(&Inputs[1])[i] = static_cast<float>(i);
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// reinterpret_cast<float*>(&Inputs[2])[i] = static_cast<float>(i);
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// reinterpret_cast<float*>(InputRegisters[0])[i] = static_cast<float>(i);
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// reinterpret_cast<float*>(InputRegisters[1])[i] = static_cast<float>(i);
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// reinterpret_cast<float*>(InputRegisters[2])[i] = static_cast<float>(i);
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// }
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//
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// FVector4 ConstantTable[VectorVM::MaxConstants];
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// ConstantTable[0] = FVector4(0.0f, 0.0f, 0.0f, 0.0f);
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// ConstantTable[1] = FVector4(5.0f, 5.0f, 5.0f, 5.0f);
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// ConstantTable[2] = FVector4(-20.0f, -20.0f, -20.0f, -20.0f);
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// ConstantTable[3] = FVector4(20.0f, 20.0f, 20.0f, 20.0f);
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//
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// FVectorVMSharedDataView* dummy = NULL;
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//
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// VectorVM::Exec(
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// TestCode,
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// InputRegisters, 3,
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// OutputRegisters, 1,
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// ConstantTable,
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// dummy,
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// VectorVM::VectorsPerChunk
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// );
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//
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// for (int32 i = 0; i < VectorVM::ChunkSize; i++)
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// {
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// float Ins[3];
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//
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// // Verify that the input registers were not overwritten.
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// for (int32 InputIndex = 0; InputIndex < 3; ++InputIndex)
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// {
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// float In = Ins[InputIndex] = reinterpret_cast<float*>(&Inputs[InputIndex])[i];
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// float R = reinterpret_cast<float*>(InputRegisters[InputIndex])[i];
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// if (In != R)
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// {
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// AddError(FString::Printf(TEXT("Input register %d vector %d element %d overwritten. Has %f expected %f"),
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// InputIndex,
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// i / VectorVM::ElementsPerVector,
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// i % VectorVM::ElementsPerVector,
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// R,
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// In
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// ));
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// return false;
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// }
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// }
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//
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// // Verify that outputs match what we expect.
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// float Out = reinterpret_cast<float*>(OutputRegisters[0])[i];
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// float Expected = FMath::Clamp<float>(-(Ins[0] * Ins[0] + Ins[1] * Ins[1] + Ins[2] * Ins[2] + 5.0f), -20.0f, 20.0f);
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// if (Out != Expected)
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// {
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// AddError(FString::Printf(TEXT("Output register %d vector %d element %d is wrong. Has %f expected %f"),
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// 0,
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// i / VectorVM::ElementsPerVector,
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// i % VectorVM::ElementsPerVector,
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// Out,
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// Expected
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// ));
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// return false;
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// }
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// }
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return true;
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}
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#endif //WITH_DEV_AUTOMATION_TESTS
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