Commit Graph

61 Commits

Author SHA1 Message Date
Marc Audy
50a3d7d368 Merge Release-Engine-Staging to Main @ CL# 14467590
This represents UE4/Main @ 14432125 + some cherrypick fixes

[CL 14468207 by Marc Audy in ue5-main branch]
2020-10-09 22:42:26 -04:00
Marcus Wassmer
3b81cf8201 Merging using //UE5/Main_to_//UE5/Release-Engine-Staging @14384769
autoresolved files
#rb none

[CL 14384911 by Marcus Wassmer in ue5-main branch]
2020-09-24 00:43:27 -04:00
Marc Audy
7379fa99c5 Merging //UE5/Release-Engine-Staging to Main (//UE5/Main) @ 14229157
[CL 14233282 by Marc Audy in ue5-main branch]
2020-09-01 14:07:48 -04:00
Marc Audy
a7c9001a94 Merging //UE5/Release-Engine-Staging to Main (//UE5/Main) @ 14075166
#rb
#rnx

[CL 14075271 by Marc Audy in ue5-main branch]
2020-08-11 01:36:57 -04:00
mihnea balta
2f05ece9f3 Fixed crash when using a loop with more than 32 iterations in custom HLSL.
The default threshold for loop unrolling was 32, so the compiler tried to make a dynamic loop when we had more iterations. The vector VM doesn't support that, so the codegen was never designed to understand dynamic loops, leading to an assertion failure. Increased the threshold to a large value, so we never hit this problem in practice.

#rnx
#jira none
#rb none

#ROBOMERGE-SOURCE: CL 12422302 in //UE4/Release-4.25/... via CL 12422324
#ROBOMERGE-BOT: RELEASE (Release-4.25Plus -> Release-Engine-Staging) (v671-12333473)

[CL 12426823 by mihnea balta in Release-Engine-Staging branch]
2020-03-25 14:07:16 -04:00
mihnea balta
7f1a18cebc Fixed crash when using a loop with more than 32 iterations in custom HLSL.
The default threshold for loop unrolling was 32, so the compiler tried to make a dynamic loop when we had more iterations. The vector VM doesn't support that, so the codegen was never designed to understand dynamic loops, leading to an assertion failure. Increased the threshold to a large value, so we never hit this problem in practice.

#rnx
#jira none
#rb none

[CL 12422302 by mihnea balta in 4.25 branch]
2020-03-25 13:14:27 -04:00
mihnea balta
7a7bdd7526 Fixed crashes in the vector VM backend of the shader compiler when calling void functions or functions with output parameters.
The branch flattening code assumed the function will always have a return value. Also, it never advanced the current parameter pointer when going through the function arguments, so it was trying to dereference the first parameter for all the arguments.

#rnx
#jira none
#rb Simon.Tovey

#ROBOMERGE-SOURCE: CL 12387646 in //UE4/Release-4.25/... via CL 12387649
#ROBOMERGE-BOT: RELEASE (Release-4.25Plus -> Main) (v671-12333473)

[CL 12387651 by mihnea balta in Main branch]
2020-03-24 09:34:01 -04:00
mihnea balta
aac75c8b87 Fixed crashes in the vector VM backend of the shader compiler when calling void functions or functions with output parameters.
The branch flattening code assumed the function will always have a return value. Also, it never advanced the current parameter pointer when going through the function arguments, so it was trying to dereference the first parameter for all the arguments.

#rnx
#jira none
#rb Simon.Tovey

[CL 12387646 by mihnea balta in 4.25 branch]
2020-03-24 09:33:14 -04:00
arne schober
8ebb9182e7 FNM - Added Compression option for Niagara Systems. Thge Option will try to compress some of the parameters to use half precission, which can be a performance benefit on the GPU and sometimes also on the CPU.
#RB Rob.Krajcarski, Stu.McKenna
#JIRA UE-84463


#ROBOMERGE-OWNER: arne.schober
#ROBOMERGE-AUTHOR: arne.schober
#ROBOMERGE-SOURCE: CL 12105113 via CL 12121713
#ROBOMERGE-BOT: (v657-12064184)

[CL 12121717 by arne schober in Main branch]
2020-03-10 21:00:17 -04:00
mihnea balta
9c7996448f Fixed incorrect dissassembly when WITH_EDITOR is not defined.
The opcode was only added to the argument list when WITH_EDITOR was defined, so all the positional arguments used by the string formatter were offset by -1.

#rb none


#ROBOMERGE-SOURCE: CL 11335700 via CL 11335730
#ROBOMERGE-BOT: (v653-11302973)

[CL 11335734 by mihnea balta in Main branch]
2020-02-11 08:57:26 -05:00
arciel rekman
e1db3cb334 Don't include commented out defines in the preprocessed code by default.
- Defines will still be there if we're dumping the shader code for debug.
- This makes the code less unique in general case and also avoids unnecessary works that no one sees.

#rb Lukas.Hermanns
[FYI] Lukas.Hermanns, Rolando.Caloca


#ROBOMERGE-SOURCE: CL 11311362 via CL 11311438
#ROBOMERGE-BOT: (v653-11302973)

[CL 11311455 by arciel rekman in Main branch]
2020-02-10 16:07:53 -05:00
mihnea balta
5b414fd59b Fixed vector comparisons.
The comparison operators return boolean vectors, but we were assigning the result to scalar booleans. We need to use all() around comparisons, to make sure they work correctly. Since there's no all() opcode in the VM, I've added NiagaraAll() which emulates it on CPU.

Also added support for comparing boolean values (new operator nodes plus support in the VM codegen).

#rb none


#ROBOMERGE-SOURCE: CL 11282275 via CL 11282292
#ROBOMERGE-BOT: (v647-11244347)

[CL 11284441 by mihnea balta in Main branch]
2020-02-06 13:50:11 -05:00
Rolando Caloca
bbb9564388 Copying //UE4/Dev-RenderPlat-Staging@11110326 to //UE4/Main
#rb none
#rnx

[CL 11110369 by Rolando Caloca in Main branch]
2020-01-24 18:07:01 -05:00
ryan durand
471d972e62 Updating copyright for Engine Developer.
#rnx
#rb none


#ROBOMERGE-SOURCE: CL 10869240 via CL 10869516 via CL 10869902
#ROBOMERGE-BOT: (v613-10869866)

[CL 10870584 by ryan durand in Main branch]
2019-12-26 15:32:37 -05:00
stu mckenna
b6010254ab - Write VectorVM code in LittleEndian as opposed to BigEndian, this avoids runtime byte swapping
- Read ByteCode directly if unalgned loads are supported to condense 3 opts into 1 when reading a uint16
- Pre-calculate instance loops for VECTOR_WIDTH_FLOATS to avoid each vector op having to round / divide instance counts
- Added runtime optimization of the VM script, this currently boils down to a function call per VM invoke + storing the data required
- Use vm.OptimizeVMByteCode to enable optimized code generation
- Use vm.UseOptimizedVMByteCode to enable running optimized code rather the traditional byte code

[FYI] simon.tovey,rob.krajcarski,shaun.kime
#rnx


#ROBOMERGE-SOURCE: CL 9962648 via CL 9964955
#ROBOMERGE-BOT: (v560-9963197)

[CL 9965540 by stu mckenna in Main branch]
2019-11-03 14:40:53 -05:00
simon tovey
a6f998ae05 Fix for vm compiler bug introduced in 9743796 that would cause more temporaries to be used than needed.
#rb none
[FYI] Rob.Krajcarski


#ROBOMERGE-SOURCE: CL 9748550 via CL 9748551
#ROBOMERGE-BOT: (v543-9746878)

[CL 9748555 by simon tovey in Main branch]
2019-10-22 14:17:50 -04:00
simon tovey
6e2874c958 - Removing a bunch of setup work we do for VM exectuion with remapping of register tables.
- VM is now directly fed a set of pre generated register tables from the datasets.
- Split the monolithic register table in the VM up so there are explicit I/O and temp register tables the script indexes into directly.
- Avoids some recreation of expensve objects in favour of manual reset calls.
- Re-wrote Oupt kernel to be more explicit. Going via templated handler in this case didn't get us any code reuse and just obfuscated it's workings.

Saves ~10-25us of overhead per VM involcation which soon adds up.
Saves ~1-2us inside each VM exec itself.

#rb Stu.Mckenna


#ROBOMERGE-SOURCE: CL 9743796 via CL 9743798
#ROBOMERGE-BOT: (v542-9736015)

[CL 9745804 by simon tovey in Main branch]
2019-10-22 11:10:29 -04:00
marc audy
08f24da437 Fix static analysis warning
#rb Fred.Kimberley
#jira
#rnx
[CODEREVIEW] Simon.Tovey


#ROBOMERGE-SOURCE: CL 9152880 via CL 9152882 via CL 9152886
#ROBOMERGE-BOT: (v443-9013191)

[CL 9153386 by marc audy in Main branch]
2019-09-26 13:22:16 -04:00
Simon Tovey
83405b43f6 vm visitor to stop vm ops reading from the value they're writing as this is potentially unsafe.
#rb Nicholas.Goldstein
[FYI] shuan.kime


#ROBOMERGE-OWNER: Simon.Tovey
#ROBOMERGE-AUTHOR: simon.tovey
#ROBOMERGE-SOURCE: CL 9133376 via CL 9134494 via CL 9134514
#ROBOMERGE-BOT: (v443-9013191)

[CL 9135322 by Simon Tovey in Main branch]
2019-09-26 09:30:01 -04:00
shaun kime
edc7a45f74 enable FMA and Subtraction in favor of negated addition on Niagara Shader backend.
Also run another optimization path after scalarization
Originally authored by Arne.Schober, integrated by Shaun.Kime

#rb Arne.Schober
[FYI] Simon.Tovey
#tests Engine tests passed


#ROBOMERGE-OWNER: shaun.kime
#ROBOMERGE-AUTHOR: shaun.kime
#ROBOMERGE-SOURCE: CL 8927626 via CL 8927643 via CL 8927657
#ROBOMERGE-BOT: (v429-8924992)

[CL 8928191 by shaun kime in Main branch]
2019-09-20 10:59:27 -04:00
simon tovey
c1a674c709 - Storing compact form of databuffer layout in single array to reduce cache misses in register setup.
- Optimizing temp register layout for better cache usage.
- Moving VM context from TLS to pool.

#rb Stu.Mckenna, Shaun.Kime


#ROBOMERGE-OWNER: simon.tovey
#ROBOMERGE-AUTHOR: simon.tovey
#ROBOMERGE-SOURCE: CL 8886792 via CL 8886955 via CL 8889429
#ROBOMERGE-BOT: (v427-8887818)

[CL 8890014 by simon tovey in Main branch]
2019-09-19 12:36:11 -04:00
simon tovey
7087fab23a Fix for matrix params in external function calls. Or any function call for that matter.
#rb Shaun.Kime


#ROBOMERGE-SOURCE: CL 8744377 via CL 8781754
#ROBOMERGE-BOT: (v422-8689730)

[CL 8783815 by simon tovey in Main branch]
2019-09-17 19:16:28 -04:00
Marcus Wassmer
6517c68ef5 Copying //UE4/Dev-RenderPlat-Staging@8684824 to Dev-Main (//UE4/Dev-Main)
#rb none

[CL 8684840 by Marcus Wassmer in Main branch]
2019-09-14 09:45:25 -04:00
simon tovey
be7c3f9763 Now properly supporting DI function calls in the VM having unused output parameters.
#rb Shaun.Kime
#jira UE-75719


#ROBOMERGE-OWNER: simon.tovey
#ROBOMERGE-AUTHOR: simon.tovey
#ROBOMERGE-SOURCE: CL 7974077 via CL 7974683
#ROBOMERGE-BOT: (v396-7974030)

[CL 7975059 by simon tovey in Main branch]
2019-08-13 09:47:55 -04:00
shaun kime
42745a83da Handling edge case in the non-expression visitor.
[FYI] simon.tovey
#jira UE-78508
#tests n/a


#ROBOMERGE-SOURCE: CL 7844468 via CL 7861242
#ROBOMERGE-BOT: (v389-7813075)

[CL 7861298 by shaun kime in Main branch]
2019-08-08 01:23:58 -04:00