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Control Rig: Fix writting at invalid address during compilation

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#jira UE-171575
#rb helge.mathee
#fyi matt.peters
#preflight https://horde.devtools.epicgames.com/job/638dcd421776b8c21c05f0c5

[CL 23388701 by sara schvartzman in ue5-main branch]
This commit is contained in:
sara schvartzman
2022-12-05 06:45:16 -05:00
parent 726659fb91
commit 2dd49a7df2
1 changed files with 9 additions and 6 deletions
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15
Engine/Source/Developer/RigVMDeveloper/Private/RigVMCompiler/RigVMCompiler.cpp
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@@ -1770,11 +1770,14 @@ int32 URigVMCompiler::TraverseCallExtern(const FRigVMCallExternExprAST* InExpr,
for(int32 BlockIndex = 0; BlockIndex < BlockNames.Num(); BlockIndex++)
{
const FName& BlockName = BlockNames[BlockIndex];
FRigVMBranchInfo& BranchInfo = WorkData.VM->GetByteCode().BranchInfos[BranchIndices[BlockIndex]];
BranchInfo.Label = BlockName;
BranchInfo.InstructionIndex = JumpToBranchInstructionIndex;
BranchInfo.FirstInstruction = WorkData.VM->GetByteCode().GetNumInstructions();
int32 BranchIndex = BranchIndices[BlockIndex];
{
FRigVMBranchInfo& BranchInfo = WorkData.VM->GetByteCode().BranchInfos[BranchIndex];
BranchInfo.Label = BlockName;
BranchInfo.InstructionIndex = JumpToBranchInstructionIndex;
BranchInfo.FirstInstruction = WorkData.VM->GetByteCode().GetNumInstructions();
// BranchInfo can be invalidated by ByteCode array reallocs in the code below, so do not keep a reference to it
}
// check if the block requires slicing or not.
// (do we want the private state of the nodes to be unique per run of the block)
@@ -1806,7 +1809,7 @@ int32 URigVMCompiler::TraverseCallExtern(const FRigVMCallExternExprAST* InExpr,
WorkData.VM->GetByteCode().AddJumpOp(ERigVMOpCode::JumpBackward, JumpToCallExternInstruction - CallExternInstructionIndex);
}
BranchInfo.LastInstruction = WorkData.VM->GetByteCode().GetNumInstructions() - 1;
WorkData.VM->GetByteCode().BranchInfos[BranchIndex].LastInstruction = WorkData.VM->GetByteCode().GetNumInstructions() - 1;
}
}
}