diff --git a/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp b/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp
index e2395f6..471f5ba 100644
--- a/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp
+++ b/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp
@@ -1068,21 +1068,28 @@ void vtlb_DynBackpatchLoadStore(uptr code_address, u32 code_size, u32 guest_pc,
 		is_load ? "load" : "store", (void*)code_address, code_size, guest_pc, guest_addr, gpr_bitmask, fpr_bitmask,
 		address_register, data_register, size_in_bits, is_signed, is_load);
 
+    std::bitset<iREGCNT_GPR> stack_gpr;
+    std::bitset<iREGCNT_XMM> stack_xmm;
+
 	u8* thunk = recBeginThunk();
 
 	// save regs
-	u32 num_gprs = 0;
-	u32 num_fprs = 0;
+	u32 i, stack_offset;
+    u32 num_gprs = 0, num_fprs = 0;
 
-	for (u32 i = 0; i < iREGCNT_GPR; i++)
+	for (i = 0; i < iREGCNT_GPR; ++i)
 	{
-        if ((gpr_bitmask & (1u << i)) && armIsCallerSaved(i) && (!is_load || is_xmm || data_register != i))
-			num_gprs++;
+        if ((gpr_bitmask & (1u << i)) && armIsCallerSaved(i) && (!is_load || is_xmm || data_register != i)) {
+            num_gprs++;
+            stack_gpr.set(i);
+        }
 	}
-	for (u32 i = 0; i < iREGCNT_XMM; i++)
+	for (i = 0; i < iREGCNT_XMM; ++i)
 	{
-		if (fpr_bitmask & (1u << i) && armIsCallerSavedXmm(i) && (!is_load || !is_xmm || data_register != i))
-			num_fprs++;
+		if (fpr_bitmask & (1u << i) && armIsCallerSavedXmm(i) && (!is_load || !is_xmm || data_register != i)) {
+            num_fprs++;
+            stack_xmm.set(i);
+        }
 	}
 
 	const u32 stack_size = (((num_gprs + 1) & ~1u) * GPR_SIZE) + (num_fprs * XMM_SIZE) + SHADOW_SIZE;
@@ -1091,26 +1098,26 @@ void vtlb_DynBackpatchLoadStore(uptr code_address, u32 code_size, u32 guest_pc,
 //		xSUB(rsp, stack_size);
         armAsm->Sub(a64::sp, a64::sp, stack_size);
 
-		u32 stack_offset = SHADOW_SIZE;
-		for (u32 i = 0; i < iREGCNT_XMM; i++)
-		{
-			if (fpr_bitmask & (1u << i) && armIsCallerSavedXmm(i) && (!is_load || !is_xmm || data_register != i))
-			{
+		stack_offset = SHADOW_SIZE;
+        for (i = 0; i < iREGCNT_XMM; ++i)
+        {
+            if(stack_xmm[i])
+            {
 //				xMOVAPS(ptr128[rsp + stack_offset], xRegisterSSE(i));
-                armAsm->Str(a64::QRegister(i).Q(), a64::MemOperand(a64::sp, stack_offset));
-				stack_offset += XMM_SIZE;
-			}
-		}
-
-		for (u32 i = 0; i < iREGCNT_GPR; i++)
-		{
-            if ((gpr_bitmask & (1u << i)) && armIsCallerSaved(i) && (!is_load || is_xmm || data_register != i))
-			{
+                armAsm->Str(a64::DRegister(i), a64::MemOperand(a64::sp, stack_offset));
+                stack_offset += XMM_SIZE;
+            }
+        }
+        ////
+        for (i = 0; i < iREGCNT_GPR; ++i)
+        {
+            if(stack_gpr[i])
+            {
 //				xMOV(ptr64[rsp + stack_offset], xRegister64(i));
                 armAsm->Str(a64::XRegister(i), a64::MemOperand(a64::sp, stack_offset));
-				stack_offset += GPR_SIZE;
-			}
-		}
+                stack_offset += GPR_SIZE;
+            }
+        }
 	}
 
 	if (is_load)
@@ -1180,20 +1187,20 @@ void vtlb_DynBackpatchLoadStore(uptr code_address, u32 code_size, u32 guest_pc,
 	// restore regs
 	if (stack_size > 0)
 	{
-		u32 stack_offset = SHADOW_SIZE;
-		for (u32 i = 0; i < iREGCNT_XMM; i++)
+		stack_offset = SHADOW_SIZE;
+		for (i = 0; i < iREGCNT_XMM; ++i)
 		{
-			if (fpr_bitmask & (1u << i) && armIsCallerSavedXmm(i) && (!is_load || !is_xmm || data_register != i))
+            if(stack_xmm[i])
 			{
 //				xMOVAPS(xRegisterSSE(i), ptr128[rsp + stack_offset]);
-                armAsm->Ldr(a64::QRegister(i).Q(), a64::MemOperand(a64::sp, stack_offset));
+                armAsm->Ldr(a64::DRegister(i), a64::MemOperand(a64::sp, stack_offset));
 				stack_offset += XMM_SIZE;
 			}
 		}
-
-		for (u32 i = 0; i < iREGCNT_GPR; i++)
+        ////
+		for (i = 0; i < iREGCNT_GPR; ++i)
 		{
-            if ((gpr_bitmask & (1u << i)) && armIsCallerSaved(i) && (!is_load || is_xmm || data_register != i))
+            if(stack_gpr[i])
 			{
 //				xMOV(xRegister64(i), ptr64[rsp + stack_offset]);
                 armAsm->Ldr(a64::XRegister(i), a64::MemOperand(a64::sp, stack_offset));
diff --git a/app/src/main/cpp/pcsx2/x86/microVU_Misc.inl b/app/src/main/cpp/pcsx2/x86/microVU_Misc.inl
index f455934..d0d5ec7 100644
--- a/app/src/main/cpp/pcsx2/x86/microVU_Misc.inl
+++ b/app/src/main/cpp/pcsx2/x86/microVU_Misc.inl
@@ -255,8 +255,8 @@ __fi void mVUbackupRegs(microVU& mVU, bool toMemory = false, bool onlyNeeded = f
 {
     if (toMemory)
     {
-        int i;
-        for (i = 0; i < static_cast<int>(iREGCNT_GPR); ++i)
+        int i, e = iREGCNT_GPR;
+        for (i = 0; i < e; ++i)
         {
             if (!armIsCallerSaved(i) || i == 4)
                 continue;
@@ -268,7 +268,8 @@ __fi void mVUbackupRegs(microVU& mVU, bool toMemory = false, bool onlyNeeded = f
 
         ////
 
-        for (i = 0; i < static_cast<int>(iREGCNT_XMM); ++i)
+        e = iREGCNT_XMM;
+        for (i = 0; i < e; ++i)
         {
             if (!armIsCallerSavedXmm(i))
                 continue;
@@ -292,8 +293,8 @@ __fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false, bool onlyNeeded
 {
     if (fromMemory)
     {
-        int i;
-        for (i = static_cast<int>(iREGCNT_XMM - 1); i >= 0; --i)
+        int i, e = iREGCNT_XMM - 1;
+        for (i = e; i >= 0; --i)
         {
             if (!armIsCallerSavedXmm(i))
                 continue;
@@ -303,7 +304,10 @@ __fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false, bool onlyNeeded
             }
         }
 
-        for (i = static_cast<int>(iREGCNT_GPR - 1); i >= 0; --i)
+        ////
+
+        e = iREGCNT_GPR - 1;
+        for (i = e; i >= 0; --i)
         {
             if (!armIsCallerSaved(i)  || i == 4)
                 continue;