diff --git a/app/src/main/cpp/pcsx2/arm64/VixlHelpers.h b/app/src/main/cpp/pcsx2/arm64/VixlHelpers.h index 2985666..f86bf47 100644 --- a/app/src/main/cpp/pcsx2/arm64/VixlHelpers.h +++ b/app/src/main/cpp/pcsx2/arm64/VixlHelpers.h @@ -58,6 +58,7 @@ namespace a64 = vixl::aarch64; // fastmem #define RFASTMEMBASE a64::x25 +// iopMem->Main #define RSTATE_x26 a64::x26 // CPU(iR5900), PSX(iR3000A), FPU(iFPU, iFPUd) @@ -69,7 +70,7 @@ namespace a64 = vixl::aarch64; #define RSTATE_MVU a64::x28 #define PTR_MVU(field) a64::MemOperand(RSTATE_MVU, offsetof(vuRegistersPack, field)) -// iopMem->Main +// recLUT, psxRecLUT #define RSTATE_x29 a64::x29 // eeHw[Ps2MemSize::Hardware] diff --git a/app/src/main/cpp/pcsx2/arm64/cpuRegistersPack.h b/app/src/main/cpp/pcsx2/arm64/cpuRegistersPack.h index 7c0c4a4..d8f38a2 100644 --- a/app/src/main/cpp/pcsx2/arm64/cpuRegistersPack.h +++ b/app/src/main/cpp/pcsx2/arm64/cpuRegistersPack.h @@ -10,7 +10,7 @@ #include "R3000ADef.h" #include "VUDef.h" #include "vtlbDef.h" -#include "arm64/ShuffleLanes.h" +#include "ShuffleLanes.h" struct cpuRegistersPack { diff --git a/app/src/main/cpp/pcsx2/x86/BaseblockEx.h b/app/src/main/cpp/pcsx2/x86/BaseblockEx.h index 002ae6f..06b0d48 100644 --- a/app/src/main/cpp/pcsx2/x86/BaseblockEx.h +++ b/app/src/main/cpp/pcsx2/x86/BaseblockEx.h @@ -229,7 +229,7 @@ public: } }; -#define PC_GETBLOCK_(x, reclut) ((BASEBLOCK*)(reclut[((u32)(x)) >> 16] + (x) * (sizeof(BASEBLOCK) / 4))) +#define PC_GETBLOCK_(x, reclut) ((BASEBLOCK*)(reclut[((u32)(x)) >> 16] + (x) * (sizeof(BASEBLOCK) >> 2))) // (sizeof(BASEBLOCK) / 4) /** * Add a page to the recompiler lookup table diff --git a/app/src/main/cpp/pcsx2/x86/iCOP0.cpp b/app/src/main/cpp/pcsx2/x86/iCOP0.cpp index 233982a..3bdc914 100644 --- a/app/src/main/cpp/pcsx2/x86/iCOP0.cpp +++ b/app/src/main/cpp/pcsx2/x86/iCOP0.cpp @@ -42,15 +42,13 @@ static void _setupBranchTest() // everything except the lower 10 bits away. // xMOV(eax, ptr[(&psHu32(DMAC_PCR))]); - armAsm->Ldr(RWVIXLSCRATCH, a64::MemOperand(RSTATE_x26, psHu(DMAC_PCR))); - armAsm->Uxtw(EAX, RWVIXLSCRATCH); + armAsm->Mov(EAX, psHu32(DMAC_PCR)); // xMOV(ecx, 0x3ff); // ECX is our 10-bit mask var armAsm->Mov(ECX, 0x3ff); // xNOT(eax); armAsm->Mvn(EAX, EAX); // xOR(eax, ptr[(&psHu32(DMAC_STAT))]); - armAsm->Ldr(RWVIXLSCRATCH, a64::MemOperand(RSTATE_x26, psHu(DMAC_STAT))); - armAsm->Orr(EAX, EAX, a64::Operand(RWVIXLSCRATCH, a64::Extend::UXTW)); + armAsm->Orr(EAX, EAX, armLoadPtr(&psHu32(DMAC_STAT))); // xAND(eax, ecx); armAsm->And(EAX, EAX, ECX); // xCMP(eax, ecx); diff --git a/app/src/main/cpp/pcsx2/x86/iR3000A.cpp b/app/src/main/cpp/pcsx2/x86/iR3000A.cpp index 25130d7..c0209b6 100644 --- a/app/src/main/cpp/pcsx2/x86/iR3000A.cpp +++ b/app/src/main/cpp/pcsx2/x86/iR3000A.cpp @@ -183,13 +183,13 @@ static const void* _DynGen_JITCompile() // xJMP(ptrNative[rbx * (wordsize / 4) + rcx]); armLoad(EAX, PTR_CPU(psxRegs.pc)); - armAsm->Lsr(ECX, EAX, 16); - armAsm->Lsr(EAX, EAX, 2); -// armMoveAddressToReg(RDX, &psxRecLUT); - armAsm->Mov(RDX, (uptr)&psxRecLUT); - armAsm->Ldr(RCX, a64::MemOperand(RDX, RCX, a64::LSL, 3)); //// + armAsm->Lsr(ECX, EAX, 16); + armAsm->Ldr(RCX, a64::MemOperand(RSTATE_x29, RCX, a64::LSL, 3)); + //// + armAsm->Lsr(EAX, EAX, 2); armAsm->Ldr(RAX, a64::MemOperand(RCX, RAX, a64::LSL, 3)); + //// armAsm->Br(RAX); return retval; @@ -208,13 +208,13 @@ static const void* _DynGen_DispatcherReg() // xJMP(ptrNative[rbx * (wordsize / 4) + rcx]); armLoad(EAX, PTR_CPU(psxRegs.pc)); - armAsm->Lsr(ECX, EAX, 16); - armAsm->Lsr(EAX, EAX, 2); -// armMoveAddressToReg(RDX, &psxRecLUT); - armAsm->Mov(RDX, (uptr)&psxRecLUT); - armAsm->Ldr(RCX, a64::MemOperand(RDX, RCX, a64::LSL, 3)); //// + armAsm->Lsr(ECX, EAX, 16); + armAsm->Ldr(RCX, a64::MemOperand(RSTATE_x29, RCX, a64::LSL, 3)); + //// + armAsm->Lsr(EAX, EAX, 2); armAsm->Ldr(RAX, a64::MemOperand(RCX, RAX, a64::LSL, 3)); + //// armAsm->Br(RAX); return retval; @@ -239,8 +239,8 @@ static const void* _DynGen_EnterRecompiledCode() // xScopedStackFrame frame(false, true); armBeginStackFrame(); #endif - armMoveAddressToReg(RSTATE_x29, iopMem->Main); -// armAsm->Mov(RSTATE_CPU, (uptr)&g_cpuRegistersPack); + armMoveAddressToReg(RSTATE_x26, iopMem->Main); + armMoveAddressToReg(RSTATE_x29, &psxRecLUT); // xJMP((void*)iopDispatcherReg); armEmitJmp(iopDispatcherReg); diff --git a/app/src/main/cpp/pcsx2/x86/iR3000Atables.cpp b/app/src/main/cpp/pcsx2/x86/iR3000Atables.cpp index f8b9791..28fec30 100644 --- a/app/src/main/cpp/pcsx2/x86/iR3000Atables.cpp +++ b/app/src/main/cpp/pcsx2/x86/iR3000Atables.cpp @@ -1403,7 +1403,7 @@ static void rpsxLoad(int size, bool sign) armAsm->And(EAX, EAX, 0x1fffff); // auto addr = xComplexAddress(rax, iopMem->Main, arg1reg); - const auto addr = a64::MemOperand(RSTATE_x29, RAX); + const auto addr = a64::MemOperand(RSTATE_x26, RAX); switch (size) { case 8: diff --git a/app/src/main/cpp/pcsx2/x86/ix86-32/iR5900.cpp b/app/src/main/cpp/pcsx2/x86/ix86-32/iR5900.cpp index f2331ac..b5cc385 100644 --- a/app/src/main/cpp/pcsx2/x86/ix86-32/iR5900.cpp +++ b/app/src/main/cpp/pcsx2/x86/ix86-32/iR5900.cpp @@ -412,13 +412,13 @@ static const void* _DynGen_JITCompile() // xJMP(ptrNative[rbx * (wordsize / 4) + rcx]); armLoad(EAX, PTR_CPU(cpuRegs.pc)); - armAsm->Lsr(ECX, EAX, 16); - armAsm->Lsr(EAX, EAX, 2); -// armMoveAddressToReg(RDX, &recLUT); - armAsm->Mov(RDX, (uptr)&recLUT); - armAsm->Ldr(RCX, a64::MemOperand(RDX, RCX, a64::LSL, 3)); //// + armAsm->Lsr(ECX, EAX, 16); + armAsm->Ldr(RCX, a64::MemOperand(RSTATE_x29, RCX, a64::LSL, 3)); + //// + armAsm->Lsr(EAX, EAX, 2); armAsm->Ldr(RAX, a64::MemOperand(RCX, RAX, a64::LSL, 3)); + //// armAsm->Br(RAX); return retval; @@ -441,13 +441,13 @@ static const void* _DynGen_DispatcherReg() // xJMP(ptrNative[rbx * (wordsize / 4) + rcx]); armLoad(EAX, PTR_CPU(cpuRegs.pc)); - armAsm->Lsr(ECX, EAX, 16); - armAsm->Lsr(EAX, EAX, 2); -// armMoveAddressToReg(RDX, &recLUT); - armAsm->Mov(RDX, (uptr)&recLUT); - armAsm->Ldr(RCX, a64::MemOperand(RDX, RCX, a64::LSL, 3)); //// + armAsm->Lsr(ECX, EAX, 16); + armAsm->Ldr(RCX, a64::MemOperand(RSTATE_x29, RCX, a64::LSL, 3)); + //// + armAsm->Lsr(EAX, EAX, 2); armAsm->Ldr(RAX, a64::MemOperand(RCX, RAX, a64::LSL, 3)); + //// armAsm->Br(RAX); return retval; @@ -492,7 +492,7 @@ static const void* _DynGen_EnterRecompiledCode() // From memory to registry armMoveAddressToReg(RSTATE_PSX, &psxRegs); armMoveAddressToReg(RSTATE_CPU, &g_cpuRegistersPack); - armMoveAddressToReg(RSTATE_x26, &eeHw); + armMoveAddressToReg(RSTATE_x29, &recLUT); if (CHECK_FASTMEM) { // xMOV(RFASTMEMBASE, ptrNative[&vtlb_private::vtlbdata.fastmem_base]); diff --git a/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp b/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp index 6834f62..755f7bc 100644 --- a/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp +++ b/app/src/main/cpp/pcsx2/x86/ix86-32/recVTLB.cpp @@ -600,7 +600,7 @@ int vtlb_DynGenReadNonQuad_Const(u32 bits, bool sign, bool xmm, u32 addr_const, // Shortcut for the INTC_STAT register, which many games like to spin on heavily. if ((bits == 32) && !EmuConfig.Speedhacks.IntcStat && (paddr == INTC_STAT)) { - armAsm->Ldr(RWVIXLSCRATCH, a64::MemOperand(RSTATE_x26, psHu(INTC_STAT))); + auto mop = armMemOperandPtr(&psHu32(INTC_STAT)); // x86_dest_reg = dest_reg_alloc ? dest_reg_alloc() : (_freeX86reg(eax), eax.GetId()); x86_dest_reg = dest_reg_alloc ? dest_reg_alloc() : (_freeX86reg(EAX), EAX.GetCode()); @@ -609,18 +609,17 @@ int vtlb_DynGenReadNonQuad_Const(u32 bits, bool sign, bool xmm, u32 addr_const, auto regX = a64::XRegister(x86_dest_reg); if (sign) { // xMOVSX(xRegister64(x86_dest_reg), ptr32[&psHu32(INTC_STAT)]); - armAsm->Sxtw(regX, RWVIXLSCRATCH); + armAsm->Ldr(regX, mop); } else { // xMOV(xRegister32(x86_dest_reg), ptr32[&psHu32(INTC_STAT)]); - armAsm->Uxtw(regX.W(), RWVIXLSCRATCH); + armAsm->Ldr(regX.W(), mop); } } else { // xMOVDZX(xRegisterSSE(x86_dest_reg), ptr32[&psHu32(INTC_STAT)]); - armAsm->Uxtw(RWVIXLSCRATCH, RWVIXLSCRATCH); - armAsm->Fmov(a64::QRegister(x86_dest_reg).S(), RWVIXLSCRATCH); + armAsm->Ldr(a64::QRegister(x86_dest_reg).S(), mop); } } else