import re import os from file_util import FileUtil # Possible TODO: Move generating assets.s into a seperate python script. LD_NAME = 'dkr.ld' ASM_DIR = './asm' SRC_DIR = './src' ASSETS_S_FILENAME = './asm/assets/assets.s' ASSETS_UCODE_S_FILENAME = './asm/assets/ucode.s' ASSETS_DIR = './assets/us_1.0' ASSETS_START = 0x0D8200 class LD: def __init__(self, file): print('Generating linker file...') self.generate_assets_file() self.files = self.get_code_files() self.indentLevel = 0 self.file = file self.gen_comment('linker script generated by generate_ld.py') self.gen_newline() self.gen_line('OUTPUT_ARCH (mips)') self.gen_newline() #self.gen_macros() self.gen_sections() print('New linker file created!') def gen_macros(self): self.gen_line('#define BEGIN_SEG(name, addr) \\') self.increase_indent() self.gen_line('_##name##SegmentStart = ADDR(.name); \\') self.gen_line('_##name##SegmentRomStart = __romPos; \\') self.gen_line('.name addr : AT(__romPos)') self.decrease_indent() self.gen_newline() self.gen_line('#define END_SEG(name) \\') self.increase_indent() self.gen_line('_##name##SegmentEnd = ADDR(.name) + SIZEOF(.name); \\') self.gen_line('_##name##SegmentRomEnd = __romPos + SIZEOF(.name); \\') self.gen_line('__romPos += SIZEOF(.name);') self.decrease_indent() self.gen_newline() def gen_sections(self): self.gen_line('SECTIONS') self.gen_open_block() self.gen_line('romPos = 0x0;') self.gen_boot_section() self.gen_main_section() self.gen_ucode_section() self.gen_data_section() self.gen_assets_section() self.gen_discard() self.gen_close_block() def gen_boot_section(self): self.gen_line('.boot 0 : AT(romPos)') self.gen_open_block() self.gen_line('build/asm/boot/rom_header.o(.text);') self.gen_line('build/asm/boot/rom_boot.o(.text);') self.gen_close_block() self.gen_line('romPos += SIZEOF(.boot);') self.gen_newline() def gen_main_section(self): self.gen_line('.main 0x80000400 : AT(romPos) SUBALIGN(16)') self.gen_open_block() for asmFile in self.files: self.gen_line(asmFile[0] + '(.text);') self.gen_close_block() self.gen_line('romPos += SIZEOF(.main);') self.gen_newline() def gen_ucode_section(self): self.gen_line('.ucode 0 : AT(romPos)') self.gen_open_block() self.gen_line('build/asm/assets/ucode.o(.text);') self.gen_close_block() self.gen_line('romPos += SIZEOF(.ucode);') self.gen_newline() def gen_data_section(self): self.gen_line('.main_data 0x80000400 : AT(romPos) SUBALIGN(16)') self.gen_open_block() self.gen_line('build/data/dkr.data.o(.data);') self.gen_close_block() self.gen_line('romPos += SIZEOF(.main_data);') self.gen_newline() def gen_assets_section(self): self.gen_line('.assets 0 : AT(romPos)') self.gen_open_block() self.gen_line('build/asm/assets/assets.o(.text);') self.gen_close_block() self.gen_line('romPos += SIZEOF(.assets);') self.gen_newline() def gen_discard(self): self.gen_comment('Discard everything not specifically mentioned above.') self.gen_line('/DISCARD/ :') self.gen_open_block() self.gen_line('*(*);') self.gen_close_block() def increase_indent(self): self.indentLevel += 1 def decrease_indent(self): self.indentLevel -= 1 def gen_open_block(self): self.gen_line('{') self.increase_indent() def gen_close_block(self): self.decrease_indent() self.gen_line('}') def gen_line(self, text): spaces = 4 * self.indentLevel while spaces > 0: self.file.write(' ') spaces -= 1 self.file.write(text) self.gen_newline() def gen_comment(self, text): spaces = 4 * self.indentLevel while spaces > 0: self.file.write(' ') spaces -= 1 self.file.write('/* ' + text + ' */') self.gen_newline() def gen_newline(self): self.file.write('\n') def get_code_files(self): files = [] asmFilenames = FileUtil.get_filenames_from_directory(ASM_DIR, ('.s',)) regex = r'[\/][*]\s*([0-9A-Fa-f]{6})\s*([0-9A-Fa-f]{8})\s*([0-9A-Fa-f]{8})\s*[*][\/]' for filename in asmFilenames: with open(ASM_DIR + '/' + filename, 'r') as asmFile: notDone = True line = asmFile.readline() while line: matches = re.match(regex, line) if matches is None: line = asmFile.readline() continue matchedGroups = matches.groups() files.append(('build/asm/' + filename[:-2] + '.o', matchedGroups[0], matchedGroups[1], 1)) break srcFilenames = FileUtil.get_filenames_from_directory_recursive(SRC_DIR, ('.c','.2')) regex = r'[\/][*]+\s*RAM_POS:\s*0x([0-9a-fA-F]+)\s*[*]+[\/]' for filename in srcFilenames: with open(SRC_DIR + '/' + filename, 'r') as srcFile: notDone = True line = srcFile.readline() while line: matches = re.match(regex, line) if matches is None: line = srcFile.readline() continue matchedGroups = matches.groups() files.append(('build/src/' + filename[:-2] + '.o', '', matchedGroups[0], 0)) break files.sort(key = lambda x: (x[2], x[3])) # Sort tuples by RAM address and prioritize src files first. return files def get_asset_files(self): assetFiles = [] assetFilenames = FileUtil.getListOfFiles(ASSETS_DIR) regex = r'[.][\/]assets[\/][^\/]*[\/]([^\/]*[\/][^.]*)[.](([.]?[^.]*)+)([.][A-Za-z0-9_]*)' for filename in assetFilenames: matches = re.match(regex, filename) if matches is None: raise Exception('Invalid filename: \"' + filename + '"') matchedGroups = matches.groups() isMicrocode = False if matchedGroups[0].startswith('ucode/ucode_'): isMicrocode = True fileExtension = matchedGroups[3] fileProperties = matchedGroups[1].split('.') ramAddress = fileProperties[0] if fileExtension == '.cbin' or fileExtension == '.ebin': outFileExtension = fileExtension else: outFileExtension = '.bin' outFilename = 'build/' + matchedGroups[0] + '.' + matchedGroups[1] + outFileExtension if int(ramAddress, 16) >= ASSETS_START: assetFiles.append((outFilename, ramAddress, fileExtension, isMicrocode)) assetFiles.sort(key = lambda x: x[1]) # Sort tuples by RAM address return assetFiles def generate_assets_file(self): assets = self.get_asset_files() assetsText = '# This file was generated by generate_ld.py\n\n' assetsText += '.macro .incbinaligned filename\n .balign 16\n .incbin "\\filename"\n.endm\n\n' assetsUCodeText = '# This file was generated by generate_ld.py\n\n' prevAssetMadeAlignment = False for asset in assets: if 'lut' in asset[0]: #assetsText += '.balign 16\n' prevAssetMadeAlignment = True if prevAssetMadeAlignment: assetsText += '.incbinaligned "./' + asset[0] + '"\n' else: if asset[3]: assetsUCodeText += '.incbin "./' + asset[0] + '"\n' else: assetsText += '.incbin "./' + asset[0] + '"\n' if asset[2] == '.png' or asset[2] == '.cbin' or 'lut' in asset[0]: # Make sure that compressed data ends on a 16-byte boundary #assetsText += '.balign 16\n' prevAssetMadeAlignment = True else: prevAssetMadeAlignment = False with open(ASSETS_S_FILENAME, "w") as assetsFile: assetsFile.write(assetsText) with open(ASSETS_UCODE_S_FILENAME, "w") as assetsFile: assetsFile.write(assetsUCodeText) with open(LD_NAME, 'w') as ldFile: LD(ldFile)