diff --git a/Makefile b/Makefile index ffa57d54..21829ac6 100755 --- a/Makefile +++ b/Makefile @@ -257,6 +257,7 @@ $(BUILD_DIR)/lib/src/unknown_0D5EC0.o: OPT_FLAGS := -O1 $(BUILD_DIR)/lib/src/unknown_0C9C90.o: OPT_FLAGS := -O2 -Wo,-loopunroll,0 $(BUILD_DIR)/lib/src/osCreateThread.o : OPT_FLAGS := -O1 $(BUILD_DIR)/lib/src/osGetThreadPri.o : OPT_FLAGS := -O1 +$(BUILD_DIR)/lib/src/osGetTime.o : OPT_FLAGS := -O1 $(BUILD_DIR)/lib/src/osJamMesg.o : OPT_FLAGS := -O1 $(BUILD_DIR)/lib/src/osPfsFreeBlocks.o: OPT_FLAGS := -O1 $(BUILD_DIR)/lib/src/osPiGetCmdQueue.o : OPT_FLAGS := -O1 diff --git a/asm/non_matchings/unknown_071730/func_80070B30.s b/asm/non_matchings/unknown_071730/func_80070B30.s deleted file mode 100644 index fcdf1ab4..00000000 --- a/asm/non_matchings/unknown_071730/func_80070B30.s +++ /dev/null @@ -1,20 +0,0 @@ -glabel func_80070B30 -/* 071730 80070B30 27BDFFE8 */ addiu $sp, $sp, -0x18 -/* 071734 80070B34 3C048013 */ lui $a0, %hi(D_8012D3F0) # $a0, 0x8013 -/* 071738 80070B38 AFBF0014 */ sw $ra, 0x14($sp) -/* 07173C 80070B3C 240EFFFF */ li $t6, -1 -/* 071740 80070B40 3C018012 */ lui $at, %hi(D_801235C0) # $at, 0x8012 -/* 071744 80070B44 2484D3F0 */ addiu $a0, %lo(D_8012D3F0) # addiu $a0, $a0, -0x2c10 -/* 071748 80070B48 3C0F8040 */ lui $t7, 0x8040 -/* 07174C 80070B4C AC2E35C0 */ sw $t6, %lo(D_801235C0)($at) -/* 071750 80070B50 01E42823 */ subu $a1, $t7, $a0 -/* 071754 80070B54 0C01C2F9 */ jal func_80070BE4 -/* 071758 80070B58 24060640 */ li $a2, 1600 -/* 07175C 80070B5C 0C01C42C */ jal func_800710B0 -/* 071760 80070B60 24040002 */ li $a0, 2 -/* 071764 80070B64 8FBF0014 */ lw $ra, 0x14($sp) -/* 071768 80070B68 3C018012 */ lui $at, %hi(D_80123DC8) # $at, 0x8012 -/* 07176C 80070B6C AC203DC8 */ sw $zero, %lo(D_80123DC8)($at) -/* 071770 80070B70 03E00008 */ jr $ra -/* 071774 80070B74 27BD0018 */ addiu $sp, $sp, 0x18 - diff --git a/asm/non_matchings/unknown_071730/func_80070B78.s b/asm/non_matchings/unknown_071730/func_80070B78.s deleted file mode 100644 index 2d9e5046..00000000 --- a/asm/non_matchings/unknown_071730/func_80070B78.s +++ /dev/null @@ -1,29 +0,0 @@ -glabel func_80070B78 -/* 071778 80070B78 27BDFFD0 */ addiu $sp, $sp, -0x30 -/* 07177C 80070B7C AFBF0014 */ sw $ra, 0x14($sp) -/* 071780 80070B80 AFA40030 */ sw $a0, 0x30($sp) -/* 071784 80070B84 0C01BD44 */ jal func_8006F510 -/* 071788 80070B88 AFA50034 */ sw $a1, 0x34($sp) -/* 07178C 80070B8C 8FAF0034 */ lw $t7, 0x34($sp) -/* 071790 80070B90 8FAE0030 */ lw $t6, 0x30($sp) -/* 071794 80070B94 000FC080 */ sll $t8, $t7, 2 -/* 071798 80070B98 030FC021 */ addu $t8, $t8, $t7 -/* 07179C 80070B9C 0018C080 */ sll $t8, $t8, 2 -/* 0717A0 80070BA0 01D83821 */ addu $a3, $t6, $t8 -/* 0717A4 80070BA4 AFA20020 */ sw $v0, 0x20($sp) -/* 0717A8 80070BA8 00E02025 */ move $a0, $a3 -/* 0717AC 80070BAC AFA70018 */ sw $a3, 0x18($sp) -/* 0717B0 80070BB0 0C01C327 */ jal func_80070C9C -/* 0717B4 80070BB4 2405FFFF */ li $a1, -1 -/* 0717B8 80070BB8 8FA50018 */ lw $a1, 0x18($sp) -/* 0717BC 80070BBC 8FA60034 */ lw $a2, 0x34($sp) -/* 0717C0 80070BC0 0C01C2F9 */ jal func_80070BE4 -/* 0717C4 80070BC4 00402025 */ move $a0, $v0 -/* 0717C8 80070BC8 8FA40020 */ lw $a0, 0x20($sp) -/* 0717CC 80070BCC 0C01BD4F */ jal func_8006F53C -/* 0717D0 80070BD0 AFA2001C */ sw $v0, 0x1c($sp) -/* 0717D4 80070BD4 8FBF0014 */ lw $ra, 0x14($sp) -/* 0717D8 80070BD8 8FA2001C */ lw $v0, 0x1c($sp) -/* 0717DC 80070BDC 03E00008 */ jr $ra -/* 0717E0 80070BE0 27BD0030 */ addiu $sp, $sp, 0x30 - diff --git a/asm/non_matchings/unknown_079F50/__scMain.s b/asm/non_matchings/unknown_079F50/__scMain.s index e5407ca5..66cab200 100644 --- a/asm/non_matchings/unknown_079F50/__scMain.s +++ b/asm/non_matchings/unknown_079F50/__scMain.s @@ -50,7 +50,7 @@ glabel __scMain /* 07A260 80079660 1000FFE8 */ b .L80079604 /* 07A264 80079664 02602025 */ move $a0, $s3 .L80079668: -/* 07A268 80079668 0C01E757 */ jal func_80079D5C +/* 07A268 80079668 0C01E757 */ jal __scHandleRDP /* 07A26C 8007966C 02402025 */ move $a0, $s2 /* 07A270 80079670 1000FFE4 */ b .L80079604 /* 07A274 80079674 02602025 */ move $a0, $s3 @@ -77,7 +77,7 @@ glabel __scMain /* 07A2BC 800796BC 02602025 */ move $a0, $s3 /* 07A2C0 800796C0 8FA50064 */ lw $a1, 0x64($sp) .L800796C4: -/* 07A2C4 800796C4 0C01E7D0 */ jal func_80079F40 +/* 07A2C4 800796C4 0C01E7D0 */ jal __scAppendList /* 07A2C8 800796C8 02402025 */ move $a0, $s2 /* 07A2CC 800796CC 8E4F0274 */ lw $t7, 0x274($s2) /* 07A2D0 800796D0 8E480278 */ lw $t0, 0x278($s2) @@ -88,7 +88,7 @@ glabel __scMain /* 07A2E4 800796E4 02003825 */ move $a3, $s0 /* 07A2E8 800796E8 02402025 */ move $a0, $s2 /* 07A2EC 800796EC 27A50054 */ addiu $a1, $sp, 0x54 -/* 07A2F0 800796F0 0C01E835 */ jal func_8007A0D4 +/* 07A2F0 800796F0 0C01E835 */ jal __scSchedule /* 07A2F4 800796F4 27A60050 */ addiu $a2, $sp, 0x50 /* 07A2F8 800796F8 1050FFC2 */ beq $v0, $s0, .L80079604 /* 07A2FC 800796FC 02602025 */ move $a0, $s3 diff --git a/asm/non_matchings/unknown_079F50/func_8007A0D4.s b/asm/non_matchings/unknown_079F50/__scSchedule.s similarity index 98% rename from asm/non_matchings/unknown_079F50/func_8007A0D4.s rename to asm/non_matchings/unknown_079F50/__scSchedule.s index d76654bc..d400f3b9 100644 --- a/asm/non_matchings/unknown_079F50/func_8007A0D4.s +++ b/asm/non_matchings/unknown_079F50/__scSchedule.s @@ -1,4 +1,4 @@ -glabel func_8007A0D4 +glabel __scSchedule /* 07ACD4 8007A0D4 27BDFFD8 */ addiu $sp, $sp, -0x28 /* 07ACD8 8007A0D8 AFB10018 */ sw $s1, 0x18($sp) /* 07ACDC 8007A0DC 00808825 */ move $s1, $a0 @@ -39,7 +39,7 @@ glabel func_8007A0D4 /* 07AD58 8007A158 AFA30024 */ sw $v1, 0x24($sp) /* 07AD5C 8007A15C AFA5002C */ sw $a1, 0x2c($sp) /* 07AD60 8007A160 AFA60030 */ sw $a2, 0x30($sp) -/* 07AD64 8007A164 0C01E77A */ jal func_80079DE8 +/* 07AD64 8007A164 0C01E77A */ jal __scTaskReady /* 07AD68 8007A168 AFA70034 */ sw $a3, 0x34($sp) /* 07AD6C 8007A16C 8FA30024 */ lw $v1, 0x24($sp) /* 07AD70 8007A170 8FA5002C */ lw $a1, 0x2c($sp) diff --git a/asm/non_matchings/unknown_079F50/func_80079E40.s b/asm/non_matchings/unknown_079F50/__scTaskComplete.s similarity index 99% rename from asm/non_matchings/unknown_079F50/func_80079E40.s rename to asm/non_matchings/unknown_079F50/__scTaskComplete.s index 6c5e4d21..3f8b23cf 100644 --- a/asm/non_matchings/unknown_079F50/func_80079E40.s +++ b/asm/non_matchings/unknown_079F50/__scTaskComplete.s @@ -1,4 +1,4 @@ -glabel func_80079E40 +glabel __scTaskComplete /* 07AA40 80079E40 27BDFFE8 */ addiu $sp, $sp, -0x18 /* 07AA44 80079E44 AFBF0014 */ sw $ra, 0x14($sp) /* 07AA48 80079E48 AFA40018 */ sw $a0, 0x18($sp) diff --git a/asm/non_matchings/unknown_079F50/func_80079760.s b/asm/non_matchings/unknown_079F50/func_80079760.s index 4da59d4d..68c548e5 100644 --- a/asm/non_matchings/unknown_079F50/func_80079760.s +++ b/asm/non_matchings/unknown_079F50/func_80079760.s @@ -29,7 +29,7 @@ glabel func_80079760 /* 07A3C4 800797C4 2D6C0001 */ sltiu $t4, $t3, 1 /* 07A3C8 800797C8 014C3825 */ or $a3, $t2, $t4 /* 07A3CC 800797CC AFA70024 */ sw $a3, 0x24($sp) -/* 07A3D0 800797D0 0C01E835 */ jal func_8007A0D4 +/* 07A3D0 800797D0 0C01E835 */ jal __scSchedule /* 07A3D4 800797D4 AFA40028 */ sw $a0, 0x28($sp) /* 07A3D8 800797D8 8FA70024 */ lw $a3, 0x24($sp) /* 07A3DC 800797DC 8FA40028 */ lw $a0, 0x28($sp) diff --git a/asm/non_matchings/unknown_079F50/func_80079818.s b/asm/non_matchings/unknown_079F50/func_80079818.s index 2d1108b3..6762e0ac 100644 --- a/asm/non_matchings/unknown_079F50/func_80079818.s +++ b/asm/non_matchings/unknown_079F50/func_80079818.s @@ -98,7 +98,7 @@ glabel func_80079818 /* 07A574 80079974 00000000 */ nop /* 07A578 80079978 8FA50044 */ lw $a1, 0x44($sp) .L8007997C: -/* 07A57C 8007997C 0C01E7D0 */ jal func_80079F40 +/* 07A57C 8007997C 0C01E7D0 */ jal __scAppendList /* 07A580 80079980 02202025 */ move $a0, $s1 /* 07A584 80079984 8FA40028 */ lw $a0, 0x28($sp) /* 07A588 80079988 27A50044 */ addiu $a1, $sp, 0x44 @@ -116,7 +116,7 @@ glabel func_80079818 /* 07A5B4 800799B4 02003825 */ move $a3, $s0 /* 07A5B8 800799B8 02202025 */ move $a0, $s1 /* 07A5BC 800799BC 27A50038 */ addiu $a1, $sp, 0x38 -/* 07A5C0 800799C0 0C01E835 */ jal func_8007A0D4 +/* 07A5C0 800799C0 0C01E835 */ jal __scSchedule /* 07A5C4 800799C4 27A60034 */ addiu $a2, $sp, 0x34 /* 07A5C8 800799C8 10500005 */ beq $v0, $s0, .L800799E0 /* 07A5CC 800799CC 00000000 */ nop diff --git a/asm/non_matchings/unknown_079F50/func_80079B44.s b/asm/non_matchings/unknown_079F50/func_80079B44.s index 3d7fa1c4..3db1ca16 100644 --- a/asm/non_matchings/unknown_079F50/func_80079B44.s +++ b/asm/non_matchings/unknown_079F50/func_80079B44.s @@ -117,7 +117,7 @@ glabel func_80079B44 /* 07A8F4 80079CF4 8E0B0274 */ lw $t3, 0x274($s0) .L80079CF8: /* 07A8F8 80079CF8 ACAA0004 */ sw $t2, 4($a1) -/* 07A8FC 80079CFC 0C01E790 */ jal func_80079E40 +/* 07A8FC 80079CFC 0C01E790 */ jal __scTaskComplete /* 07A900 80079D00 02002025 */ move $a0, $s0 .L80079D04: /* 07A904 80079D04 8E0B0274 */ lw $t3, 0x274($s0) @@ -130,7 +130,7 @@ glabel func_80079B44 /* 07A91C 80079D1C AFA70028 */ sw $a3, 0x28($sp) /* 07A920 80079D20 02002025 */ move $a0, $s0 /* 07A924 80079D24 27A50030 */ addiu $a1, $sp, 0x30 -/* 07A928 80079D28 0C01E835 */ jal func_8007A0D4 +/* 07A928 80079D28 0C01E835 */ jal __scSchedule /* 07A92C 80079D2C 27A6002C */ addiu $a2, $sp, 0x2c /* 07A930 80079D30 8FA70028 */ lw $a3, 0x28($sp) /* 07A934 80079D34 8FA50030 */ lw $a1, 0x30($sp) diff --git a/asm/non_matchings/unknown_079F50/func_80079D5C.s b/asm/non_matchings/unknown_079F50/func_80079D5C.s deleted file mode 100644 index 16eb86c2..00000000 --- a/asm/non_matchings/unknown_079F50/func_80079D5C.s +++ /dev/null @@ -1,38 +0,0 @@ -glabel func_80079D5C -/* 07A95C 80079D5C 27BDFFD8 */ addiu $sp, $sp, -0x28 -/* 07A960 80079D60 AFBF0014 */ sw $ra, 0x14($sp) -/* 07A964 80079D64 AFA00020 */ sw $zero, 0x20($sp) -/* 07A968 80079D68 AFA0001C */ sw $zero, 0x1c($sp) -/* 07A96C 80079D6C 8C850278 */ lw $a1, 0x278($a0) -/* 07A970 80079D70 AC800278 */ sw $zero, 0x278($a0) -/* 07A974 80079D74 8CAE0004 */ lw $t6, 4($a1) -/* 07A978 80079D78 2401FFFE */ li $at, -2 -/* 07A97C 80079D7C 01C17824 */ and $t7, $t6, $at -/* 07A980 80079D80 ACAF0004 */ sw $t7, 4($a1) -/* 07A984 80079D84 0C01E790 */ jal func_80079E40 -/* 07A988 80079D88 AFA40028 */ sw $a0, 0x28($sp) -/* 07A98C 80079D8C 8FA40028 */ lw $a0, 0x28($sp) -/* 07A990 80079D90 27A50020 */ addiu $a1, $sp, 0x20 -/* 07A994 80079D94 8C980274 */ lw $t8, 0x274($a0) -/* 07A998 80079D98 8C890278 */ lw $t1, 0x278($a0) -/* 07A99C 80079D9C 2F190001 */ sltiu $t9, $t8, 1 -/* 07A9A0 80079DA0 00194040 */ sll $t0, $t9, 1 -/* 07A9A4 80079DA4 2D2A0001 */ sltiu $t2, $t1, 1 -/* 07A9A8 80079DA8 010A3825 */ or $a3, $t0, $t2 -/* 07A9AC 80079DAC AFA70018 */ sw $a3, 0x18($sp) -/* 07A9B0 80079DB0 0C01E835 */ jal func_8007A0D4 -/* 07A9B4 80079DB4 27A6001C */ addiu $a2, $sp, 0x1c -/* 07A9B8 80079DB8 8FA70018 */ lw $a3, 0x18($sp) -/* 07A9BC 80079DBC 8FA40028 */ lw $a0, 0x28($sp) -/* 07A9C0 80079DC0 10470006 */ beq $v0, $a3, .L80079DDC -/* 07A9C4 80079DC4 8FBF0014 */ lw $ra, 0x14($sp) -/* 07A9C8 80079DC8 8FA50020 */ lw $a1, 0x20($sp) -/* 07A9CC 80079DCC 8FA6001C */ lw $a2, 0x1c($sp) -/* 07A9D0 80079DD0 0C01E7EA */ jal __scExec -/* 07A9D4 80079DD4 00000000 */ nop -/* 07A9D8 80079DD8 8FBF0014 */ lw $ra, 0x14($sp) -.L80079DDC: -/* 07A9DC 80079DDC 27BD0028 */ addiu $sp, $sp, 0x28 -/* 07A9E0 80079DE0 03E00008 */ jr $ra -/* 07A9E4 80079DE4 00000000 */ nop - diff --git a/asm/non_matchings/unknown_079F50/func_80079DE8.s b/asm/non_matchings/unknown_079F50/func_80079DE8.s deleted file mode 100644 index 852ab2f3..00000000 --- a/asm/non_matchings/unknown_079F50/func_80079DE8.s +++ /dev/null @@ -1,28 +0,0 @@ -glabel func_80079DE8 -/* 07A9E8 80079DE8 27BDFFE0 */ addiu $sp, $sp, -0x20 -/* 07A9EC 80079DEC AFBF0014 */ sw $ra, 0x14($sp) -/* 07A9F0 80079DF0 1080000E */ beqz $a0, .L80079E2C -/* 07A9F4 80079DF4 AFA40020 */ sw $a0, 0x20($sp) -/* 07A9F8 80079DF8 0C03479C */ jal func_800D1E70 -/* 07A9FC 80079DFC 00000000 */ nop -/* 07AA00 80079E00 0C0347AC */ jal func_800D1EB0 -/* 07AA04 80079E04 AFA2001C */ sw $v0, 0x1c($sp) -/* 07AA08 80079E08 8FAF001C */ lw $t7, 0x1c($sp) -/* 07AA0C 80079E0C 00000000 */ nop -/* 07AA10 80079E10 104F0004 */ beq $v0, $t7, .L80079E24 -/* 07AA14 80079E14 8FA20020 */ lw $v0, 0x20($sp) -/* 07AA18 80079E18 10000005 */ b .L80079E30 -/* 07AA1C 80079E1C 00001025 */ move $v0, $zero -/* 07AA20 80079E20 8FA20020 */ lw $v0, 0x20($sp) -.L80079E24: -/* 07AA24 80079E24 10000003 */ b .L80079E34 -/* 07AA28 80079E28 8FBF0014 */ lw $ra, 0x14($sp) -.L80079E2C: -/* 07AA2C 80079E2C 00001025 */ move $v0, $zero -.L80079E30: -/* 07AA30 80079E30 8FBF0014 */ lw $ra, 0x14($sp) -.L80079E34: -/* 07AA34 80079E34 27BD0020 */ addiu $sp, $sp, 0x20 -/* 07AA38 80079E38 03E00008 */ jr $ra -/* 07AA3C 80079E3C 00000000 */ nop - diff --git a/asm/non_matchings/unknown_079F50/func_80079F40.s b/asm/non_matchings/unknown_079F50/func_80079F40.s deleted file mode 100644 index 9e2c0c3c..00000000 --- a/asm/non_matchings/unknown_079F50/func_80079F40.s +++ /dev/null @@ -1,34 +0,0 @@ -glabel func_80079F40 -/* 07AB40 80079F40 8CA20010 */ lw $v0, 0x10($a1) -/* 07AB44 80079F44 24010002 */ li $at, 2 -/* 07AB48 80079F48 1441000A */ bne $v0, $at, .L80079F74 -/* 07AB4C 80079F4C 00000000 */ nop -/* 07AB50 80079F50 8C82026C */ lw $v0, 0x26c($a0) -/* 07AB54 80079F54 00000000 */ nop -/* 07AB58 80079F58 10400003 */ beqz $v0, .L80079F68 -/* 07AB5C 80079F5C 00000000 */ nop -/* 07AB60 80079F60 10000002 */ b .L80079F6C -/* 07AB64 80079F64 AC450000 */ sw $a1, ($v0) -.L80079F68: -/* 07AB68 80079F68 AC850264 */ sw $a1, 0x264($a0) -.L80079F6C: -/* 07AB6C 80079F6C 10000009 */ b .L80079F94 -/* 07AB70 80079F70 AC85026C */ sw $a1, 0x26c($a0) -.L80079F74: -/* 07AB74 80079F74 8C820270 */ lw $v0, 0x270($a0) -/* 07AB78 80079F78 00000000 */ nop -/* 07AB7C 80079F7C 10400003 */ beqz $v0, .L80079F8C -/* 07AB80 80079F80 00000000 */ nop -/* 07AB84 80079F84 10000002 */ b .L80079F90 -/* 07AB88 80079F88 AC450000 */ sw $a1, ($v0) -.L80079F8C: -/* 07AB8C 80079F8C AC850268 */ sw $a1, 0x268($a0) -.L80079F90: -/* 07AB90 80079F90 AC850270 */ sw $a1, 0x270($a0) -.L80079F94: -/* 07AB94 80079F94 8CAE0008 */ lw $t6, 8($a1) -/* 07AB98 80079F98 ACA00000 */ sw $zero, ($a1) -/* 07AB9C 80079F9C 31CF0003 */ andi $t7, $t6, 3 -/* 07ABA0 80079FA0 03E00008 */ jr $ra -/* 07ABA4 80079FA4 ACAF0004 */ sw $t7, 4($a1) - diff --git a/asm/non_matchings/unknown_0B8920/func_800C4440.s b/asm/non_matchings/unknown_0B8920/func_800C4440.s deleted file mode 100644 index 2e9a2a4e..00000000 --- a/asm/non_matchings/unknown_0B8920/func_800C4440.s +++ /dev/null @@ -1,103 +0,0 @@ -glabel func_800C4440 -/* 0C5040 800C4440 27BDFFD8 */ addiu $sp, $sp, -0x28 -/* 0C5044 800C4444 AFB00020 */ sw $s0, 0x20($sp) -/* 0C5048 800C4448 3C108013 */ lui $s0, %hi(D_8012A7E8) # $s0, 0x8013 -/* 0C504C 800C444C 24028000 */ li $v0, -32768 -/* 0C5050 800C4450 8E10A7E8 */ lw $s0, %lo(D_8012A7E8)($s0) -/* 0C5054 800C4454 AFBF0024 */ sw $ra, 0x24($sp) -/* 0C5058 800C4458 14A20006 */ bne $a1, $v0, .L800C4474 -/* 0C505C 800C445C AFA70034 */ sw $a3, 0x34($sp) -/* 0C5060 800C4460 860E000C */ lh $t6, 0xc($s0) -/* 0C5064 800C4464 00000000 */ nop -/* 0C5068 800C4468 000E7843 */ sra $t7, $t6, 1 -/* 0C506C 800C446C 10000002 */ b .L800C4478 -/* 0C5070 800C4470 A60F0000 */ sh $t7, ($s0) -.L800C4474: -/* 0C5074 800C4474 A6050000 */ sh $a1, ($s0) -.L800C4478: -/* 0C5078 800C4478 14C20006 */ bne $a2, $v0, .L800C4494 -/* 0C507C 800C447C 02002825 */ move $a1, $s0 -/* 0C5080 800C4480 8618000E */ lh $t8, 0xe($s0) -/* 0C5084 800C4484 00000000 */ nop -/* 0C5088 800C4488 0018C843 */ sra $t9, $t8, 1 -/* 0C508C 800C448C 10000002 */ b .L800C4498 -/* 0C5090 800C4490 A6190002 */ sh $t9, 2($s0) -.L800C4494: -/* 0C5094 800C4494 A6060002 */ sh $a2, 2($s0) -.L800C4498: -/* 0C5098 800C4498 3C013F80 */ li $at, 0x3F800000 # 1.000000 -/* 0C509C 800C449C 44812000 */ mtc1 $at, $f4 -/* 0C50A0 800C44A0 8FA60034 */ lw $a2, 0x34($sp) -/* 0C50A4 800C44A4 8FA70038 */ lw $a3, 0x38($sp) -/* 0C50A8 800C44A8 0C031169 */ jal func_800C45A4 -/* 0C50AC 800C44AC E7A40010 */ swc1 $f4, 0x10($sp) -/* 0C50B0 800C44B0 8FBF0024 */ lw $ra, 0x24($sp) -/* 0C50B4 800C44B4 8FB00020 */ lw $s0, 0x20($sp) -/* 0C50B8 800C44B8 03E00008 */ jr $ra -/* 0C50BC 800C44BC 27BD0028 */ addiu $sp, $sp, 0x28 - -/* 0C50C0 800C44C0 27BDFFE0 */ addiu $sp, $sp, -0x20 -/* 0C50C4 800C44C4 AFBF001C */ sw $ra, 0x1c($sp) -/* 0C50C8 800C44C8 04A0000D */ bltz $a1, .L800C4500 -/* 0C50CC 800C44CC AFA50024 */ sw $a1, 0x24($sp) -/* 0C50D0 800C44D0 28A10008 */ slti $at, $a1, 8 -/* 0C50D4 800C44D4 1020000A */ beqz $at, .L800C4500 -/* 0C50D8 800C44D8 00057880 */ sll $t7, $a1, 2 -/* 0C50DC 800C44DC 3C188013 */ lui $t8, %hi(D_8012A7E8) # $t8, 0x8013 -/* 0C50E0 800C44E0 3C013F80 */ li $at, 0x3F800000 # 1.000000 -/* 0C50E4 800C44E4 8F18A7E8 */ lw $t8, %lo(D_8012A7E8)($t8) -/* 0C50E8 800C44E8 44812000 */ mtc1 $at, $f4 -/* 0C50EC 800C44EC 01E57821 */ addu $t7, $t7, $a1 -/* 0C50F0 800C44F0 000F78C0 */ sll $t7, $t7, 3 -/* 0C50F4 800C44F4 01F82821 */ addu $a1, $t7, $t8 -/* 0C50F8 800C44F8 0C031169 */ jal func_800C45A4 -/* 0C50FC 800C44FC E7A40010 */ swc1 $f4, 0x10($sp) -.L800C4500: -/* 0C5100 800C4500 8FBF001C */ lw $ra, 0x1c($sp) -/* 0C5104 800C4504 27BD0020 */ addiu $sp, $sp, 0x20 -/* 0C5108 800C4508 03E00008 */ jr $ra -/* 0C510C 800C450C 00000000 */ nop - -/* 0C5110 800C4510 27BDFFE0 */ addiu $sp, $sp, -0x20 -/* 0C5114 800C4514 AFBF001C */ sw $ra, 0x1c($sp) -/* 0C5118 800C4518 04A0001E */ bltz $a1, .L800C4594 -/* 0C511C 800C451C AFA50024 */ sw $a1, 0x24($sp) -/* 0C5120 800C4520 28A10008 */ slti $at, $a1, 8 -/* 0C5124 800C4524 1020001B */ beqz $at, .L800C4594 -/* 0C5128 800C4528 24028000 */ li $v0, -32768 -/* 0C512C 800C452C 00057880 */ sll $t7, $a1, 2 -/* 0C5130 800C4530 3C188013 */ lui $t8, %hi(D_8012A7E8) # $t8, 0x8013 -/* 0C5134 800C4534 8F18A7E8 */ lw $t8, %lo(D_8012A7E8)($t8) -/* 0C5138 800C4538 01E57821 */ addu $t7, $t7, $a1 -/* 0C513C 800C453C 000F78C0 */ sll $t7, $t7, 3 -/* 0C5140 800C4540 14C20006 */ bne $a2, $v0, .L800C455C -/* 0C5144 800C4544 01F82821 */ addu $a1, $t7, $t8 -/* 0C5148 800C4548 84B9000C */ lh $t9, 0xc($a1) -/* 0C514C 800C454C 00000000 */ nop -/* 0C5150 800C4550 00194043 */ sra $t0, $t9, 1 -/* 0C5154 800C4554 10000002 */ b .L800C4560 -/* 0C5158 800C4558 A4A80000 */ sh $t0, ($a1) -.L800C455C: -/* 0C515C 800C455C A4A60000 */ sh $a2, ($a1) -.L800C4560: -/* 0C5160 800C4560 14E20006 */ bne $a3, $v0, .L800C457C -/* 0C5164 800C4564 3C013F80 */ li $at, 0x3F800000 # 1.000000 -/* 0C5168 800C4568 84A9000E */ lh $t1, 0xe($a1) -/* 0C516C 800C456C 00000000 */ nop -/* 0C5170 800C4570 00095043 */ sra $t2, $t1, 1 -/* 0C5174 800C4574 10000002 */ b .L800C4580 -/* 0C5178 800C4578 A4AA0002 */ sh $t2, 2($a1) -.L800C457C: -/* 0C517C 800C457C A4A70002 */ sh $a3, 2($a1) -.L800C4580: -/* 0C5180 800C4580 44812000 */ mtc1 $at, $f4 -/* 0C5184 800C4584 8FA60030 */ lw $a2, 0x30($sp) -/* 0C5188 800C4588 8FA70034 */ lw $a3, 0x34($sp) -/* 0C518C 800C458C 0C031169 */ jal func_800C45A4 -/* 0C5190 800C4590 E7A40010 */ swc1 $f4, 0x10($sp) -.L800C4594: -/* 0C5194 800C4594 8FBF001C */ lw $ra, 0x1c($sp) -/* 0C5198 800C4598 27BD0020 */ addiu $sp, $sp, 0x20 -/* 0C519C 800C459C 03E00008 */ jr $ra -/* 0C51A0 800C45A0 00000000 */ nop - diff --git a/asm/non_matchings/unknown_0B8920/func_800C4EDC.s b/asm/non_matchings/unknown_0B8920/func_800C4EDC.s deleted file mode 100644 index 2b126b32..00000000 --- a/asm/non_matchings/unknown_0B8920/func_800C4EDC.s +++ /dev/null @@ -1,47 +0,0 @@ -glabel func_800C4EDC -/* 0C5ADC 800C4EDC 18800025 */ blez $a0, .L800C4F74 -/* 0C5AE0 800C4EE0 28810008 */ slti $at, $a0, 8 -/* 0C5AE4 800C4EE4 10200023 */ beqz $at, .L800C4F74 -/* 0C5AE8 800C4EE8 00047080 */ sll $t6, $a0, 2 -/* 0C5AEC 800C4EEC 3C0F8013 */ lui $t7, %hi(D_8012A7E8) # $t7, 0x8013 -/* 0C5AF0 800C4EF0 8DEFA7E8 */ lw $t7, %lo(D_8012A7E8)($t7) -/* 0C5AF4 800C4EF4 01C47021 */ addu $t6, $t6, $a0 -/* 0C5AF8 800C4EF8 000E70C0 */ sll $t6, $t6, 3 -/* 0C5AFC 800C4EFC 00A7082A */ slt $at, $a1, $a3 -/* 0C5B00 800C4F00 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5B04 800C4F04 A4400000 */ sh $zero, ($v0) -/* 0C5B08 800C4F08 10200004 */ beqz $at, .L800C4F1C -/* 0C5B0C 800C4F0C A4400002 */ sh $zero, 2($v0) -/* 0C5B10 800C4F10 A4450004 */ sh $a1, 4($v0) -/* 0C5B14 800C4F14 10000003 */ b .L800C4F24 -/* 0C5B18 800C4F18 A4470008 */ sh $a3, 8($v0) -.L800C4F1C: -/* 0C5B1C 800C4F1C A4450008 */ sh $a1, 8($v0) -/* 0C5B20 800C4F20 A4470004 */ sh $a3, 4($v0) -.L800C4F24: -/* 0C5B24 800C4F24 8FA30010 */ lw $v1, 0x10($sp) -/* 0C5B28 800C4F28 00000000 */ nop -/* 0C5B2C 800C4F2C 00C3082A */ slt $at, $a2, $v1 -/* 0C5B30 800C4F30 10200004 */ beqz $at, .L800C4F44 -/* 0C5B34 800C4F34 00000000 */ nop -/* 0C5B38 800C4F38 A4460006 */ sh $a2, 6($v0) -/* 0C5B3C 800C4F3C 10000003 */ b .L800C4F4C -/* 0C5B40 800C4F40 A443000A */ sh $v1, 0xa($v0) -.L800C4F44: -/* 0C5B44 800C4F44 A446000A */ sh $a2, 0xa($v0) -/* 0C5B48 800C4F48 A4430006 */ sh $v1, 6($v0) -.L800C4F4C: -/* 0C5B4C 800C4F4C 84580008 */ lh $t8, 8($v0) -/* 0C5B50 800C4F50 84590004 */ lh $t9, 4($v0) -/* 0C5B54 800C4F54 844A000A */ lh $t2, 0xa($v0) -/* 0C5B58 800C4F58 844B0006 */ lh $t3, 6($v0) -/* 0C5B5C 800C4F5C 03194023 */ subu $t0, $t8, $t9 -/* 0C5B60 800C4F60 014B6023 */ subu $t4, $t2, $t3 -/* 0C5B64 800C4F64 25090001 */ addiu $t1, $t0, 1 -/* 0C5B68 800C4F68 258D0001 */ addiu $t5, $t4, 1 -/* 0C5B6C 800C4F6C A449000C */ sh $t1, 0xc($v0) -/* 0C5B70 800C4F70 A44D000E */ sh $t5, 0xe($v0) -.L800C4F74: -/* 0C5B74 800C4F74 03E00008 */ jr $ra -/* 0C5B78 800C4F78 00000000 */ nop - diff --git a/asm/non_matchings/unknown_0B8920/func_800C4F7C.s b/asm/non_matchings/unknown_0B8920/func_800C4F7C.s deleted file mode 100644 index cf276b19..00000000 --- a/asm/non_matchings/unknown_0B8920/func_800C4F7C.s +++ /dev/null @@ -1,19 +0,0 @@ -glabel func_800C4F7C -/* 0C5B7C 800C4F7C 0480000D */ bltz $a0, .L800C4FB4 -/* 0C5B80 800C4F80 28810008 */ slti $at, $a0, 8 -/* 0C5B84 800C4F84 1020000B */ beqz $at, .L800C4FB4 -/* 0C5B88 800C4F88 00047080 */ sll $t6, $a0, 2 -/* 0C5B8C 800C4F8C 3C188013 */ lui $t8, %hi(D_8012A7E0) # $t8, 0x8013 -/* 0C5B90 800C4F90 8F18A7E0 */ lw $t8, %lo(D_8012A7E0)($t8) -/* 0C5B94 800C4F94 3C0F8013 */ lui $t7, %hi(D_8012A7E8) # $t7, 0x8013 -/* 0C5B98 800C4F98 8DEFA7E8 */ lw $t7, %lo(D_8012A7E8)($t7) -/* 0C5B9C 800C4F9C 01C47021 */ addu $t6, $t6, $a0 -/* 0C5BA0 800C4FA0 000E70C0 */ sll $t6, $t6, 3 -/* 0C5BA4 800C4FA4 00B8082A */ slt $at, $a1, $t8 -/* 0C5BA8 800C4FA8 10200002 */ beqz $at, .L800C4FB4 -/* 0C5BAC 800C4FAC 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5BB0 800C4FB0 A045001D */ sb $a1, 0x1d($v0) -.L800C4FB4: -/* 0C5BB4 800C4FB4 03E00008 */ jr $ra -/* 0C5BB8 800C4FB8 00000000 */ nop - diff --git a/asm/non_matchings/unknown_0B8920/func_800C4FBC.s b/asm/non_matchings/unknown_0B8920/func_800C4FBC.s deleted file mode 100644 index 1c60f1c5..00000000 --- a/asm/non_matchings/unknown_0B8920/func_800C4FBC.s +++ /dev/null @@ -1,20 +0,0 @@ -glabel func_800C4FBC -/* 0C5BBC 800C4FBC 1880000E */ blez $a0, .L800C4FF8 -/* 0C5BC0 800C4FC0 28810008 */ slti $at, $a0, 8 -/* 0C5BC4 800C4FC4 1020000C */ beqz $at, .L800C4FF8 -/* 0C5BC8 800C4FC8 00047080 */ sll $t6, $a0, 2 -/* 0C5BCC 800C4FCC 3C0F8013 */ lui $t7, %hi(D_8012A7E8) # $t7, 0x8013 -/* 0C5BD0 800C4FD0 8DEFA7E8 */ lw $t7, %lo(D_8012A7E8)($t7) -/* 0C5BD4 800C4FD4 01C47021 */ addu $t6, $t6, $a0 -/* 0C5BD8 800C4FD8 000E70C0 */ sll $t6, $t6, 3 -/* 0C5BDC 800C4FDC 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5BE0 800C4FE0 A0450010 */ sb $a1, 0x10($v0) -/* 0C5BE4 800C4FE4 A0460011 */ sb $a2, 0x11($v0) -/* 0C5BE8 800C4FE8 A0470012 */ sb $a3, 0x12($v0) -/* 0C5BEC 800C4FEC 8FB80010 */ lw $t8, 0x10($sp) -/* 0C5BF0 800C4FF0 00000000 */ nop -/* 0C5BF4 800C4FF4 A0580013 */ sb $t8, 0x13($v0) -.L800C4FF8: -/* 0C5BF8 800C4FF8 03E00008 */ jr $ra -/* 0C5BFC 800C4FFC 00000000 */ nop - diff --git a/asm/non_matchings/unknown_0B8920/func_800C5000.s b/asm/non_matchings/unknown_0B8920/func_800C5000.s deleted file mode 100644 index 745c4747..00000000 --- a/asm/non_matchings/unknown_0B8920/func_800C5000.s +++ /dev/null @@ -1,23 +0,0 @@ -glabel func_800C5000 -/* 0C5C00 800C5000 18800011 */ blez $a0, .L800C5048 -/* 0C5C04 800C5004 28810008 */ slti $at, $a0, 8 -/* 0C5C08 800C5008 1020000F */ beqz $at, .L800C5048 -/* 0C5C0C 800C500C 00047080 */ sll $t6, $a0, 2 -/* 0C5C10 800C5010 3C0F8013 */ lui $t7, %hi(D_8012A7E8) # $t7, 0x8013 -/* 0C5C14 800C5014 8DEFA7E8 */ lw $t7, %lo(D_8012A7E8)($t7) -/* 0C5C18 800C5018 01C47021 */ addu $t6, $t6, $a0 -/* 0C5C1C 800C501C 000E70C0 */ sll $t6, $t6, 3 -/* 0C5C20 800C5020 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5C24 800C5024 A0450014 */ sb $a1, 0x14($v0) -/* 0C5C28 800C5028 A0460015 */ sb $a2, 0x15($v0) -/* 0C5C2C 800C502C A0470016 */ sb $a3, 0x16($v0) -/* 0C5C30 800C5030 8FB80010 */ lw $t8, 0x10($sp) -/* 0C5C34 800C5034 00000000 */ nop -/* 0C5C38 800C5038 A0580017 */ sb $t8, 0x17($v0) -/* 0C5C3C 800C503C 8FB90014 */ lw $t9, 0x14($sp) -/* 0C5C40 800C5040 00000000 */ nop -/* 0C5C44 800C5044 A059001C */ sb $t9, 0x1c($v0) -.L800C5048: -/* 0C5C48 800C5048 03E00008 */ jr $ra -/* 0C5C4C 800C504C 00000000 */ nop - diff --git a/asm/non_matchings/unknown_0B8920/func_800C5050.s b/asm/non_matchings/unknown_0B8920/func_800C5050.s deleted file mode 100644 index b9e76c53..00000000 --- a/asm/non_matchings/unknown_0B8920/func_800C5050.s +++ /dev/null @@ -1,78 +0,0 @@ -glabel func_800C5050 -/* 0C5C50 800C5050 1880000E */ blez $a0, .L800C508C -/* 0C5C54 800C5054 28810008 */ slti $at, $a0, 8 -/* 0C5C58 800C5058 1020000C */ beqz $at, .L800C508C -/* 0C5C5C 800C505C 00047080 */ sll $t6, $a0, 2 -/* 0C5C60 800C5060 3C0F8013 */ lui $t7, %hi(D_8012A7E8) # $t7, 0x8013 -/* 0C5C64 800C5064 8DEFA7E8 */ lw $t7, %lo(D_8012A7E8)($t7) -/* 0C5C68 800C5068 01C47021 */ addu $t6, $t6, $a0 -/* 0C5C6C 800C506C 000E70C0 */ sll $t6, $t6, 3 -/* 0C5C70 800C5070 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5C74 800C5074 A0450018 */ sb $a1, 0x18($v0) -/* 0C5C78 800C5078 A0460019 */ sb $a2, 0x19($v0) -/* 0C5C7C 800C507C A047001A */ sb $a3, 0x1a($v0) -/* 0C5C80 800C5080 8FB80010 */ lw $t8, 0x10($sp) -/* 0C5C84 800C5084 00000000 */ nop -/* 0C5C88 800C5088 A058001B */ sb $t8, 0x1b($v0) -.L800C508C: -/* 0C5C8C 800C508C 03E00008 */ jr $ra -/* 0C5C90 800C5090 00000000 */ nop - -/* 0C5C94 800C5094 1880000E */ blez $a0, .L800C50D0 -/* 0C5C98 800C5098 28810008 */ slti $at, $a0, 8 -/* 0C5C9C 800C509C 1020000C */ beqz $at, .L800C50D0 -/* 0C5CA0 800C50A0 00047080 */ sll $t6, $a0, 2 -/* 0C5CA4 800C50A4 3C0F8013 */ lui $t7, %hi(D_8012A7E8) # $t7, 0x8013 -/* 0C5CA8 800C50A8 8DEFA7E8 */ lw $t7, %lo(D_8012A7E8)($t7) -/* 0C5CAC 800C50AC 01C47021 */ addu $t6, $t6, $a0 -/* 0C5CB0 800C50B0 000E70C0 */ sll $t6, $t6, 3 -/* 0C5CB4 800C50B4 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5CB8 800C50B8 84580020 */ lh $t8, 0x20($v0) -/* 0C5CBC 800C50BC 84480022 */ lh $t0, 0x22($v0) -/* 0C5CC0 800C50C0 0305C821 */ addu $t9, $t8, $a1 -/* 0C5CC4 800C50C4 01064821 */ addu $t1, $t0, $a2 -/* 0C5CC8 800C50C8 A4590020 */ sh $t9, 0x20($v0) -/* 0C5CCC 800C50CC A4490022 */ sh $t1, 0x22($v0) -.L800C50D0: -/* 0C5CD0 800C50D0 03E00008 */ jr $ra -/* 0C5CD4 800C50D4 00000000 */ nop - -/* 0C5CD8 800C50D8 1880000A */ blez $a0, .L800C5104 -/* 0C5CDC 800C50DC 28810008 */ slti $at, $a0, 8 -/* 0C5CE0 800C50E0 10200008 */ beqz $at, .L800C5104 -/* 0C5CE4 800C50E4 00047080 */ sll $t6, $a0, 2 -/* 0C5CE8 800C50E8 3C0F8013 */ lui $t7, %hi(D_8012A7E8) # $t7, 0x8013 -/* 0C5CEC 800C50EC 8DEFA7E8 */ lw $t7, %lo(D_8012A7E8)($t7) -/* 0C5CF0 800C50F0 01C47021 */ addu $t6, $t6, $a0 -/* 0C5CF4 800C50F4 000E70C0 */ sll $t6, $t6, 3 -/* 0C5CF8 800C50F8 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5CFC 800C50FC A4400020 */ sh $zero, 0x20($v0) -/* 0C5D00 800C5100 A4400022 */ sh $zero, 0x22($v0) -.L800C5104: -/* 0C5D04 800C5104 03E00008 */ jr $ra -/* 0C5D08 800C5108 00000000 */ nop - -/* 0C5D0C 800C510C 27BDFFE0 */ addiu $sp, $sp, -0x20 -/* 0C5D10 800C5110 3C0E8013 */ lui $t6, %hi(D_8012A7E8) # $t6, 0x8013 -/* 0C5D14 800C5114 00047880 */ sll $t7, $a0, 2 -/* 0C5D18 800C5118 8DCEA7E8 */ lw $t6, %lo(D_8012A7E8)($t6) -/* 0C5D1C 800C511C AFA7002C */ sw $a3, 0x2c($sp) -/* 0C5D20 800C5120 01E47821 */ addu $t7, $t7, $a0 -/* 0C5D24 800C5124 AFA60028 */ sw $a2, 0x28($sp) -/* 0C5D28 800C5128 000F78C0 */ sll $t7, $t7, 3 -/* 0C5D2C 800C512C AFBF001C */ sw $ra, 0x1c($sp) -/* 0C5D30 800C5130 AFA50024 */ sw $a1, 0x24($sp) -/* 0C5D34 800C5134 01CF1021 */ addu $v0, $t6, $t7 -/* 0C5D38 800C5138 00A03825 */ move $a3, $a1 -/* 0C5D3C 800C513C 8FB80028 */ lw $t8, 0x28($sp) -/* 0C5D40 800C5140 8FB9002C */ lw $t9, 0x2c($sp) -/* 0C5D44 800C5144 84450000 */ lh $a1, ($v0) -/* 0C5D48 800C5148 84460002 */ lh $a2, 2($v0) -/* 0C5D4C 800C514C AFB80010 */ sw $t8, 0x10($sp) -/* 0C5D50 800C5150 0C03145A */ jal func_800C5168 -/* 0C5D54 800C5154 AFB90014 */ sw $t9, 0x14($sp) -/* 0C5D58 800C5158 8FBF001C */ lw $ra, 0x1c($sp) -/* 0C5D5C 800C515C 27BD0020 */ addiu $sp, $sp, 0x20 -/* 0C5D60 800C5160 03E00008 */ jr $ra -/* 0C5D64 800C5164 00000000 */ nop - diff --git a/data/dkr.data.s b/data/dkr.data.s index 6ff531b3..8e548f83 100644 --- a/data/dkr.data.s +++ b/data/dkr.data.s @@ -9242,10 +9242,10 @@ glabel D_800E4810 .word 0x00000000 .word 0x00000000 -glabel D_800E4870 +glabel __osViCurr .word 0x800E4810 -glabel D_800E4874 +glabel __osViNext .word 0x800E4840 glabel D_800E4878 diff --git a/include/PR/rcp.h b/include/PR/rcp.h new file mode 100644 index 00000000..3795ff72 --- /dev/null +++ b/include/PR/rcp.h @@ -0,0 +1,882 @@ +#ifndef _RCP_H_ +#define _RCP_H_ + +/************************************************************************** + * * + * Copyright (C) 1995, Silicon Graphics, Inc. * + * * + * These coded instructions, statements, and computer programs contain * + * unpublished proprietary information of Silicon Graphics, Inc., and * + * are protected by Federal copyright law. They may not be disclosed * + * to third parties or copied or duplicated in any form, in whole or * + * in part, without the prior written consent of Silicon Graphics, Inc. * + * * + **************************************************************************/ + +/************************************************************************** + * + * File: rcp.h + * + * This file contains register and bit definitions for RCP memory map. + * $Revision: 1.20 $ + * $Date: 1997/07/23 08:35:21 $ + * $Source: /disk6/Master/cvsmdev2/PR/include/rcp.h,v $ + * + **************************************************************************/ + +#include +#include + +/********************************************************************** + * + * Here is a quick overview of the RCP memory map: + * + +0x0000_0000 .. 0x03ef_ffff RDRAM memory +0x03f0_0000 .. 0x03ff_ffff RDRAM registers + + RCP registers (see below) +0x0400_0000 .. 0x040f_ffff SP registers +0x0410_0000 .. 0x041f_ffff DP command registers +0x0420_0000 .. 0x042f_ffff DP span registers +0x0430_0000 .. 0x043f_ffff MI registers +0x0440_0000 .. 0x044f_ffff VI registers +0x0450_0000 .. 0x045f_ffff AI registers +0x0460_0000 .. 0x046f_ffff PI registers +0x0470_0000 .. 0x047f_ffff RI registers +0x0480_0000 .. 0x048f_ffff SI registers +0x0490_0000 .. 0x04ff_ffff unused + +0x0500_0000 .. 0x05ff_ffff cartridge domain 2 +0x0600_0000 .. 0x07ff_ffff cartridge domain 1 +0x0800_0000 .. 0x0fff_ffff cartridge domain 2 +0x1000_0000 .. 0x1fbf_ffff cartridge domain 1 + +0x1fc0_0000 .. 0x1fc0_07bf PIF Boot Rom (1984 bytes) +0x1fc0_07c0 .. 0x1fc0_07ff PIF (JoyChannel) RAM (64 bytes) +0x1fc0_0800 .. 0x1fcf_ffff Reserved +0x1fd0_0000 .. 0x7fff_ffff cartridge domain 1 +0x8000_0000 .. 0xffff_ffff external SysAD device + +The Indy development board use cartridge domain 1: +0x1000_0000 .. 0x10ff_ffff RAMROM +0x1800_0000 .. 0x1800_0003 GIO interrupt (6 bits valid in 4 bytes) +0x1800_0400 .. 0x1800_0403 GIO sync (6 bits valid in 4 bytes) +0x1800_0800 .. 0x1800_0803 CART interrupt (6 bits valid in 4 bytes) + + + +**************************************************************************/ + + +/************************************************************************* + * RDRAM Memory (Assumes that maximum size is 4 MB) + */ +#define RDRAM_0_START 0x00000000 +#define RDRAM_0_END 0x001FFFFF +#define RDRAM_1_START 0x00200000 +#define RDRAM_1_END 0x003FFFFF + +#define RDRAM_START RDRAM_0_START +#define RDRAM_END RDRAM_1_END + + +/************************************************************************* + * Address predicates + */ +#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) +#define IS_RDRAM(x) ((unsigned)(x) >= RDRAM_START && \ + (unsigned)(x) < RDRAM_END) +#endif + + +/************************************************************************* + * RDRAM Registers (0x03f0_0000 .. 0x03ff_ffff) + */ +#define RDRAM_BASE_REG 0x03F00000 + +#define RDRAM_CONFIG_REG (RDRAM_BASE_REG+0x00) +#define RDRAM_DEVICE_TYPE_REG (RDRAM_BASE_REG+0x00) +#define RDRAM_DEVICE_ID_REG (RDRAM_BASE_REG+0x04) +#define RDRAM_DELAY_REG (RDRAM_BASE_REG+0x08) +#define RDRAM_MODE_REG (RDRAM_BASE_REG+0x0c) +#define RDRAM_REF_INTERVAL_REG (RDRAM_BASE_REG+0x10) +#define RDRAM_REF_ROW_REG (RDRAM_BASE_REG+0x14) +#define RDRAM_RAS_INTERVAL_REG (RDRAM_BASE_REG+0x18) +#define RDRAM_MIN_INTERVAL_REG (RDRAM_BASE_REG+0x1c) +#define RDRAM_ADDR_SELECT_REG (RDRAM_BASE_REG+0x20) +#define RDRAM_DEVICE_MANUF_REG (RDRAM_BASE_REG+0x24) + +#define RDRAM_0_DEVICE_ID 0 +#define RDRAM_1_DEVICE_ID 1 + +#define RDRAM_RESET_MODE 0 +#define RDRAM_ACTIVE_MODE 1 +#define RDRAM_STANDBY_MODE 2 + +#define RDRAM_LENGTH (2*512*2048) +#define RDRAM_0_BASE_ADDRESS (RDRAM_0_DEVICE_ID*RDRAM_LENGTH) +#define RDRAM_1_BASE_ADDRESS (RDRAM_1_DEVICE_ID*RDRAM_LENGTH) + +#define RDRAM_0_CONFIG 0x00000 +#define RDRAM_1_CONFIG 0x00400 +#define RDRAM_GLOBAL_CONFIG 0x80000 + + +/************************************************************************* + * PIF Physical memory map (total size = 2 KB) + * + * Size Description Mode + * 1FC007FF +-------+-----------------+-----+ + * | 64 B | JoyChannel RAM | R/W | + * 1FC007C0 +-------+-----------------+-----+ + * |1984 B | Boot ROM | * | * = Reserved + * 1FC00000 +-------+-----------------+-----+ + * + */ +#define PIF_ROM_START 0x1FC00000 +#define PIF_ROM_END 0x1FC007BF +#define PIF_RAM_START 0x1FC007C0 +#define PIF_RAM_END 0x1FC007FF + + +/************************************************************************* + * Controller channel + * Each game controller channel has 4 error bits that are defined in bit 6-7 of + * the Rx and Tx data size area bytes. Programmers need to clear these bits + * when setting the Tx/Rx size area values for a channel + */ +#define CHNL_ERR_NORESP 0x80 /* Bit 7 (Rx): No response error */ +#define CHNL_ERR_OVERRUN 0x40 /* Bit 6 (Rx): Overrun error */ +#define CHNL_ERR_FRAME 0x80 /* Bit 7 (Tx): Frame error */ +#define CHNL_ERR_COLLISION 0x40 /* Bit 6 (Tx): Collision error */ + +#define CHNL_ERR_MASK 0xC0 /* Bit 6-7: channel errors */ + + +/************************************************************************* + * External device info + */ +#define DEVICE_TYPE_CART 0 /* ROM cartridge */ +#define DEVICE_TYPE_BULK 1 /* ROM bulk */ +#define DEVICE_TYPE_64DD 2 /* 64 Disk Drive */ +#define DEVICE_TYPE_SRAM 3 /* SRAM */ + +/************************************************************************* + * SP Memory + */ +#define SP_DMEM_START 0x04000000 /* read/write */ +#define SP_DMEM_END 0x04000FFF +#define SP_IMEM_START 0x04001000 /* read/write */ +#define SP_IMEM_END 0x04001FFF + +/************************************************************************* + * SP CP0 Registers + */ + +#define SP_BASE_REG 0x04040000 + +/* SP memory address (R/W): [11:0] DMEM/IMEM address; [12] 0=DMEM,1=IMEM */ +#define SP_MEM_ADDR_REG (SP_BASE_REG+0x00) /* Master */ + +/* SP DRAM DMA address (R/W): [23:0] RDRAM address */ +#define SP_DRAM_ADDR_REG (SP_BASE_REG+0x04) /* Slave */ + +/* SP read DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip */ +/* direction: I/DMEM <- RDRAM */ +#define SP_RD_LEN_REG (SP_BASE_REG+0x08) /* R/W: read len */ + +/* SP write DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip */ +/* direction: I/DMEM -> RDRAM */ +#define SP_WR_LEN_REG (SP_BASE_REG+0x0C) /* R/W: write len */ + +/* SP status (R/W): [14:0] valid bits; see below for write/read mode */ +#define SP_STATUS_REG (SP_BASE_REG+0x10) + +/* SP DMA full (R): [0] valid bit; dma full */ +#define SP_DMA_FULL_REG (SP_BASE_REG+0x14) + +/* SP DMA busy (R): [0] valid bit; dma busy */ +#define SP_DMA_BUSY_REG (SP_BASE_REG+0x18) + +/* SP semaphore (R/W): Read: [0] semaphore flag (set on read) */ +/* Write: [] clear semaphore flag */ +#define SP_SEMAPHORE_REG (SP_BASE_REG+0x1C) + +/* SP PC (R/W): [11:0] program counter */ +#define SP_PC_REG 0x04080000 + +/* SP MEM address: bit 12 specifies if address is IMEM or DMEM */ +#define SP_DMA_DMEM 0x0000 /* Bit 12: 0=DMEM, 1=IMEM */ +#define SP_DMA_IMEM 0x1000 /* Bit 12: 0=DMEM, 1=IMEM */ + +/* + * Values to clear/set bit in status reg (SP_STATUS_REG - write) + */ +#define SP_CLR_HALT 0x00001 /* Bit 0: clear halt */ +#define SP_SET_HALT 0x00002 /* Bit 1: set halt */ +#define SP_CLR_BROKE 0x00004 /* Bit 2: clear broke */ +#define SP_CLR_INTR 0x00008 /* Bit 3: clear intr */ +#define SP_SET_INTR 0x00010 /* Bit 4: set intr */ +#define SP_CLR_SSTEP 0x00020 /* Bit 5: clear sstep */ +#define SP_SET_SSTEP 0x00040 /* Bit 6: set sstep */ +#define SP_CLR_INTR_BREAK 0x00080 /* Bit 7: clear intr on break */ +#define SP_SET_INTR_BREAK 0x00100 /* Bit 8: set intr on break */ +#define SP_CLR_SIG0 0x00200 /* Bit 9: clear signal 0 */ +#define SP_SET_SIG0 0x00400 /* Bit 10: set signal 0 */ +#define SP_CLR_SIG1 0x00800 /* Bit 11: clear signal 1 */ +#define SP_SET_SIG1 0x01000 /* Bit 12: set signal 1 */ +#define SP_CLR_SIG2 0x02000 /* Bit 13: clear signal 2 */ +#define SP_SET_SIG2 0x04000 /* Bit 14: set signal 2 */ +#define SP_CLR_SIG3 0x08000 /* Bit 15: clear signal 3 */ +#define SP_SET_SIG3 0x10000 /* Bit 16: set signal 3 */ +#define SP_CLR_SIG4 0x20000 /* Bit 17: clear signal 4 */ +#define SP_SET_SIG4 0x40000 /* Bit 18: set signal 4 */ +#define SP_CLR_SIG5 0x80000 /* Bit 19: clear signal 5 */ +#define SP_SET_SIG5 0x100000 /* Bit 20: set signal 5 */ +#define SP_CLR_SIG6 0x200000 /* Bit 21: clear signal 6 */ +#define SP_SET_SIG6 0x400000 /* Bit 22: set signal 6 */ +#define SP_CLR_SIG7 0x800000 /* Bit 23: clear signal 7 */ +#define SP_SET_SIG7 0x1000000 /* Bit 24: set signal 7 */ + +/* + * Patterns to interpret status reg (SP_STATUS_REG - read) + */ +#define SP_STATUS_HALT 0x001 /* Bit 0: halt */ +#define SP_STATUS_BROKE 0x002 /* Bit 1: broke */ +#define SP_STATUS_DMA_BUSY 0x004 /* Bit 2: dma busy */ +#define SP_STATUS_DMA_FULL 0x008 /* Bit 3: dma full */ +#define SP_STATUS_IO_FULL 0x010 /* Bit 4: io full */ +#define SP_STATUS_SSTEP 0x020 /* Bit 5: single step */ +#define SP_STATUS_INTR_BREAK 0x040 /* Bit 6: interrupt on break */ +#define SP_STATUS_SIG0 0x080 /* Bit 7: signal 0 set */ +#define SP_STATUS_SIG1 0x100 /* Bit 8: signal 1 set */ +#define SP_STATUS_SIG2 0x200 /* Bit 9: signal 2 set */ +#define SP_STATUS_SIG3 0x400 /* Bit 10: signal 3 set */ +#define SP_STATUS_SIG4 0x800 /* Bit 11: signal 4 set */ +#define SP_STATUS_SIG5 0x1000 /* Bit 12: signal 5 set */ +#define SP_STATUS_SIG6 0x2000 /* Bit 13: signal 6 set */ +#define SP_STATUS_SIG7 0x4000 /* Bit 14: signal 7 set */ + +/* + * Use of SIG bits + */ +#define SP_CLR_YIELD SP_CLR_SIG0 +#define SP_SET_YIELD SP_SET_SIG0 +#define SP_STATUS_YIELD SP_STATUS_SIG0 +#define SP_CLR_YIELDED SP_CLR_SIG1 +#define SP_SET_YIELDED SP_SET_SIG1 +#define SP_STATUS_YIELDED SP_STATUS_SIG1 +#define SP_CLR_TASKDONE SP_CLR_SIG2 +#define SP_SET_TASKDONE SP_SET_SIG2 +#define SP_STATUS_TASKDONE SP_STATUS_SIG2 +#define SP_CLR_RSPSIGNAL SP_CLR_SIG3 +#define SP_SET_RSPSIGNAL SP_SET_SIG3 +#define SP_STATUS_RSPSIGNAL SP_STATUS_SIG3 +#define SP_CLR_CPUSIGNAL SP_CLR_SIG4 +#define SP_SET_CPUSIGNAL SP_SET_SIG4 +#define SP_STATUS_CPUSIGNAL SP_STATUS_SIG4 + +/* SP IMEM BIST REG (R/W): [6:0] BIST status bits; see below for detail */ +#define SP_IBIST_REG 0x04080004 + +/* + * Patterns to interpret status reg (SP_BIST_REG - write) + */ +#define SP_IBIST_CHECK 0x01 /* Bit 0: BIST check */ +#define SP_IBIST_GO 0x02 /* Bit 1: BIST go */ +#define SP_IBIST_CLEAR 0x04 /* Bit 2: BIST clear */ + +/* + * Patterns to interpret status reg (SP_BIST_REG - read) + */ +/* First 2 bits are same as in write mode: + * Bit 0: BIST check; Bit 1: BIST go + */ +#define SP_IBIST_DONE 0x04 /* Bit 2: BIST done */ +#define SP_IBIST_FAILED 0x78 /* Bit [6:3]: BIST fail */ + + +/************************************************************************* + * DP Command Registers + */ +#define DPC_BASE_REG 0x04100000 + +/* DP CMD DMA start (R/W): [23:0] DMEM/RDRAM start address */ +#define DPC_START_REG (DPC_BASE_REG+0x00) + +/* DP CMD DMA end (R/W): [23:0] DMEM/RDRAM end address */ +#define DPC_END_REG (DPC_BASE_REG+0x04) + +/* DP CMD DMA end (R): [23:0] DMEM/RDRAM current address */ +#define DPC_CURRENT_REG (DPC_BASE_REG+0x08) + +/* DP CMD status (R/W): [9:0] valid bits - see below for definitions */ +#define DPC_STATUS_REG (DPC_BASE_REG+0x0C) + +/* DP clock counter (R): [23:0] clock counter */ +#define DPC_CLOCK_REG (DPC_BASE_REG+0x10) + +/* DP buffer busy counter (R): [23:0] clock counter */ +#define DPC_BUFBUSY_REG (DPC_BASE_REG+0x14) + +/* DP pipe busy counter (R): [23:0] clock counter */ +#define DPC_PIPEBUSY_REG (DPC_BASE_REG+0x18) + +/* DP TMEM load counter (R): [23:0] clock counter */ +#define DPC_TMEM_REG (DPC_BASE_REG+0x1C) + +/* + * Values to clear/set bit in status reg (DPC_STATUS_REG - write) + */ +#define DPC_CLR_XBUS_DMEM_DMA 0x0001 /* Bit 0: clear xbus_dmem_dma */ +#define DPC_SET_XBUS_DMEM_DMA 0x0002 /* Bit 1: set xbus_dmem_dma */ +#define DPC_CLR_FREEZE 0x0004 /* Bit 2: clear freeze */ +#define DPC_SET_FREEZE 0x0008 /* Bit 3: set freeze */ +#define DPC_CLR_FLUSH 0x0010 /* Bit 4: clear flush */ +#define DPC_SET_FLUSH 0x0020 /* Bit 5: set flush */ +#define DPC_CLR_TMEM_CTR 0x0040 /* Bit 6: clear tmem ctr */ +#define DPC_CLR_PIPE_CTR 0x0080 /* Bit 7: clear pipe ctr */ +#define DPC_CLR_CMD_CTR 0x0100 /* Bit 8: clear cmd ctr */ +#define DPC_CLR_CLOCK_CTR 0x0200 /* Bit 9: clear clock ctr */ + +/* + * Patterns to interpret status reg (DPC_STATUS_REG - read) + */ +#define DPC_STATUS_XBUS_DMEM_DMA 0x001 /* Bit 0: xbus_dmem_dma */ +#define DPC_STATUS_FREEZE 0x002 /* Bit 1: freeze */ +#define DPC_STATUS_FLUSH 0x004 /* Bit 2: flush */ +/*#define DPC_STATUS_FROZEN 0x008*/ /* Bit 3: frozen */ +#define DPC_STATUS_START_GCLK 0x008 /* Bit 3: start gclk */ +#define DPC_STATUS_TMEM_BUSY 0x010 /* Bit 4: tmem busy */ +#define DPC_STATUS_PIPE_BUSY 0x020 /* Bit 5: pipe busy */ +#define DPC_STATUS_CMD_BUSY 0x040 /* Bit 6: cmd busy */ +#define DPC_STATUS_CBUF_READY 0x080 /* Bit 7: cbuf ready */ +#define DPC_STATUS_DMA_BUSY 0x100 /* Bit 8: dma busy */ +#define DPC_STATUS_END_VALID 0x200 /* Bit 9: end valid */ +#define DPC_STATUS_START_VALID 0x400 /* Bit 10: start valid */ + + +/************************************************************************* + * DP Span Registers + */ +#define DPS_BASE_REG 0x04200000 + +/* DP tmem bist (R/W): [10:0] BIST status bits; see below for detail */ +#define DPS_TBIST_REG (DPS_BASE_REG+0x00) + +/* DP span test mode (R/W): [0] Span buffer test access enable */ +#define DPS_TEST_MODE_REG (DPS_BASE_REG+0x04) + +/* DP span buffer test address (R/W): [6:0] bits; see below for detail */ +#define DPS_BUFTEST_ADDR_REG (DPS_BASE_REG+0x08) + +/* DP span buffer test data (R/W): [31:0] span buffer data */ +#define DPS_BUFTEST_DATA_REG (DPS_BASE_REG+0x0C) + +/* + * Patterns to interpret status reg (DPS_TMEM_BIST_REG - write) + */ +#define DPS_TBIST_CHECK 0x01 /* Bit 0: BIST check */ +#define DPS_TBIST_GO 0x02 /* Bit 1: BIST go */ +#define DPS_TBIST_CLEAR 0x04 /* Bit 2: BIST clear */ + +/* + * Patterns to interpret status reg (DPS_TMEM_BIST_REG - read) + */ +/* First 2 bits are same as in write mode: + * Bit 0: BIST check; Bit 1: BIST go + */ +#define DPS_TBIST_DONE 0x004 /* Bit 2: BIST done */ +#define DPS_TBIST_FAILED 0x7F8 /* Bit [10:3]: BIST fail */ + + +/************************************************************************* + * MIPS Interface (MI) Registers + */ +#define MI_BASE_REG 0x04300000 + +/* + * MI init mode (W): [6:0] init length, [7] clear init mode, [8] set init mode + * [9/10] clear/set ebus test mode, [11] clear DP interrupt + * (R): [6:0] init length, [7] init mode, [8] ebus test mode + */ +#define MI_INIT_MODE_REG (MI_BASE_REG+0x00) +#define MI_MODE_REG MI_INIT_MODE_REG + +/* + * Values to clear/set bit in mode reg (MI_MODE_REG - write) + */ +#define MI_CLR_INIT 0x0080 /* Bit 7: clear init mode */ +#define MI_SET_INIT 0x0100 /* Bit 8: set init mode */ +#define MI_CLR_EBUS 0x0200 /* Bit 9: clear ebus test */ +#define MI_SET_EBUS 0x0400 /* Bit 10: set ebus test mode */ +#define MI_CLR_DP_INTR 0x0800 /* Bit 11: clear dp interrupt */ +#define MI_CLR_RDRAM 0x1000 /* Bit 12: clear RDRAM reg */ +#define MI_SET_RDRAM 0x2000 /* Bit 13: set RDRAM reg mode */ + +/* + * Patterns to interpret mode reg (MI_MODE_REG - read) + */ +#define MI_MODE_INIT 0x0080 /* Bit 7: init mode */ +#define MI_MODE_EBUS 0x0100 /* Bit 8: ebus test mode */ +#define MI_MODE_RDRAM 0x0200 /* Bit 9: RDRAM reg mode */ + +/* MI version (R): [7:0] io, [15:8] rac, [23:16] rdp, [31:24] rsp */ +#define MI_VERSION_REG (MI_BASE_REG+0x04) +#define MI_NOOP_REG MI_VERSION_REG + +/* MI interrupt (R): [5:0] valid bits - see below for bit patterns */ +#define MI_INTR_REG (MI_BASE_REG+0x08) + +/* + * MI interrupt mask (W): [11:0] valid bits - see below for bit patterns + * (R): [5:0] valid bits - see below for bit patterns + */ +#define MI_INTR_MASK_REG (MI_BASE_REG+0x0C) + +/* + * The following are values to check for interrupt setting (MI_INTR_REG) + */ +#define MI_INTR_SP 0x01 /* Bit 0: SP intr */ +#define MI_INTR_SI 0x02 /* Bit 1: SI intr */ +#define MI_INTR_AI 0x04 /* Bit 2: AI intr */ +#define MI_INTR_VI 0x08 /* Bit 3: VI intr */ +#define MI_INTR_PI 0x10 /* Bit 4: PI intr */ +#define MI_INTR_DP 0x20 /* Bit 5: DP intr */ + +/* + * The following are values to clear/set various interrupt bit mask + * They can be ORed together to manipulate multiple bits + * (MI_INTR_MASK_REG - write) + */ +#define MI_INTR_MASK_CLR_SP 0x0001 /* Bit 0: clear SP mask */ +#define MI_INTR_MASK_SET_SP 0x0002 /* Bit 1: set SP mask */ +#define MI_INTR_MASK_CLR_SI 0x0004 /* Bit 2: clear SI mask */ +#define MI_INTR_MASK_SET_SI 0x0008 /* Bit 3: set SI mask */ +#define MI_INTR_MASK_CLR_AI 0x0010 /* Bit 4: clear AI mask */ +#define MI_INTR_MASK_SET_AI 0x0020 /* Bit 5: set AI mask */ +#define MI_INTR_MASK_CLR_VI 0x0040 /* Bit 6: clear VI mask */ +#define MI_INTR_MASK_SET_VI 0x0080 /* Bit 7: set VI mask */ +#define MI_INTR_MASK_CLR_PI 0x0100 /* Bit 8: clear PI mask */ +#define MI_INTR_MASK_SET_PI 0x0200 /* Bit 9: set PI mask */ +#define MI_INTR_MASK_CLR_DP 0x0400 /* Bit 10: clear DP mask */ +#define MI_INTR_MASK_SET_DP 0x0800 /* Bit 11: set DP mask */ + +/* + * The following are values to check for interrupt mask setting + * (MI_INTR_MASK_REG - read) + */ +#define MI_INTR_MASK_SP 0x01 /* Bit 0: SP intr mask */ +#define MI_INTR_MASK_SI 0x02 /* Bit 1: SI intr mask */ +#define MI_INTR_MASK_AI 0x04 /* Bit 2: AI intr mask */ +#define MI_INTR_MASK_VI 0x08 /* Bit 3: VI intr mask */ +#define MI_INTR_MASK_PI 0x10 /* Bit 4: PI intr mask */ +#define MI_INTR_MASK_DP 0x20 /* Bit 5: DP intr mask */ + + +/************************************************************************* + * Video Interface (VI) Registers + */ +#define VI_BASE_REG 0x04400000 + +/* VI status/control (R/W): [15-0] valid bits: + * [1:0] = type[1:0] (pixel size) + * 0: blank (no data, no sync) + * 1: reserved + * 2: 5/5/5/3 ("16" bit) + * 3: 8/8/8/8 (32 bit) + * [2] = gamma_dither_enable (normally on, unless "special effect") + * [3] = gamma_enable (normally on, unless MPEG/JPEG) + * [4] = divot_enable (normally on if antialiased, unless decal lines) + * [5] = reserved - always off + * [6] = serrate (always on if interlaced, off if not) + * [7] = reserved - diagnostics only + * [9:8] = anti-alias (aa) mode[1:0] + * 0: aa & resamp (always fetch extra lines) + * 1: aa & resamp (fetch extra lines if needed) + * 2: resamp only (treat as all fully covered) + * 3: neither (replicate pixels, no interpolate) + * [11] = reserved - diagnostics only + * [15:12] = reserved + * + */ +#define VI_STATUS_REG (VI_BASE_REG+0x00) +#define VI_CONTROL_REG VI_STATUS_REG + +/* VI origin (R/W): [23:0] frame buffer origin in bytes */ +#define VI_ORIGIN_REG (VI_BASE_REG+0x04) +#define VI_DRAM_ADDR_REG VI_ORIGIN_REG + +/* VI width (R/W): [11:0] frame buffer line width in pixels */ +#define VI_WIDTH_REG (VI_BASE_REG+0x08) +#define VI_H_WIDTH_REG VI_WIDTH_REG + +/* VI vertical intr (R/W): [9:0] interrupt when current half-line = V_INTR */ +#define VI_INTR_REG (VI_BASE_REG+0x0C) +#define VI_V_INTR_REG VI_INTR_REG + +/* + * VI current vertical line (R/W): [9:0] current half line, sampled once per + * line (the lsb of V_CURRENT is constant within a field, and in + * interlaced modes gives the field number - which is constant for non- + * interlaced modes) + * - Any write to this register will clear interrupt line + */ +#define VI_CURRENT_REG (VI_BASE_REG+0x10) +#define VI_V_CURRENT_LINE_REG VI_CURRENT_REG + +/* + * VI video timing (R/W): [ 7: 0] horizontal sync width in pixels, + * [15: 8] color burst width in pixels, + * [19:16] vertical sync width in half lines, + * [29:20] start of color burst in pixels from h-sync + */ +#define VI_BURST_REG (VI_BASE_REG+0x14) +#define VI_TIMING_REG VI_BURST_REG + +/* VI vertical sync (R/W): [9:0] number of half-lines per field */ +#define VI_V_SYNC_REG (VI_BASE_REG+0x18) + +/* VI horizontal sync (R/W): [11: 0] total duration of a line in 1/4 pixel + * [20:16] a 5-bit leap pattern used for PAL only + * (h_sync_period) + */ +#define VI_H_SYNC_REG (VI_BASE_REG+0x1C) + +/* + * VI horizontal sync leap (R/W): [11: 0] identical to h_sync_period + * [27:16] identical to h_sync_period + */ +#define VI_LEAP_REG (VI_BASE_REG+0x20) +#define VI_H_SYNC_LEAP_REG VI_LEAP_REG + +/* + * VI horizontal video (R/W): [ 9: 0] end of active video in screen pixels + * : [25:16] start of active video in screen pixels + */ +#define VI_H_START_REG (VI_BASE_REG+0x24) +#define VI_H_VIDEO_REG VI_H_START_REG + +/* + * VI vertical video (R/W): [ 9: 0] end of active video in screen half-lines + * : [25:16] start of active video in screen half-lines + */ +#define VI_V_START_REG (VI_BASE_REG+0x28) +#define VI_V_VIDEO_REG VI_V_START_REG + +/* + * VI vertical burst (R/W): [ 9: 0] end of color burst enable in half-lines + * : [25:16] start of color burst enable in half-lines + */ +#define VI_V_BURST_REG (VI_BASE_REG+0x2C) + +/* VI x-scale (R/W): [11: 0] 1/horizontal scale up factor (2.10 format) + * [27:16] horizontal subpixel offset (2.10 format) + */ +#define VI_X_SCALE_REG (VI_BASE_REG+0x30) + +/* VI y-scale (R/W): [11: 0] 1/vertical scale up factor (2.10 format) + * [27:16] vertical subpixel offset (2.10 format) + */ +#define VI_Y_SCALE_REG (VI_BASE_REG+0x34) + +/* + * Patterns to interpret VI_CONTROL_REG + */ +#define VI_CTRL_TYPE_16 0x00002 /* Bit [1:0] pixel size: 16 bit */ +#define VI_CTRL_TYPE_32 0x00003 /* Bit [1:0] pixel size: 32 bit */ +#define VI_CTRL_GAMMA_DITHER_ON 0x00004 /* Bit 2: default = on */ +#define VI_CTRL_GAMMA_ON 0x00008 /* Bit 3: default = on */ +#define VI_CTRL_DIVOT_ON 0x00010 /* Bit 4: default = on */ +#define VI_CTRL_SERRATE_ON 0x00040 /* Bit 6: on if interlaced */ +#define VI_CTRL_ANTIALIAS_MASK 0x00300 /* Bit [9:8] anti-alias mode */ +#define VI_CTRL_DITHER_FILTER_ON 0x10000 /* Bit 16: dither-filter mode */ + +/* + * Possible video clocks (NTSC or PAL) + */ +#define VI_NTSC_CLOCK 48681812 /* Hz = 48.681812 MHz */ +#define VI_PAL_CLOCK 49656530 /* Hz = 49.656530 MHz */ +#define VI_MPAL_CLOCK 48628316 /* Hz = 48.628316 MHz */ + + +/************************************************************************* + * Audio Interface (AI) Registers + * + * The address and length registers are double buffered; that is, they + * can be written twice before becoming full. + * The address must be written before the length. + */ +#define AI_BASE_REG 0x04500000 + +/* AI DRAM address (W): [23:0] starting RDRAM address (8B-aligned) */ +#define AI_DRAM_ADDR_REG (AI_BASE_REG+0x00) /* R0: DRAM address */ + +/* AI length (R/W): [14:0] transfer length (v1.0) - Bottom 3 bits are ignored */ +/* [17:0] transfer length (v2.0) - Bottom 3 bits are ignored */ +#define AI_LEN_REG (AI_BASE_REG+0x04) /* R1: Length */ + +/* AI control (W): [0] DMA enable - if LSB == 1, DMA is enabled */ +#define AI_CONTROL_REG (AI_BASE_REG+0x08) /* R2: DMA Control */ + +/* + * AI status (R): [31]/[0] ai_full (addr & len buffer full), [30] ai_busy + * Note that a 1->0 transition in ai_full will set interrupt + * (W): clear audio interrupt + */ +#define AI_STATUS_REG (AI_BASE_REG+0x0C) /* R3: Status */ + +/* + * AI DAC sample period register (W): [13:0] dac rate + * - vid_clock/(dperiod + 1) is the DAC sample rate + * - (dperiod + 1) >= 66 * (aclockhp + 1) must be true + */ +#define AI_DACRATE_REG (AI_BASE_REG+0x10) /* R4: DAC rate 14-lsb*/ + +/* + * AI bit rate (W): [3:0] bit rate (abus clock half period register - aclockhp) + * - vid_clock/(2 * (aclockhp + 1)) is the DAC clock rate + * - The abus clock stops if aclockhp is zero + */ +#define AI_BITRATE_REG (AI_BASE_REG+0x14) /* R5: Bit rate 4-lsb */ + +/* Value for control register */ +#define AI_CONTROL_DMA_ON 0x01 /* LSB = 1: DMA enable*/ +#define AI_CONTROL_DMA_OFF 0x00 /* LSB = 1: DMA enable*/ + +/* Value for status register */ +#define AI_STATUS_FIFO_FULL 0x80000000 /* Bit 31: full */ +#define AI_STATUS_DMA_BUSY 0x40000000 /* Bit 30: busy */ + +/* DAC rate = video clock / audio frequency + * - DAC rate >= (66 * Bit rate) must be true + */ +#define AI_MAX_DAC_RATE 16384 /* 14-bit+1 */ +#define AI_MIN_DAC_RATE 132 + +/* Bit rate <= (DAC rate / 66) */ +#define AI_MAX_BIT_RATE 16 /* 4-bit+1 */ +#define AI_MIN_BIT_RATE 2 + +/* + * Maximum and minimum values for audio frequency based on video clocks + * max frequency = (video clock / min dac rate) + * min frequency = (video clock / max dac rate) + */ +#define AI_NTSC_MAX_FREQ 368000 /* 368 KHz */ +#define AI_NTSC_MIN_FREQ 3000 /* 3 KHz ~ 2971 Hz */ + +#define AI_PAL_MAX_FREQ 376000 /* 376 KHz */ +#define AI_PAL_MIN_FREQ 3050 /* 3 KHz ~ 3031 Hz */ + +#define AI_MPAL_MAX_FREQ 368000 /* 368 KHz */ +#define AI_MPAL_MIN_FREQ 3000 /* 3 KHz ~ 2968 Hz */ + + +/************************************************************************* + * Peripheral Interface (PI) Registers + */ +#define PI_BASE_REG 0x04600000 + +/* PI DRAM address (R/W): [23:0] starting RDRAM address */ +#define PI_DRAM_ADDR_REG (PI_BASE_REG+0x00) /* DRAM address */ + +/* PI pbus (cartridge) address (R/W): [31:0] starting AD16 address */ +#define PI_CART_ADDR_REG (PI_BASE_REG+0x04) + +/* PI read length (R/W): [23:0] read data length */ +#define PI_RD_LEN_REG (PI_BASE_REG+0x08) + +/* PI write length (R/W): [23:0] write data length */ +#define PI_WR_LEN_REG (PI_BASE_REG+0x0C) + +/* + * PI status (R): [0] DMA busy, [1] IO busy, [2], error + * (W): [0] reset controller (and abort current op), [1] clear intr + */ +#define PI_STATUS_REG (PI_BASE_REG+0x10) + +/* PI dom1 latency (R/W): [7:0] domain 1 device latency */ +#define PI_BSD_DOM1_LAT_REG (PI_BASE_REG+0x14) + +/* PI dom1 pulse width (R/W): [7:0] domain 1 device R/W strobe pulse width */ +#define PI_BSD_DOM1_PWD_REG (PI_BASE_REG+0x18) + +/* PI dom1 page size (R/W): [3:0] domain 1 device page size */ +#define PI_BSD_DOM1_PGS_REG (PI_BASE_REG+0x1C) /* page size */ + +/* PI dom1 release (R/W): [1:0] domain 1 device R/W release duration */ +#define PI_BSD_DOM1_RLS_REG (PI_BASE_REG+0x20) + +/* PI dom2 latency (R/W): [7:0] domain 2 device latency */ +#define PI_BSD_DOM2_LAT_REG (PI_BASE_REG+0x24) /* Domain 2 latency */ + +/* PI dom2 pulse width (R/W): [7:0] domain 2 device R/W strobe pulse width */ +#define PI_BSD_DOM2_PWD_REG (PI_BASE_REG+0x28) /* pulse width */ + +/* PI dom2 page size (R/W): [3:0] domain 2 device page size */ +#define PI_BSD_DOM2_PGS_REG (PI_BASE_REG+0x2C) /* page size */ + +/* PI dom2 release (R/W): [1:0] domain 2 device R/W release duration */ +#define PI_BSD_DOM2_RLS_REG (PI_BASE_REG+0x30) /* release duration */ + +#define PI_DOMAIN1_REG PI_BSD_DOM1_LAT_REG +#define PI_DOMAIN2_REG PI_BSD_DOM2_LAT_REG + +#define PI_DOM_LAT_OFS 0x00 +#define PI_DOM_PWD_OFS 0x04 +#define PI_DOM_PGS_OFS 0x08 +#define PI_DOM_RLS_OFS 0x0C + +/* + * PI status register has 3 bits active when read from (PI_STATUS_REG - read) + * Bit 0: DMA busy - set when DMA is in progress + * Bit 1: IO busy - set when IO is in progress + * Bit 2: Error - set when CPU issues IO request while DMA is busy + */ +#define PI_STATUS_ERROR 0x04 +#define PI_STATUS_IO_BUSY 0x02 +#define PI_STATUS_DMA_BUSY 0x01 + +/* PI status register has 2 bits active when written to: + * Bit 0: When set, reset PIC + * Bit 1: When set, clear interrupt flag + * The values of the two bits can be ORed together to both reset PIC and + * clear interrupt at the same time. + * + * Note: + * - The PIC does generate an interrupt at the end of each DMA. CPU + * needs to clear the interrupt flag explicitly (from an interrupt + * handler) by writing into the STATUS register with bit 1 set. + * + * - When a DMA completes, the interrupt flag is set. CPU can issue + * another request even while the interrupt flag is set (as long as + * PIC is idle). However, it is the CPU's responsibility for + * maintaining accurate correspondence between DMA completions and + * interrupts. + * + * - When PIC is reset, if PIC happens to be busy, an interrupt will + * be generated as PIC returns to idle. Otherwise, no interrupt will + * be generated and PIC remains idle. + */ +/* + * Values to clear interrupt/reset PIC (PI_STATUS_REG - write) + */ +#define PI_STATUS_RESET 0x01 +#define PI_SET_RESET PI_STATUS_RESET + +#define PI_STATUS_CLR_INTR 0x02 +#define PI_CLR_INTR PI_STATUS_CLR_INTR + +#define PI_DMA_BUFFER_SIZE 128 + +#define PI_DOM1_ADDR1 0x06000000 /* to 0x07FFFFFF */ +#define PI_DOM1_ADDR2 0x10000000 /* to 0x1FBFFFFF */ +#define PI_DOM1_ADDR3 0x1FD00000 /* to 0x7FFFFFFF */ +#define PI_DOM2_ADDR1 0x05000000 /* to 0x05FFFFFF */ +#define PI_DOM2_ADDR2 0x08000000 /* to 0x0FFFFFFF */ + + +/************************************************************************* + * RDRAM Interface (RI) Registers + */ +#define RI_BASE_REG 0x04700000 + +/* RI mode (R/W): [1:0] operating mode, [2] stop T active, [3] stop R active */ +#define RI_MODE_REG (RI_BASE_REG+0x00) + +/* RI config (R/W): [5:0] current control input, [6] current control enable */ +#define RI_CONFIG_REG (RI_BASE_REG+0x04) + +/* RI current load (W): [] any write updates current control register */ +#define RI_CURRENT_LOAD_REG (RI_BASE_REG+0x08) + +/* RI select (R/W): [2:0] receive select, [2:0] transmit select */ +#define RI_SELECT_REG (RI_BASE_REG+0x0C) + +/* RI refresh (R/W): [7:0] clean refresh delay, [15:8] dirty refresh delay, + * [16] refresh bank, [17] refresh enable + * [18] refresh optimize + */ +#define RI_REFRESH_REG (RI_BASE_REG+0x10) +#define RI_COUNT_REG RI_REFRESH_REG + +/* RI latency (R/W): [3:0] DMA latency/overlap */ +#define RI_LATENCY_REG (RI_BASE_REG+0x14) + +/* RI error (R): [0] nack error, [1] ack error */ +#define RI_RERROR_REG (RI_BASE_REG+0x18) + +/* RI error (W): [] any write clears all error bits */ +#define RI_WERROR_REG (RI_BASE_REG+0x1C) + + +/************************************************************************* + * Serial Interface (SI) Registers + */ +#define SI_BASE_REG 0x04800000 + +/* SI DRAM address (R/W): [23:0] starting RDRAM address */ +#define SI_DRAM_ADDR_REG (SI_BASE_REG+0x00) /* R0: DRAM address */ + +/* SI address read 64B (W): [] any write causes a 64B DMA write */ +#define SI_PIF_ADDR_RD64B_REG (SI_BASE_REG+0x04) /* R1: 64B PIF->DRAM */ + +/* Address SI_BASE_REG + (0x08, 0x0c, 0x14) are reserved */ + +/* SI address write 64B (W): [] any write causes a 64B DMA read */ +#define SI_PIF_ADDR_WR64B_REG (SI_BASE_REG+0x10) /* R4: 64B DRAM->PIF */ + +/* + * SI status (W): [] any write clears interrupt + * (R): [0] DMA busy, [1] IO read busy, [2] reserved + * [3] DMA error, [12] interrupt + */ +#define SI_STATUS_REG (SI_BASE_REG+0x18) /* R6: Status */ + +/* SI status register has the following bits active: + * 0: DMA busy - set when DMA is in progress + * 1: IO busy - set when IO access is in progress + * 3: DMA error - set when there are overlapping DMA requests + * 12: Interrupt - Interrupt set + */ +#define SI_STATUS_DMA_BUSY 0x0001 +#define SI_STATUS_RD_BUSY 0x0002 +#define SI_STATUS_DMA_ERROR 0x0008 +#define SI_STATUS_INTERRUPT 0x1000 + +/************************************************************************* + * Development Board GIO Control Registers + */ + +#define GIO_BASE_REG 0x18000000 + +/* Game to Host Interrupt */ +#define GIO_GIO_INTR_REG (GIO_BASE_REG+0x000) + +/* Game to Host SYNC */ +#define GIO_GIO_SYNC_REG (GIO_BASE_REG+0x400) + +/* Host to Game Interrupt */ +#define GIO_CART_INTR_REG (GIO_BASE_REG+0x800) + + +/************************************************************************* + * Common macros + */ +#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) +#define IO_READ(addr) (*(vu32 *)PHYS_TO_K1(addr)) +#define IO_WRITE(addr,data) (*(vu32 *)PHYS_TO_K1(addr)=(u32)(data)) +#define RCP_STAT_PRINT \ + rmonPrintf("current=%x start=%x end=%x dpstat=%x spstat=%x\n", \ + IO_READ(DPC_CURRENT_REG), \ + IO_READ(DPC_START_REG), \ + IO_READ(DPC_END_REG), \ + IO_READ(DPC_STATUS_REG), \ + IO_READ(SP_STATUS_REG)) + +#endif + +#endif /* _RCP_H_ */ + diff --git a/include/ultra64.h b/include/ultra64.h index f9dfe94f..e38edfd4 100644 --- a/include/ultra64.h +++ b/include/ultra64.h @@ -31,5 +31,6 @@ #include #include #include +#include #endif diff --git a/include/viint.h b/include/viint.h new file mode 100644 index 00000000..608e16a4 --- /dev/null +++ b/include/viint.h @@ -0,0 +1,70 @@ +#ifndef _VIINT_H +#define _VIINT_H +#include + +#define OS_TV_TYPE_PAL 0 +#define OS_TV_TYPE_NTSC 1 +#define OS_TV_TYPE_MPAL 2 + +//TODO: figure out what this is +#define VI_STATE_01 0x01 +#define VI_STATE_XSCALE_UPDATED 0x02 +#define VI_STATE_YSCALE_UPDATED 0x04 +#define VI_STATE_08 0x08 //related to control regs changing +#define VI_STATE_10 0x10 //swap buffer +#define VI_STATE_BLACK 0x20 //probably related to a black screen +#define VI_STATE_REPEATLINE 0x40 //repeat line? +#define VI_STATE_FADE 0x80 //fade + +#define VI_CTRL_ANTIALIAS_MODE_3 0x00300 /* Bit [9:8] anti-alias mode */ +#define VI_CTRL_ANTIALIAS_MODE_2 0x00200 /* Bit [9:8] anti-alias mode */ +#define VI_CTRL_ANTIALIAS_MODE_1 0x00100 /* Bit [9:8] anti-alias mode */ + +#define VI_SCALE_MASK 0xfff //see rcp scale_x/scale_y +#define VI_2_10_FPART_MASK 0x3ff +#define VI_SUBPIXEL_SH 0x10 + +#define BURST(hsync_width, color_width, vsync_width, color_start) \ + (hsync_width | (color_width << 8) | (vsync_width << 16) | (color_start << 20)) +#define WIDTH(v) v +#define VSYNC(v) v +#define HSYNC(duration, leap) (duration | (leap << 16)) +#define LEAP(upper, lower) ((upper << 16) | lower) +#define START(start, end) ((start << 16) | end) + +#define FTOFIX(val, i, f) ((u32)(val * (f32)(1 << f)) & ((1 << (i + f)) - 1)) + +#define F210(val) FTOFIX(val, 2, 10) +#define SCALE(scaleup, off) (F210((1.0f / (f32)scaleup)) | (F210((f32)off) << 16)) + +#define VCURRENT(v) v //seemingly unused +#define ORIGIN(v) v +#define VINTR(v) v +#define HSTART START + +typedef struct +{ + /* 0x0 */ f32 factor; + /* 0x4 */ u16 offset; + /* 0x8 */ u32 scale; +} __OSViScale; + +typedef struct +{ + /* 0x0 */ u16 state; + /* 0x2 */ u16 retraceCount; + /* 0x4 */ void *framep; + /* 0x8 */ OSViMode *modep; + /* 0xC */ u32 control; + /* 0x10 */ OSMesgQueue *msgq; + /* 0x14 */ OSMesg msg; + /* 0x18 */ __OSViScale x; + /* 0x24 */ __OSViScale y; +} __OSViContext; + +void __osViSwapContext(void); +extern __OSViContext *__osViCurr; +extern __OSViContext *__osViNext; +__OSViContext *__osViGetCurrentContext(void); +void __osViInit(void); +#endif diff --git a/lib/asm/non_matchings/osViSetEventMsg_0D2980/osViSetEventMsg.s b/lib/asm/non_matchings/osViSetEventMsg_0D2980/osViSetEventMsg.s index 9f1687c1..61a67310 100644 --- a/lib/asm/non_matchings/osViSetEventMsg_0D2980/osViSetEventMsg.s +++ b/lib/asm/non_matchings/osViSetEventMsg_0D2980/osViSetEventMsg.s @@ -6,18 +6,18 @@ glabel osViSetEventMsg /* 0D2990 800D1D90 AFA60030 */ sw $a2, 0x30($sp) /* 0D2994 800D1D94 0C034958 */ jal __osDisableInt /* 0D2998 800D1D98 AFB00018 */ sw $s0, 0x18($sp) -/* 0D299C 800D1D9C 3C0F800E */ lui $t7, %hi(D_800E4874) # $t7, 0x800e -/* 0D29A0 800D1DA0 8DEF4874 */ lw $t7, %lo(D_800E4874)($t7) +/* 0D299C 800D1D9C 3C0F800E */ lui $t7, %hi(__osViNext) # $t7, 0x800e +/* 0D29A0 800D1DA0 8DEF4874 */ lw $t7, %lo(__osViNext)($t7) /* 0D29A4 800D1DA4 8FAE0028 */ lw $t6, 0x28($sp) -/* 0D29A8 800D1DA8 3C19800E */ lui $t9, %hi(D_800E4874) # $t9, 0x800e -/* 0D29AC 800D1DAC 3C09800E */ lui $t1, %hi(D_800E4874) # $t1, 0x800e +/* 0D29A8 800D1DA8 3C19800E */ lui $t9, %hi(__osViNext) # $t9, 0x800e +/* 0D29AC 800D1DAC 3C09800E */ lui $t1, %hi(__osViNext) # $t1, 0x800e /* 0D29B0 800D1DB0 ADEE0010 */ sw $t6, 0x10($t7) -/* 0D29B4 800D1DB4 8F394874 */ lw $t9, %lo(D_800E4874)($t9) +/* 0D29B4 800D1DB4 8F394874 */ lw $t9, %lo(__osViNext)($t9) /* 0D29B8 800D1DB8 8FB8002C */ lw $t8, 0x2c($sp) /* 0D29BC 800D1DBC 00408025 */ move $s0, $v0 /* 0D29C0 800D1DC0 02002025 */ move $a0, $s0 /* 0D29C4 800D1DC4 AF380014 */ sw $t8, 0x14($t9) -/* 0D29C8 800D1DC8 8D294874 */ lw $t1, %lo(D_800E4874)($t1) +/* 0D29C8 800D1DC8 8D294874 */ lw $t1, %lo(__osViNext)($t1) /* 0D29CC 800D1DCC 8FA80030 */ lw $t0, 0x30($sp) /* 0D29D0 800D1DD0 0C034960 */ jal __osRestoreInt /* 0D29D4 800D1DD4 A5280002 */ sh $t0, 2($t1) diff --git a/lib/asm/non_matchings/unknown_0D28A0/osViSetMode.s b/lib/asm/non_matchings/unknown_0D28A0/osViSetMode.s index dbafd106..6565eed6 100644 --- a/lib/asm/non_matchings/unknown_0D28A0/osViSetMode.s +++ b/lib/asm/non_matchings/unknown_0D28A0/osViSetMode.s @@ -4,17 +4,17 @@ glabel osViSetMode /* 0D28A8 800D1CA8 AFA40028 */ sw $a0, 0x28($sp) /* 0D28AC 800D1CAC 0C034958 */ jal __osDisableInt /* 0D28B0 800D1CB0 AFB00018 */ sw $s0, 0x18($sp) -/* 0D28B4 800D1CB4 3C0F800E */ lui $t7, %hi(D_800E4874) # $t7, 0x800e -/* 0D28B8 800D1CB8 8DEF4874 */ lw $t7, %lo(D_800E4874)($t7) +/* 0D28B4 800D1CB4 3C0F800E */ lui $t7, %hi(__osViNext) # $t7, 0x800e +/* 0D28B8 800D1CB8 8DEF4874 */ lw $t7, %lo(__osViNext)($t7) /* 0D28BC 800D1CBC 8FAE0028 */ lw $t6, 0x28($sp) -/* 0D28C0 800D1CC0 3C19800E */ lui $t9, %hi(D_800E4874) # $t9, 0x800e +/* 0D28C0 800D1CC0 3C19800E */ lui $t9, %hi(__osViNext) # $t9, 0x800e /* 0D28C4 800D1CC4 24180001 */ li $t8, 1 /* 0D28C8 800D1CC8 ADEE0008 */ sw $t6, 8($t7) -/* 0D28CC 800D1CCC 8F394874 */ lw $t9, %lo(D_800E4874)($t9) -/* 0D28D0 800D1CD0 3C08800E */ lui $t0, %hi(D_800E4874) # $t0, 0x800e +/* 0D28CC 800D1CCC 8F394874 */ lw $t9, %lo(__osViNext)($t9) +/* 0D28D0 800D1CD0 3C08800E */ lui $t0, %hi(__osViNext) # $t0, 0x800e /* 0D28D4 800D1CD4 00408025 */ move $s0, $v0 /* 0D28D8 800D1CD8 A7380000 */ sh $t8, ($t9) -/* 0D28DC 800D1CDC 8D084874 */ lw $t0, %lo(D_800E4874)($t0) +/* 0D28DC 800D1CDC 8D084874 */ lw $t0, %lo(__osViNext)($t0) /* 0D28E0 800D1CE0 02002025 */ move $a0, $s0 /* 0D28E4 800D1CE4 8D090008 */ lw $t1, 8($t0) /* 0D28E8 800D1CE8 8D2A0004 */ lw $t2, 4($t1) diff --git a/lib/asm/non_matchings/unknown_0D29F0/_VirtualToPhysicalTask.s b/lib/asm/non_matchings/unknown_0D29F0/_VirtualToPhysicalTask.s deleted file mode 100644 index 6169cc80..00000000 --- a/lib/asm/non_matchings/unknown_0D29F0/_VirtualToPhysicalTask.s +++ /dev/null @@ -1,80 +0,0 @@ -glabel _VirtualToPhysicalTask -/* 0D2AF0 800D1EF0 27BDFFE0 */ addiu $sp, $sp, -0x20 -/* 0D2AF4 800D1EF4 3C0E8013 */ lui $t6, %hi(D_8012D1A0) # $t6, 0x8013 -/* 0D2AF8 800D1EF8 AFBF0014 */ sw $ra, 0x14($sp) -/* 0D2AFC 800D1EFC AFA40020 */ sw $a0, 0x20($sp) -/* 0D2B00 800D1F00 25CED1A0 */ addiu $t6, %lo(D_8012D1A0) # addiu $t6, $t6, -0x2e60 -/* 0D2B04 800D1F04 AFAE001C */ sw $t6, 0x1c($sp) -/* 0D2B08 800D1F08 01C02825 */ move $a1, $t6 -/* 0D2B0C 800D1F0C 8FA40020 */ lw $a0, 0x20($sp) -/* 0D2B10 800D1F10 0C032768 */ jal bcopy -/* 0D2B14 800D1F14 24060040 */ li $a2, 64 -/* 0D2B18 800D1F18 8FAF001C */ lw $t7, 0x1c($sp) -/* 0D2B1C 800D1F1C 8DF80010 */ lw $t8, 0x10($t7) -/* 0D2B20 800D1F20 13000005 */ beqz $t8, .L800D1F38 -/* 0D2B24 800D1F24 00000000 */ nop -/* 0D2B28 800D1F28 0C03233C */ jal osVirtualToPhysical -/* 0D2B2C 800D1F2C 03002025 */ move $a0, $t8 -/* 0D2B30 800D1F30 8FB9001C */ lw $t9, 0x1c($sp) -/* 0D2B34 800D1F34 AF220010 */ sw $v0, 0x10($t9) -.L800D1F38: -/* 0D2B38 800D1F38 8FA8001C */ lw $t0, 0x1c($sp) -/* 0D2B3C 800D1F3C 8D090018 */ lw $t1, 0x18($t0) -/* 0D2B40 800D1F40 11200005 */ beqz $t1, .L800D1F58 -/* 0D2B44 800D1F44 00000000 */ nop -/* 0D2B48 800D1F48 0C03233C */ jal osVirtualToPhysical -/* 0D2B4C 800D1F4C 01202025 */ move $a0, $t1 -/* 0D2B50 800D1F50 8FAA001C */ lw $t2, 0x1c($sp) -/* 0D2B54 800D1F54 AD420018 */ sw $v0, 0x18($t2) -.L800D1F58: -/* 0D2B58 800D1F58 8FAB001C */ lw $t3, 0x1c($sp) -/* 0D2B5C 800D1F5C 8D6C0020 */ lw $t4, 0x20($t3) -/* 0D2B60 800D1F60 11800005 */ beqz $t4, .L800D1F78 -/* 0D2B64 800D1F64 00000000 */ nop -/* 0D2B68 800D1F68 0C03233C */ jal osVirtualToPhysical -/* 0D2B6C 800D1F6C 01802025 */ move $a0, $t4 -/* 0D2B70 800D1F70 8FAD001C */ lw $t5, 0x1c($sp) -/* 0D2B74 800D1F74 ADA20020 */ sw $v0, 0x20($t5) -.L800D1F78: -/* 0D2B78 800D1F78 8FAE001C */ lw $t6, 0x1c($sp) -/* 0D2B7C 800D1F7C 8DCF0028 */ lw $t7, 0x28($t6) -/* 0D2B80 800D1F80 11E00005 */ beqz $t7, .L800D1F98 -/* 0D2B84 800D1F84 00000000 */ nop -/* 0D2B88 800D1F88 0C03233C */ jal osVirtualToPhysical -/* 0D2B8C 800D1F8C 01E02025 */ move $a0, $t7 -/* 0D2B90 800D1F90 8FB8001C */ lw $t8, 0x1c($sp) -/* 0D2B94 800D1F94 AF020028 */ sw $v0, 0x28($t8) -.L800D1F98: -/* 0D2B98 800D1F98 8FB9001C */ lw $t9, 0x1c($sp) -/* 0D2B9C 800D1F9C 8F28002C */ lw $t0, 0x2c($t9) -/* 0D2BA0 800D1FA0 11000005 */ beqz $t0, .L800D1FB8 -/* 0D2BA4 800D1FA4 00000000 */ nop -/* 0D2BA8 800D1FA8 0C03233C */ jal osVirtualToPhysical -/* 0D2BAC 800D1FAC 01002025 */ move $a0, $t0 -/* 0D2BB0 800D1FB0 8FA9001C */ lw $t1, 0x1c($sp) -/* 0D2BB4 800D1FB4 AD22002C */ sw $v0, 0x2c($t1) -.L800D1FB8: -/* 0D2BB8 800D1FB8 8FAA001C */ lw $t2, 0x1c($sp) -/* 0D2BBC 800D1FBC 8D4B0030 */ lw $t3, 0x30($t2) -/* 0D2BC0 800D1FC0 11600005 */ beqz $t3, .L800D1FD8 -/* 0D2BC4 800D1FC4 00000000 */ nop -/* 0D2BC8 800D1FC8 0C03233C */ jal osVirtualToPhysical -/* 0D2BCC 800D1FCC 01602025 */ move $a0, $t3 -/* 0D2BD0 800D1FD0 8FAC001C */ lw $t4, 0x1c($sp) -/* 0D2BD4 800D1FD4 AD820030 */ sw $v0, 0x30($t4) -.L800D1FD8: -/* 0D2BD8 800D1FD8 8FAD001C */ lw $t5, 0x1c($sp) -/* 0D2BDC 800D1FDC 8DAE0038 */ lw $t6, 0x38($t5) -/* 0D2BE0 800D1FE0 11C00005 */ beqz $t6, .L800D1FF8 -/* 0D2BE4 800D1FE4 00000000 */ nop -/* 0D2BE8 800D1FE8 0C03233C */ jal osVirtualToPhysical -/* 0D2BEC 800D1FEC 01C02025 */ move $a0, $t6 -/* 0D2BF0 800D1FF0 8FAF001C */ lw $t7, 0x1c($sp) -/* 0D2BF4 800D1FF4 ADE20038 */ sw $v0, 0x38($t7) -.L800D1FF8: -/* 0D2BF8 800D1FF8 8FBF0014 */ lw $ra, 0x14($sp) -/* 0D2BFC 800D1FFC 8FA2001C */ lw $v0, 0x1c($sp) -/* 0D2C00 800D2000 27BD0020 */ addiu $sp, $sp, 0x20 -/* 0D2C04 800D2004 03E00008 */ jr $ra -/* 0D2C08 800D2008 00000000 */ nop - diff --git a/lib/asm/non_matchings/unknown_0D29F0/func_800D1E70.s b/lib/asm/non_matchings/unknown_0D29F0/func_800D1E70.s deleted file mode 100644 index d8d9dfbf..00000000 --- a/lib/asm/non_matchings/unknown_0D29F0/func_800D1E70.s +++ /dev/null @@ -1,18 +0,0 @@ -glabel func_800D1E70 -/* 0D2A70 800D1E70 27BDFFD8 */ addiu $sp, $sp, -0x28 -/* 0D2A74 800D1E74 AFBF001C */ sw $ra, 0x1c($sp) -/* 0D2A78 800D1E78 0C034958 */ jal __osDisableInt -/* 0D2A7C 800D1E7C AFB00018 */ sw $s0, 0x18($sp) -/* 0D2A80 800D1E80 3C0E800E */ lui $t6, %hi(D_800E4870) # $t6, 0x800e -/* 0D2A84 800D1E84 8DCE4870 */ lw $t6, %lo(D_800E4870)($t6) -/* 0D2A88 800D1E88 00408025 */ move $s0, $v0 -/* 0D2A8C 800D1E8C 02002025 */ move $a0, $s0 -/* 0D2A90 800D1E90 8DCF0004 */ lw $t7, 4($t6) -/* 0D2A94 800D1E94 0C034960 */ jal __osRestoreInt -/* 0D2A98 800D1E98 AFAF0020 */ sw $t7, 0x20($sp) -/* 0D2A9C 800D1E9C 8FBF001C */ lw $ra, 0x1c($sp) -/* 0D2AA0 800D1EA0 8FA20020 */ lw $v0, 0x20($sp) -/* 0D2AA4 800D1EA4 8FB00018 */ lw $s0, 0x18($sp) -/* 0D2AA8 800D1EA8 03E00008 */ jr $ra -/* 0D2AAC 800D1EAC 27BD0028 */ addiu $sp, $sp, 0x28 - diff --git a/lib/asm/non_matchings/unknown_0D29F0/func_800D1EB0.s b/lib/asm/non_matchings/unknown_0D29F0/func_800D1EB0.s deleted file mode 100644 index 9cc7a953..00000000 --- a/lib/asm/non_matchings/unknown_0D29F0/func_800D1EB0.s +++ /dev/null @@ -1,18 +0,0 @@ -glabel func_800D1EB0 -/* 0D2AB0 800D1EB0 27BDFFD8 */ addiu $sp, $sp, -0x28 -/* 0D2AB4 800D1EB4 AFBF001C */ sw $ra, 0x1c($sp) -/* 0D2AB8 800D1EB8 0C034958 */ jal __osDisableInt -/* 0D2ABC 800D1EBC AFB00018 */ sw $s0, 0x18($sp) -/* 0D2AC0 800D1EC0 3C0E800E */ lui $t6, %hi(D_800E4874) # $t6, 0x800e -/* 0D2AC4 800D1EC4 8DCE4874 */ lw $t6, %lo(D_800E4874)($t6) -/* 0D2AC8 800D1EC8 00408025 */ move $s0, $v0 -/* 0D2ACC 800D1ECC 02002025 */ move $a0, $s0 -/* 0D2AD0 800D1ED0 8DCF0004 */ lw $t7, 4($t6) -/* 0D2AD4 800D1ED4 0C034960 */ jal __osRestoreInt -/* 0D2AD8 800D1ED8 AFAF0020 */ sw $t7, 0x20($sp) -/* 0D2ADC 800D1EDC 8FBF001C */ lw $ra, 0x1c($sp) -/* 0D2AE0 800D1EE0 8FA20020 */ lw $v0, 0x20($sp) -/* 0D2AE4 800D1EE4 8FB00018 */ lw $s0, 0x18($sp) -/* 0D2AE8 800D1EE8 03E00008 */ jr $ra -/* 0D2AEC 800D1EEC 27BD0028 */ addiu $sp, $sp, 0x28 - diff --git a/lib/asm/non_matchings/unknown_0D29F0/osSpTaskLoad.s b/lib/asm/non_matchings/unknown_0D29F0/osSpTaskLoad.s deleted file mode 100644 index ea7e021a..00000000 --- a/lib/asm/non_matchings/unknown_0D29F0/osSpTaskLoad.s +++ /dev/null @@ -1,99 +0,0 @@ -glabel osSpTaskLoad -/* 0D2C0C 800D200C 27BDFFE0 */ addiu $sp, $sp, -0x20 -/* 0D2C10 800D2010 AFBF0014 */ sw $ra, 0x14($sp) -/* 0D2C14 800D2014 AFA40020 */ sw $a0, 0x20($sp) -/* 0D2C18 800D2018 0C0347BC */ jal _VirtualToPhysicalTask -/* 0D2C1C 800D201C 8FA40020 */ lw $a0, 0x20($sp) -/* 0D2C20 800D2020 AFA2001C */ sw $v0, 0x1c($sp) -/* 0D2C24 800D2024 8FAE001C */ lw $t6, 0x1c($sp) -/* 0D2C28 800D2028 8DCF0004 */ lw $t7, 4($t6) -/* 0D2C2C 800D202C 31F80001 */ andi $t8, $t7, 1 -/* 0D2C30 800D2030 1300000B */ beqz $t8, .L800D2060 -/* 0D2C34 800D2034 00000000 */ nop -/* 0D2C38 800D2038 8DD90038 */ lw $t9, 0x38($t6) -/* 0D2C3C 800D203C 2401FFFE */ li $at, -2 -/* 0D2C40 800D2040 ADD90018 */ sw $t9, 0x18($t6) -/* 0D2C44 800D2044 8FA8001C */ lw $t0, 0x1c($sp) -/* 0D2C48 800D2048 8D09003C */ lw $t1, 0x3c($t0) -/* 0D2C4C 800D204C AD09001C */ sw $t1, 0x1c($t0) -/* 0D2C50 800D2050 8FAA0020 */ lw $t2, 0x20($sp) -/* 0D2C54 800D2054 8D4B0004 */ lw $t3, 4($t2) -/* 0D2C58 800D2058 01616024 */ and $t4, $t3, $at -/* 0D2C5C 800D205C AD4C0004 */ sw $t4, 4($t2) -.L800D2060: -/* 0D2C60 800D2060 8FA4001C */ lw $a0, 0x1c($sp) -/* 0D2C64 800D2064 0C03518C */ jal osWritebackDCache -/* 0D2C68 800D2068 24050040 */ li $a1, 64 -/* 0D2C6C 800D206C 0C033490 */ jal __osSpSetStatus -/* 0D2C70 800D2070 24042B00 */ li $a0, 11008 -/* 0D2C74 800D2074 3C040400 */ lui $a0, (0x04001000 >> 16) # lui $a0, 0x400 -/* 0D2C78 800D2078 0C035900 */ jal __osSpSetPc -/* 0D2C7C 800D207C 34841000 */ ori $a0, (0x04001000 & 0xFFFF) # ori $a0, $a0, 0x1000 -/* 0D2C80 800D2080 2401FFFF */ li $at, -1 -/* 0D2C84 800D2084 14410007 */ bne $v0, $at, .L800D20A4 -/* 0D2C88 800D2088 00000000 */ nop -.L800D208C: -/* 0D2C8C 800D208C 3C040400 */ lui $a0, (0x04001000 >> 16) # lui $a0, 0x400 -/* 0D2C90 800D2090 0C035900 */ jal __osSpSetPc -/* 0D2C94 800D2094 34841000 */ ori $a0, (0x04001000 & 0xFFFF) # ori $a0, $a0, 0x1000 -/* 0D2C98 800D2098 2401FFFF */ li $at, -1 -/* 0D2C9C 800D209C 1041FFFB */ beq $v0, $at, .L800D208C -/* 0D2CA0 800D20A0 00000000 */ nop -.L800D20A4: -/* 0D2CA4 800D20A4 3C050400 */ lui $a1, (0x04000FC0 >> 16) # lui $a1, 0x400 -/* 0D2CA8 800D20A8 34A50FC0 */ ori $a1, (0x04000FC0 & 0xFFFF) # ori $a1, $a1, 0xfc0 -/* 0D2CAC 800D20AC 24040001 */ li $a0, 1 -/* 0D2CB0 800D20B0 8FA6001C */ lw $a2, 0x1c($sp) -/* 0D2CB4 800D20B4 0C035910 */ jal __osSpRawStartDma -/* 0D2CB8 800D20B8 24070040 */ li $a3, 64 -/* 0D2CBC 800D20BC 2401FFFF */ li $at, -1 -/* 0D2CC0 800D20C0 1441000A */ bne $v0, $at, .L800D20EC -/* 0D2CC4 800D20C4 00000000 */ nop -.L800D20C8: -/* 0D2CC8 800D20C8 3C050400 */ lui $a1, (0x04000FC0 >> 16) # lui $a1, 0x400 -/* 0D2CCC 800D20CC 34A50FC0 */ ori $a1, (0x04000FC0 & 0xFFFF) # ori $a1, $a1, 0xfc0 -/* 0D2CD0 800D20D0 24040001 */ li $a0, 1 -/* 0D2CD4 800D20D4 8FA6001C */ lw $a2, 0x1c($sp) -/* 0D2CD8 800D20D8 0C035910 */ jal __osSpRawStartDma -/* 0D2CDC 800D20DC 24070040 */ li $a3, 64 -/* 0D2CE0 800D20E0 2401FFFF */ li $at, -1 -/* 0D2CE4 800D20E4 1041FFF8 */ beq $v0, $at, .L800D20C8 -/* 0D2CE8 800D20E8 00000000 */ nop -.L800D20EC: -/* 0D2CEC 800D20EC 0C035934 */ jal __osSpDeviceBusy -/* 0D2CF0 800D20F0 00000000 */ nop -/* 0D2CF4 800D20F4 10400005 */ beqz $v0, .L800D210C -/* 0D2CF8 800D20F8 00000000 */ nop -.L800D20FC: -/* 0D2CFC 800D20FC 0C035934 */ jal __osSpDeviceBusy -/* 0D2D00 800D2100 00000000 */ nop -/* 0D2D04 800D2104 1440FFFD */ bnez $v0, .L800D20FC -/* 0D2D08 800D2108 00000000 */ nop -.L800D210C: -/* 0D2D0C 800D210C 8FAD001C */ lw $t5, 0x1c($sp) -/* 0D2D10 800D2110 3C050400 */ lui $a1, (0x04001000 >> 16) # lui $a1, 0x400 -/* 0D2D14 800D2114 34A51000 */ ori $a1, (0x04001000 & 0xFFFF) # ori $a1, $a1, 0x1000 -/* 0D2D18 800D2118 24040001 */ li $a0, 1 -/* 0D2D1C 800D211C 8DA60008 */ lw $a2, 8($t5) -/* 0D2D20 800D2120 0C035910 */ jal __osSpRawStartDma -/* 0D2D24 800D2124 8DA7000C */ lw $a3, 0xc($t5) -/* 0D2D28 800D2128 2401FFFF */ li $at, -1 -/* 0D2D2C 800D212C 1441000B */ bne $v0, $at, .L800D215C -/* 0D2D30 800D2130 00000000 */ nop -.L800D2134: -/* 0D2D34 800D2134 8FAF001C */ lw $t7, 0x1c($sp) -/* 0D2D38 800D2138 3C050400 */ lui $a1, (0x04001000 >> 16) # lui $a1, 0x400 -/* 0D2D3C 800D213C 34A51000 */ ori $a1, (0x04001000 & 0xFFFF) # ori $a1, $a1, 0x1000 -/* 0D2D40 800D2140 24040001 */ li $a0, 1 -/* 0D2D44 800D2144 8DE60008 */ lw $a2, 8($t7) -/* 0D2D48 800D2148 0C035910 */ jal __osSpRawStartDma -/* 0D2D4C 800D214C 8DE7000C */ lw $a3, 0xc($t7) -/* 0D2D50 800D2150 2401FFFF */ li $at, -1 -/* 0D2D54 800D2154 1041FFF7 */ beq $v0, $at, .L800D2134 -/* 0D2D58 800D2158 00000000 */ nop -.L800D215C: -/* 0D2D5C 800D215C 8FBF0014 */ lw $ra, 0x14($sp) -/* 0D2D60 800D2160 27BD0020 */ addiu $sp, $sp, 0x20 -/* 0D2D64 800D2164 03E00008 */ jr $ra -/* 0D2D68 800D2168 00000000 */ nop - diff --git a/lib/asm/non_matchings/unknown_0D29F0/osSpTaskStartGo.s b/lib/asm/non_matchings/unknown_0D29F0/osSpTaskStartGo.s deleted file mode 100644 index 3902b339..00000000 --- a/lib/asm/non_matchings/unknown_0D29F0/osSpTaskStartGo.s +++ /dev/null @@ -1,21 +0,0 @@ -glabel osSpTaskStartGo -/* 0D2D6C 800D216C 27BDFFE8 */ addiu $sp, $sp, -0x18 -/* 0D2D70 800D2170 AFBF0014 */ sw $ra, 0x14($sp) -/* 0D2D74 800D2174 0C035934 */ jal __osSpDeviceBusy -/* 0D2D78 800D2178 AFA40018 */ sw $a0, 0x18($sp) -/* 0D2D7C 800D217C 10400005 */ beqz $v0, .L800D2194 -/* 0D2D80 800D2180 00000000 */ nop -.L800D2184: -/* 0D2D84 800D2184 0C035934 */ jal __osSpDeviceBusy -/* 0D2D88 800D2188 00000000 */ nop -/* 0D2D8C 800D218C 1440FFFD */ bnez $v0, .L800D2184 -/* 0D2D90 800D2190 00000000 */ nop -.L800D2194: -/* 0D2D94 800D2194 0C033490 */ jal __osSpSetStatus -/* 0D2D98 800D2198 24040125 */ li $a0, 293 -/* 0D2D9C 800D219C 8FBF0014 */ lw $ra, 0x14($sp) -/* 0D2DA0 800D21A0 27BD0018 */ addiu $sp, $sp, 0x18 -/* 0D2DA4 800D21A4 03E00008 */ jr $ra -/* 0D2DA8 800D21A8 00000000 */ nop - -/* 0D2DAC 800D21AC 00000000 */ nop diff --git a/lib/asm/non_matchings/unknown_0D2E40/osViSetSpecialFeatures.s b/lib/asm/non_matchings/unknown_0D2E40/osViSetSpecialFeatures.s index 8237f9a2..ca2555a8 100644 --- a/lib/asm/non_matchings/unknown_0D2E40/osViSetSpecialFeatures.s +++ b/lib/asm/non_matchings/unknown_0D2E40/osViSetSpecialFeatures.s @@ -9,8 +9,8 @@ glabel osViSetSpecialFeatures /* 0D2E7C 800D227C 31CF0001 */ andi $t7, $t6, 1 /* 0D2E80 800D2280 11E00006 */ beqz $t7, .L800D229C /* 0D2E84 800D2284 00000000 */ nop -/* 0D2E88 800D2288 3C18800E */ lui $t8, %hi(D_800E4874) # $t8, 0x800e -/* 0D2E8C 800D228C 8F184874 */ lw $t8, %lo(D_800E4874)($t8) +/* 0D2E88 800D2288 3C18800E */ lui $t8, %hi(__osViNext) # $t8, 0x800e +/* 0D2E8C 800D228C 8F184874 */ lw $t8, %lo(__osViNext)($t8) /* 0D2E90 800D2290 8F19000C */ lw $t9, 0xc($t8) /* 0D2E94 800D2294 37280008 */ ori $t0, $t9, 8 /* 0D2E98 800D2298 AF08000C */ sw $t0, 0xc($t8) @@ -19,8 +19,8 @@ glabel osViSetSpecialFeatures /* 0D2EA0 800D22A0 312A0002 */ andi $t2, $t1, 2 /* 0D2EA4 800D22A4 11400007 */ beqz $t2, .L800D22C4 /* 0D2EA8 800D22A8 00000000 */ nop -/* 0D2EAC 800D22AC 3C0B800E */ lui $t3, %hi(D_800E4874) # $t3, 0x800e -/* 0D2EB0 800D22B0 8D6B4874 */ lw $t3, %lo(D_800E4874)($t3) +/* 0D2EAC 800D22AC 3C0B800E */ lui $t3, %hi(__osViNext) # $t3, 0x800e +/* 0D2EB0 800D22B0 8D6B4874 */ lw $t3, %lo(__osViNext)($t3) /* 0D2EB4 800D22B4 2401FFF7 */ li $at, -9 /* 0D2EB8 800D22B8 8D6C000C */ lw $t4, 0xc($t3) /* 0D2EBC 800D22BC 01816824 */ and $t5, $t4, $at @@ -30,8 +30,8 @@ glabel osViSetSpecialFeatures /* 0D2EC8 800D22C8 31CF0004 */ andi $t7, $t6, 4 /* 0D2ECC 800D22CC 11E00006 */ beqz $t7, .L800D22E8 /* 0D2ED0 800D22D0 00000000 */ nop -/* 0D2ED4 800D22D4 3C19800E */ lui $t9, %hi(D_800E4874) # $t9, 0x800e -/* 0D2ED8 800D22D8 8F394874 */ lw $t9, %lo(D_800E4874)($t9) +/* 0D2ED4 800D22D4 3C19800E */ lui $t9, %hi(__osViNext) # $t9, 0x800e +/* 0D2ED8 800D22D8 8F394874 */ lw $t9, %lo(__osViNext)($t9) /* 0D2EDC 800D22DC 8F28000C */ lw $t0, 0xc($t9) /* 0D2EE0 800D22E0 35180004 */ ori $t8, $t0, 4 /* 0D2EE4 800D22E4 AF38000C */ sw $t8, 0xc($t9) @@ -40,8 +40,8 @@ glabel osViSetSpecialFeatures /* 0D2EEC 800D22EC 312A0008 */ andi $t2, $t1, 8 /* 0D2EF0 800D22F0 11400007 */ beqz $t2, .L800D2310 /* 0D2EF4 800D22F4 00000000 */ nop -/* 0D2EF8 800D22F8 3C0C800E */ lui $t4, %hi(D_800E4874) # $t4, 0x800e -/* 0D2EFC 800D22FC 8D8C4874 */ lw $t4, %lo(D_800E4874)($t4) +/* 0D2EF8 800D22F8 3C0C800E */ lui $t4, %hi(__osViNext) # $t4, 0x800e +/* 0D2EFC 800D22FC 8D8C4874 */ lw $t4, %lo(__osViNext)($t4) /* 0D2F00 800D2300 2401FFFB */ li $at, -5 /* 0D2F04 800D2304 8D8D000C */ lw $t5, 0xc($t4) /* 0D2F08 800D2308 01A15824 */ and $t3, $t5, $at @@ -51,8 +51,8 @@ glabel osViSetSpecialFeatures /* 0D2F14 800D2314 31CF0010 */ andi $t7, $t6, 0x10 /* 0D2F18 800D2318 11E00006 */ beqz $t7, .L800D2334 /* 0D2F1C 800D231C 00000000 */ nop -/* 0D2F20 800D2320 3C08800E */ lui $t0, %hi(D_800E4874) # $t0, 0x800e -/* 0D2F24 800D2324 8D084874 */ lw $t0, %lo(D_800E4874)($t0) +/* 0D2F20 800D2320 3C08800E */ lui $t0, %hi(__osViNext) # $t0, 0x800e +/* 0D2F24 800D2324 8D084874 */ lw $t0, %lo(__osViNext)($t0) /* 0D2F28 800D2328 8D18000C */ lw $t8, 0xc($t0) /* 0D2F2C 800D232C 37190010 */ ori $t9, $t8, 0x10 /* 0D2F30 800D2330 AD19000C */ sw $t9, 0xc($t0) @@ -61,8 +61,8 @@ glabel osViSetSpecialFeatures /* 0D2F38 800D2338 312A0020 */ andi $t2, $t1, 0x20 /* 0D2F3C 800D233C 11400007 */ beqz $t2, .L800D235C /* 0D2F40 800D2340 00000000 */ nop -/* 0D2F44 800D2344 3C0D800E */ lui $t5, %hi(D_800E4874) # $t5, 0x800e -/* 0D2F48 800D2348 8DAD4874 */ lw $t5, %lo(D_800E4874)($t5) +/* 0D2F44 800D2344 3C0D800E */ lui $t5, %hi(__osViNext) # $t5, 0x800e +/* 0D2F48 800D2348 8DAD4874 */ lw $t5, %lo(__osViNext)($t5) /* 0D2F4C 800D234C 2401FFEF */ li $at, -17 /* 0D2F50 800D2350 8DAB000C */ lw $t3, 0xc($t5) /* 0D2F54 800D2354 01616024 */ and $t4, $t3, $at @@ -72,14 +72,14 @@ glabel osViSetSpecialFeatures /* 0D2F60 800D2360 31CF0040 */ andi $t7, $t6, 0x40 /* 0D2F64 800D2364 11E0000D */ beqz $t7, .L800D239C /* 0D2F68 800D2368 00000000 */ nop -/* 0D2F6C 800D236C 3C18800E */ lui $t8, %hi(D_800E4874) # $t8, 0x800e -/* 0D2F70 800D2370 8F184874 */ lw $t8, %lo(D_800E4874)($t8) +/* 0D2F6C 800D236C 3C18800E */ lui $t8, %hi(__osViNext) # $t8, 0x800e +/* 0D2F70 800D2370 8F184874 */ lw $t8, %lo(__osViNext)($t8) /* 0D2F74 800D2374 3C010001 */ lui $at, 1 -/* 0D2F78 800D2378 3C09800E */ lui $t1, %hi(D_800E4874) # $t1, 0x800e +/* 0D2F78 800D2378 3C09800E */ lui $t1, %hi(__osViNext) # $t1, 0x800e /* 0D2F7C 800D237C 8F19000C */ lw $t9, 0xc($t8) /* 0D2F80 800D2380 03214025 */ or $t0, $t9, $at /* 0D2F84 800D2384 AF08000C */ sw $t0, 0xc($t8) -/* 0D2F88 800D2388 8D294874 */ lw $t1, %lo(D_800E4874)($t1) +/* 0D2F88 800D2388 8D294874 */ lw $t1, %lo(__osViNext)($t1) /* 0D2F8C 800D238C 2401FCFF */ li $at, -769 /* 0D2F90 800D2390 8D2A000C */ lw $t2, 0xc($t1) /* 0D2F94 800D2394 01415824 */ and $t3, $t2, $at @@ -89,15 +89,15 @@ glabel osViSetSpecialFeatures /* 0D2FA0 800D23A0 318D0080 */ andi $t5, $t4, 0x80 /* 0D2FA4 800D23A4 11A00010 */ beqz $t5, .L800D23E8 /* 0D2FA8 800D23A8 00000000 */ nop -/* 0D2FAC 800D23AC 3C0E800E */ lui $t6, %hi(D_800E4874) # $t6, 0x800e -/* 0D2FB0 800D23B0 8DCE4874 */ lw $t6, %lo(D_800E4874)($t6) +/* 0D2FAC 800D23AC 3C0E800E */ lui $t6, %hi(__osViNext) # $t6, 0x800e +/* 0D2FB0 800D23B0 8DCE4874 */ lw $t6, %lo(__osViNext)($t6) /* 0D2FB4 800D23B4 3C01FFFE */ lui $at, (0xFFFEFFFF >> 16) # lui $at, 0xfffe /* 0D2FB8 800D23B8 3421FFFF */ ori $at, (0xFFFEFFFF & 0xFFFF) # ori $at, $at, 0xffff /* 0D2FBC 800D23BC 8DCF000C */ lw $t7, 0xc($t6) -/* 0D2FC0 800D23C0 3C08800E */ lui $t0, %hi(D_800E4874) # $t0, 0x800e +/* 0D2FC0 800D23C0 3C08800E */ lui $t0, %hi(__osViNext) # $t0, 0x800e /* 0D2FC4 800D23C4 01E1C824 */ and $t9, $t7, $at /* 0D2FC8 800D23C8 ADD9000C */ sw $t9, 0xc($t6) -/* 0D2FCC 800D23CC 8D084874 */ lw $t0, %lo(D_800E4874)($t0) +/* 0D2FCC 800D23CC 8D084874 */ lw $t0, %lo(__osViNext)($t0) /* 0D2FD0 800D23D0 8D0A0008 */ lw $t2, 8($t0) /* 0D2FD4 800D23D4 8D18000C */ lw $t8, 0xc($t0) /* 0D2FD8 800D23D8 8D4B0004 */ lw $t3, 4($t2) @@ -105,8 +105,8 @@ glabel osViSetSpecialFeatures /* 0D2FE0 800D23E0 03096025 */ or $t4, $t8, $t1 /* 0D2FE4 800D23E4 AD0C000C */ sw $t4, 0xc($t0) .L800D23E8: -/* 0D2FE8 800D23E8 3C0D800E */ lui $t5, %hi(D_800E4874) # $t5, 0x800e -/* 0D2FEC 800D23EC 8DAD4874 */ lw $t5, %lo(D_800E4874)($t5) +/* 0D2FE8 800D23E8 3C0D800E */ lui $t5, %hi(__osViNext) # $t5, 0x800e +/* 0D2FEC 800D23EC 8DAD4874 */ lw $t5, %lo(__osViNext)($t5) /* 0D2FF0 800D23F0 02002025 */ move $a0, $s0 /* 0D2FF4 800D23F4 95AF0000 */ lhu $t7, ($t5) /* 0D2FF8 800D23F8 35F90008 */ ori $t9, $t7, 8 diff --git a/lib/asm/non_matchings/unknown_0D3020/__osViGetCurrentContext.s b/lib/asm/non_matchings/unknown_0D3020/__osViGetCurrentContext.s deleted file mode 100644 index aaf4a0b6..00000000 --- a/lib/asm/non_matchings/unknown_0D3020/__osViGetCurrentContext.s +++ /dev/null @@ -1,6 +0,0 @@ -glabel __osViGetCurrentContext -/* 0D6C80 800D6080 3C02800E */ lui $v0, 0x800e -/* 0D6C84 800D6084 03E00008 */ jr $ra -/* 0D6C88 800D6088 8C424870 */ lw $v0, 0x4870($v0) - -/* 0D6C8C 800D608C 00000000 */ nop diff --git a/lib/asm/non_matchings/unknown_0D3020/__osViSwapContext.s b/lib/asm/non_matchings/unknown_0D3020/__osViSwapContext.s index 83362c43..85c395bf 100644 --- a/lib/asm/non_matchings/unknown_0D3020/__osViSwapContext.s +++ b/lib/asm/non_matchings/unknown_0D3020/__osViSwapContext.s @@ -5,9 +5,9 @@ glabel __osViSwapContext /* 0D6C9C 800D609C AFB20020 */ sw $s2, 0x20($sp) /* 0D6CA0 800D60A0 AFB00018 */ sw $s0, 0x18($sp) /* 0D6CA4 800D60A4 AFA00030 */ sw $zero, 0x30($sp) -/* 0D6CA8 800D60A8 3C11800E */ lui $s1, %hi(D_800E4874) # $s1, 0x800e +/* 0D6CA8 800D60A8 3C11800E */ lui $s1, %hi(__osViNext) # $s1, 0x800e /* 0D6CAC 800D60AC 3C0EA440 */ lui $t6, %hi(D_A4400010) # $t6, 0xa440 -/* 0D6CB0 800D60B0 8E314874 */ lw $s1, %lo(D_800E4874)($s1) +/* 0D6CB0 800D60B0 8E314874 */ lw $s1, %lo(__osViNext)($s1) /* 0D6CB4 800D60B4 8DCF0010 */ lw $t7, %lo(D_A4400010)($t6) /* 0D6CB8 800D60B8 8E300008 */ lw $s0, 8($s1) /* 0D6CBC 800D60BC 31F80001 */ andi $t8, $t7, 1 @@ -159,7 +159,7 @@ glabel __osViSwapContext /* 0D6ED8 800D62D8 AD0C0008 */ sw $t4, %lo(D_A4400008)($t0) /* 0D6EDC 800D62DC 8E0D000C */ lw $t5, 0xc($s0) /* 0D6EE0 800D62E0 3C09A440 */ lui $t1, %hi(D_A440001C) # $t1, 0xa440 -/* 0D6EE4 800D62E4 3C01800E */ lui $at, %hi(D_800E4874) # $at, 0x800e +/* 0D6EE4 800D62E4 3C01800E */ lui $at, %hi(__osViNext) # $at, 0x800e /* 0D6EE8 800D62E8 ADED0014 */ sw $t5, %lo(D_A4400014)($t7) /* 0D6EEC 800D62EC 8E0E0010 */ lw $t6, 0x10($s0) /* 0D6EF0 800D62F0 AF0E0018 */ sw $t6, %lo(D_A4400018)($t8) @@ -193,22 +193,22 @@ glabel __osViSwapContext /* 0D6F60 800D6360 020F7021 */ addu $t6, $s0, $t7 /* 0D6F64 800D6364 8DD80038 */ lw $t8, 0x38($t6) /* 0D6F68 800D6368 3C0DA440 */ lui $t5, 0xa440 -/* 0D6F6C 800D636C 3C0F800E */ lui $t7, %hi(D_800E4870) # $t7, 0x800e +/* 0D6F6C 800D636C 3C0F800E */ lui $t7, %hi(__osViCurr) # $t7, 0x800e /* 0D6F70 800D6370 AF38000C */ sw $t8, %lo(D_A440000C)($t9) /* 0D6F74 800D6374 8E290020 */ lw $t1, 0x20($s1) -/* 0D6F78 800D6378 3C18800E */ lui $t8, %hi(D_800E4870) # $t8, 0x800e -/* 0D6F7C 800D637C 3C0E800E */ lui $t6, %hi(D_800E4874) # $t6, 0x800e +/* 0D6F78 800D6378 3C18800E */ lui $t8, %hi(__osViCurr) # $t8, 0x800e +/* 0D6F7C 800D637C 3C0E800E */ lui $t6, %hi(__osViNext) # $t6, 0x800e /* 0D6F80 800D6380 AD490030 */ sw $t1, %lo(D_A4400030)($t2) /* 0D6F84 800D6384 8E2B002C */ lw $t3, 0x2c($s1) /* 0D6F88 800D6388 AD8B0034 */ sw $t3, %lo(D_A4400034)($t4) /* 0D6F8C 800D638C 8E28000C */ lw $t0, 0xc($s1) /* 0D6F90 800D6390 ADA80000 */ sw $t0, ($t5) -/* 0D6F94 800D6394 8DEF4870 */ lw $t7, %lo(D_800E4870)($t7) -/* 0D6F98 800D6398 AC2F4874 */ sw $t7, %lo(D_800E4874)($at) -/* 0D6F9C 800D639C 3C01800E */ lui $at, %hi(D_800E4870) # $at, 0x800e -/* 0D6FA0 800D63A0 AC314870 */ sw $s1, %lo(D_800E4870)($at) -/* 0D6FA4 800D63A4 8F184870 */ lw $t8, %lo(D_800E4870)($t8) -/* 0D6FA8 800D63A8 8DCE4874 */ lw $t6, %lo(D_800E4874)($t6) +/* 0D6F94 800D6394 8DEF4870 */ lw $t7, %lo(__osViCurr)($t7) +/* 0D6F98 800D6398 AC2F4874 */ sw $t7, %lo(__osViNext)($at) +/* 0D6F9C 800D639C 3C01800E */ lui $at, %hi(__osViCurr) # $at, 0x800e +/* 0D6FA0 800D63A0 AC314870 */ sw $s1, %lo(__osViCurr)($at) +/* 0D6FA4 800D63A4 8F184870 */ lw $t8, %lo(__osViCurr)($t8) +/* 0D6FA8 800D63A8 8DCE4874 */ lw $t6, %lo(__osViNext)($t6) /* 0D6FAC 800D63AC 270A0030 */ addiu $t2, $t8, 0x30 .L800D63B0: /* 0D6FB0 800D63B0 8F010000 */ lw $at, ($t8) diff --git a/lib/asm/non_matchings/unknown_0D3160/__osViInit.s b/lib/asm/non_matchings/unknown_0D3160/__osViInit.s index 3c368296..c94f2547 100644 --- a/lib/asm/non_matchings/unknown_0D3160/__osViInit.s +++ b/lib/asm/non_matchings/unknown_0D3160/__osViInit.s @@ -7,23 +7,23 @@ glabel __osViInit /* 0D3724 800D2B24 24050060 */ li $a1, 96 /* 0D3728 800D2B28 3C0E800E */ lui $t6, %hi(D_800E4810) # $t6, 0x800e /* 0D372C 800D2B2C 25CE4810 */ addiu $t6, %lo(D_800E4810) # addiu $t6, $t6, 0x4810 -/* 0D3730 800D2B30 3C01800E */ lui $at, %hi(D_800E4870) # $at, 0x800e -/* 0D3734 800D2B34 AC2E4870 */ sw $t6, %lo(D_800E4870)($at) -/* 0D3738 800D2B38 3C01800E */ lui $at, %hi(D_800E4874) # $at, 0x800e +/* 0D3730 800D2B30 3C01800E */ lui $at, %hi(__osViCurr) # $at, 0x800e +/* 0D3734 800D2B34 AC2E4870 */ sw $t6, %lo(__osViCurr)($at) +/* 0D3738 800D2B38 3C01800E */ lui $at, %hi(__osViNext) # $at, 0x800e /* 0D373C 800D2B3C 25CF0030 */ addiu $t7, $t6, 0x30 -/* 0D3740 800D2B40 AC2F4874 */ sw $t7, %lo(D_800E4874)($at) +/* 0D3740 800D2B40 AC2F4874 */ sw $t7, %lo(__osViNext)($at) /* 0D3744 800D2B44 24180001 */ li $t8, 1 /* 0D3748 800D2B48 A5D80032 */ sh $t8, 0x32($t6) -/* 0D374C 800D2B4C 3C08800E */ lui $t0, %hi(D_800E4870) # $t0, 0x800e -/* 0D3750 800D2B50 8D084870 */ lw $t0, %lo(D_800E4870)($t0) +/* 0D374C 800D2B4C 3C08800E */ lui $t0, %hi(__osViCurr) # $t0, 0x800e +/* 0D3750 800D2B50 8D084870 */ lw $t0, %lo(__osViCurr)($t0) /* 0D3754 800D2B54 24190001 */ li $t9, 1 /* 0D3758 800D2B58 3C098000 */ lui $t1, %hi(osTvType) # $t1, 0x8000 /* 0D375C 800D2B5C A5190002 */ sh $t9, 2($t0) /* 0D3760 800D2B60 8D290300 */ lw $t1, %lo(osTvType)($t1) /* 0D3764 800D2B64 1520000B */ bnez $t1, .L800D2B94 /* 0D3768 800D2B68 00000000 */ nop -/* 0D376C 800D2B6C 3C0B800E */ lui $t3, %hi(D_800E4874) # $t3, 0x800e -/* 0D3770 800D2B70 8D6B4874 */ lw $t3, %lo(D_800E4874)($t3) +/* 0D376C 800D2B6C 3C0B800E */ lui $t3, %hi(__osViNext) # $t3, 0x800e +/* 0D3770 800D2B70 8D6B4874 */ lw $t3, %lo(__osViNext)($t3) /* 0D3774 800D2B74 3C0A800E */ lui $t2, %hi(D_800E4760) # $t2, 0x800e /* 0D3778 800D2B78 254A4760 */ addiu $t2, %lo(D_800E4760) # addiu $t2, $t2, 0x4760 /* 0D377C 800D2B7C 3C0C02F5 */ lui $t4, (0x02F5B2D2 >> 16) # lui $t4, 0x2f5 @@ -38,8 +38,8 @@ glabel __osViInit /* 0D379C 800D2B9C 24010002 */ li $at, 2 /* 0D37A0 800D2BA0 15A1000B */ bne $t5, $at, .L800D2BD0 /* 0D37A4 800D2BA4 00000000 */ nop -/* 0D37A8 800D2BA8 3C18800E */ lui $t8, %hi(D_800E4874) # $t8, 0x800e -/* 0D37AC 800D2BAC 8F184874 */ lw $t8, %lo(D_800E4874)($t8) +/* 0D37A8 800D2BA8 3C18800E */ lui $t8, %hi(__osViNext) # $t8, 0x800e +/* 0D37AC 800D2BAC 8F184874 */ lw $t8, %lo(__osViNext)($t8) /* 0D37B0 800D2BB0 3C0F800E */ lui $t7, %hi(D_800E47B0) # $t7, 0x800e /* 0D37B4 800D2BB4 25EF47B0 */ addiu $t7, %lo(D_800E47B0) # addiu $t7, $t7, 0x47b0 /* 0D37B8 800D2BB8 3C0E02E6 */ lui $t6, (0x02E6025C >> 16) # lui $t6, 0x2e6 @@ -49,8 +49,8 @@ glabel __osViInit /* 0D37C8 800D2BC8 1000000A */ b .L800D2BF4 /* 0D37CC 800D2BCC AC2E4878 */ sw $t6, %lo(D_800E4878)($at) .L800D2BD0: -/* 0D37D0 800D2BD0 3C08800E */ lui $t0, %hi(D_800E4874) # $t0, 0x800e -/* 0D37D4 800D2BD4 8D084874 */ lw $t0, %lo(D_800E4874)($t0) +/* 0D37D0 800D2BD0 3C08800E */ lui $t0, %hi(__osViNext) # $t0, 0x800e +/* 0D37D4 800D2BD4 8D084874 */ lw $t0, %lo(__osViNext)($t0) /* 0D37D8 800D2BD8 3C19800E */ lui $t9, %hi(D_800E4710) # $t9, 0x800e /* 0D37DC 800D2BDC 27394710 */ addiu $t9, %lo(D_800E4710) # addiu $t9, $t9, 0x4710 /* 0D37E0 800D2BE0 3C0902E6 */ lui $t1, (0x02E6D354 >> 16) # lui $t1, 0x2e6 @@ -59,12 +59,12 @@ glabel __osViInit /* 0D37EC 800D2BEC AD190008 */ sw $t9, 8($t0) /* 0D37F0 800D2BF0 AC294878 */ sw $t1, %lo(D_800E4878)($at) .L800D2BF4: -/* 0D37F4 800D2BF4 3C0B800E */ lui $t3, %hi(D_800E4874) # $t3, 0x800e -/* 0D37F8 800D2BF8 8D6B4874 */ lw $t3, %lo(D_800E4874)($t3) +/* 0D37F4 800D2BF4 3C0B800E */ lui $t3, %hi(__osViNext) # $t3, 0x800e +/* 0D37F8 800D2BF8 8D6B4874 */ lw $t3, %lo(__osViNext)($t3) /* 0D37FC 800D2BFC 240A0020 */ li $t2, 32 -/* 0D3800 800D2C00 3C0C800E */ lui $t4, %hi(D_800E4874) # $t4, 0x800e +/* 0D3800 800D2C00 3C0C800E */ lui $t4, %hi(__osViNext) # $t4, 0x800e /* 0D3804 800D2C04 A56A0000 */ sh $t2, ($t3) -/* 0D3808 800D2C08 8D8C4874 */ lw $t4, %lo(D_800E4874)($t4) +/* 0D3808 800D2C08 8D8C4874 */ lw $t4, %lo(__osViNext)($t4) /* 0D380C 800D2C0C 3C18A440 */ lui $t8, %hi(D_A4400010) # $t8, 0xa440 /* 0D3810 800D2C10 8D8D0008 */ lw $t5, 8($t4) /* 0D3814 800D2C14 8DAF0004 */ lw $t7, 4($t5) diff --git a/lib/src/osGetTime.c b/lib/src/osGetTime.c new file mode 100644 index 00000000..d613e0a6 --- /dev/null +++ b/lib/src/osGetTime.c @@ -0,0 +1,21 @@ +/* The comment below is needed for this file to be picked up by generate_ld */ +/* RAM_POS: 0x800D21B0 */ + +#include "libultra_internal.h" + +extern OSTime __osCurrentTime;//__osCurrentTime +extern u32 __osBaseCounter; //__osBaseCounter + +OSTime osGetTime() +{ + u32 tmptime; + u32 elapseCount; + OSTime currentCount; + register u32 saveMask; + saveMask = __osDisableInt(); + tmptime = osGetCount(); + elapseCount = tmptime - __osBaseCounter; + currentCount = __osCurrentTime; + __osRestoreInt(saveMask); + return currentCount + elapseCount; +} \ No newline at end of file diff --git a/lib/src/osViBlack.c b/lib/src/osViBlack.c index 0d823012..f0599ff7 100644 --- a/lib/src/osViBlack.c +++ b/lib/src/osViBlack.c @@ -3,14 +3,14 @@ #include "libultra_internal.h" -extern OSViContext *D_800E4874; +extern OSViContext *__osViNext; // TODO: name magic constants void osViBlack(u8 active) { register u32 int_disabled = __osDisableInt(); if (active) { - D_800E4874->unk00 |= 0x20; + __osViNext->unk00 |= 0x20; } else { - D_800E4874->unk00 &= ~0x20; + __osViNext->unk00 &= ~0x20; } __osRestoreInt(int_disabled); } diff --git a/lib/src/osViSwapBuffer.c b/lib/src/osViSwapBuffer.c index 710fea86..634c8731 100644 --- a/lib/src/osViSwapBuffer.c +++ b/lib/src/osViSwapBuffer.c @@ -3,11 +3,11 @@ #include "libultra_internal.h" -extern OSViContext* D_800E4874; +extern OSViContext* __osViNext; void osViSwapBuffer(void* frameBufPtr){ u32 saveMask = __osDisableInt(); - D_800E4874->buffer = frameBufPtr; - D_800E4874->unk00 |= 0x10; + __osViNext->buffer = frameBufPtr; + __osViNext->unk00 |= 0x10; __osRestoreInt(saveMask); } diff --git a/lib/src/unknown_0D29F0.c b/lib/src/unknown_0D29F0.c index 750a4cfc..e9de3a33 100644 --- a/lib/src/unknown_0D29F0.c +++ b/lib/src/unknown_0D29F0.c @@ -5,26 +5,125 @@ #include "macros.h" #include "libultra_internal.h" -extern OSTime __osCurrentTime;//__osCurrentTime -extern u32 __osBaseCounter; //__osBaseCounter +typedef struct +{ + /* 0x0 */ f32 factor; + /* 0x4 */ u16 offset; + /* 0x8 */ u32 scale; +} __OSViScale; + +typedef struct +{ + /* 0x0 */ u16 state; + /* 0x2 */ u16 retraceCount; + /* 0x4 */ void *framep; + /* 0x8 */ OSViMode *modep; + /* 0xC */ u32 control; + /* 0x10 */ OSMesgQueue *msgq; + /* 0x14 */ OSMesg msg; + /* 0x18 */ __OSViScale x; + /* 0x24 */ __OSViScale y; +} __OSViContext; + +extern __OSViContext *__osViCurr; +extern __OSViContext *__osViNext; GLOBAL_ASM("lib/asm/non_matchings/unknown_0D29F0/func_800D1DF0.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D29F0/func_800D1E70.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D29F0/func_800D1EB0.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D29F0/_VirtualToPhysicalTask.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D29F0/osSpTaskLoad.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D29F0/osSpTaskStartGo.s") -OSTime osGetTime() -{ - u32 tmptime; - u32 elapseCount; - OSTime currentCount; +void *osViGetCurrentFramebuffer(void){ register u32 saveMask; + void *framep; + saveMask = __osDisableInt(); - tmptime = osGetCount(); - elapseCount = tmptime - __osBaseCounter; - currentCount = __osCurrentTime; + framep = __osViCurr->framep; __osRestoreInt(saveMask); - return currentCount + elapseCount; + return framep; } + +void *osViGetNextFramebuffer(void){ + register u32 saveMask; + void *framep; + + saveMask = __osDisableInt(); + framep = __osViNext->framep; + __osRestoreInt(saveMask); + return framep; +} + + +//TODO Split into sptask.c and seperate header + +#define OS_TASK_YIELDED 0x0001 + +#define SP_CLR_HALT 0x00001 /* Bit 0: clear halt */ +#define SP_CLR_BROKE 0x00004 /* Bit 2: clear broke */ +#define SP_CLR_SSTEP 0x00020 /* Bit 5: clear sstep */ +#define SP_SET_INTR_BREAK 0x00100 /* Bit 8: set intr on break */ +#define SP_CLR_SIG0 0x00200 /* Bit 9: clear signal 0 */ +#define SP_CLR_SIG1 0x00800 /* Bit 11: clear signal 1 */ +#define SP_CLR_SIG2 0x02000 /* Bit 11: clear signal 1 */ + + + +#define SP_CLR_YIELD SP_CLR_SIG0 +#define SP_CLR_YIELDED SP_CLR_SIG1 +#define SP_CLR_TASKDONE SP_CLR_SIG2 + +#define SP_IMEM_START 0x04001000 /* read/write */ + +#define _osVirtualToPhysical(ptr) \ + if (ptr != NULL) \ + { \ + ptr = (void *)osVirtualToPhysical(ptr); \ + } + +extern OSTask D_8012D1A0; +OSTask *_VirtualToPhysicalTask(OSTask *intp) +{ + OSTask *tp; + tp = &D_8012D1A0; + bcopy(intp, tp, sizeof(OSTask)); + + _osVirtualToPhysical(tp->t.ucode); + _osVirtualToPhysical(tp->t.ucode_data); + _osVirtualToPhysical(tp->t.dram_stack); + _osVirtualToPhysical(tp->t.output_buff); + _osVirtualToPhysical(tp->t.output_buff_size); + _osVirtualToPhysical(tp->t.data_ptr); + _osVirtualToPhysical(tp->t.yield_data_ptr); + return tp; +} + +void osSpTaskLoad(OSTask *intp){ + + OSTask *tp; + tp = _VirtualToPhysicalTask(intp); + if (tp->t.flags & OS_TASK_YIELDED) + { + tp->t.ucode_data = tp->t.yield_data_ptr; + tp->t.ucode_data_size = tp->t.yield_data_size; + intp->t.flags &= ~OS_TASK_YIELDED; + } + osWritebackDCache(tp, sizeof(OSTask)); + __osSpSetStatus(SP_CLR_YIELD | SP_CLR_YIELDED | SP_CLR_TASKDONE | SP_SET_INTR_BREAK); + while (__osSpSetPc(SP_IMEM_START) == -1) + ; + + while (__osSpRawStartDma(1, (SP_IMEM_START - sizeof(*tp)), tp, + sizeof(OSTask)) == -1) + ; + + while (__osSpDeviceBusy()) + ; + + while (__osSpRawStartDma(1, SP_IMEM_START, tp->t.ucode_boot, + tp->t.ucode_boot_size) == -1) + ; +} + +void osSpTaskStartGo(OSTask *tp){ + while (__osSpDeviceBusy()); + + __osSpSetStatus(SP_SET_INTR_BREAK | SP_CLR_SSTEP | SP_CLR_BROKE | SP_CLR_HALT); +} + diff --git a/lib/src/unknown_0D5EC0.c b/lib/src/unknown_0D5EC0.c index 5465d81e..1a03639b 100644 --- a/lib/src/unknown_0D5EC0.c +++ b/lib/src/unknown_0D5EC0.c @@ -3,9 +3,7 @@ #include "macros.h" #include "libultra_internal.h" - -extern OSThread* __osRunningThread; -extern OSThread* __RunQueue; +#include "viint.h" GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSiDeviceBusy.s") GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSumcalc.s") @@ -17,28 +15,8 @@ GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osCheckId.s") GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osPfsRWInode.s") GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osPfsSelectBank.s") GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osDpDeviceBusy.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osViGetCurrentContext.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osViSwapContext.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/func_800D63F0.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSpSetPc.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSpRawStartDma.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSpDeviceBusy.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osResetGlobalIntMask.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/osEPiRawWriteIo.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/osYieldThread.s") -/*extern void __osEnqueueAndYield(OSThread **); -extern void __osRestoreInt(u32); -void osYieldThread(void){ - register u32 saveMask = __osDisableInt(); - __osRunningThread->state = OS_STATE_RUNNABLE; - __osEnqueueAndYield(&__RunQueue); - __osRestoreInt(saveMask); -}*/ -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/osDestroyThread.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/_Litob.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/_Genld.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/_Ldtob.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSetCompare.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/lldiv.s") -GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/ldiv.s") \ No newline at end of file +__OSViContext *__osViGetCurrentContext(void){ + return __osViCurr; +} + diff --git a/lib/src/unknown_0D6C90.c b/lib/src/unknown_0D6C90.c new file mode 100644 index 00000000..5f57cdd4 --- /dev/null +++ b/lib/src/unknown_0D6C90.c @@ -0,0 +1,34 @@ +/* The comment below is needed for this file to be picked up by generate_ld */ +/* RAM_POS: 0x800D6090 */ + +#include "macros.h" +#include "libultra_internal.h" +#include "viint.h" + +extern OSThread* __osRunningThread; +extern OSThread* __RunQueue; + +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osViSwapContext.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/func_800D63F0.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSpSetPc.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSpRawStartDma.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSpDeviceBusy.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osResetGlobalIntMask.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/osEPiRawWriteIo.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/osYieldThread.s") +/*extern void __osEnqueueAndYield(OSThread **); +extern void __osRestoreInt(u32); +void osYieldThread(void){ + register u32 saveMask = __osDisableInt(); + __osRunningThread->state = OS_STATE_RUNNABLE; + __osEnqueueAndYield(&__RunQueue); + __osRestoreInt(saveMask); +}*/ + +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/osDestroyThread.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/_Litob.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/_Genld.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/_Ldtob.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/__osSetCompare.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/lldiv.s") +GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3020/ldiv.s") \ No newline at end of file diff --git a/src/unknown_071730.c b/src/unknown_071730.c index 4bac24e2..3e1952b5 100644 --- a/src/unknown_071730.c +++ b/src/unknown_071730.c @@ -68,32 +68,30 @@ void func_8006F53C(s32*); void func_80071440(s32 arg0); -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_071730/func_80070B30.s") -#else + void func_80070B30(void) { - D_801235C0 = -1; - // Issue with a0 - func_80070BE4(&D_8012D3F0, 0x80400000 - (s32)(&D_8012D3F0), 1600); + s32 tmp = -1; + D_801235C0 = tmp; + if(1){ + func_80070BE4(&D_8012D3F0, 0x80400000 - (s32)(&D_8012D3F0), 1600); + } func_800710B0(2); D_80123DC8 = 0; } -#endif -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_071730/func_80070B78.s") -#else -// Has stack issues s32 *func_80070B78(s32 arg0, s32 arg1) { - s32 *temp, *temp2; s32 temp3; - temp = func_8006F510(); + unk80070BE4_8 * temp4; + s32 unused_2; + s32 *temp = func_8006F510(); + s32 *temp2; + temp3 = arg0 + (arg1 * sizeof(unk80070BE4_8)); - temp2 = func_80070BE4((unk80070BE4_8 *)func_80070C9C(temp3, -1), temp3, arg1); + temp4 = (unk80070BE4_8 *)func_80070C9C(temp3, -1); + temp2 = func_80070BE4(temp4, temp3, arg1); func_8006F53C(temp); return temp2; } -#endif #if 1 GLOBAL_ASM("asm/non_matchings/unknown_071730/func_80070BE4.s") @@ -103,13 +101,16 @@ unk80070BE4_8 *func_80070BE4(unk80070BE4_8 *arg0, s32 size, s32 arg2) { unk80070BE4 *temp; unk80070BE4_8 *temp2; unk80070BE4_8_0 *temp3; + s32 tmp = ++D_801235C0; + //s32 tmp2; - temp = &D_80123580[++D_801235C0]; + temp = D_80123580 + tmp; temp->unk0 = arg2; temp->unk4 = 0; temp->unk8 = arg0; temp->size = size; + for(i = 0; i < temp->unk0; i++) { arg0[i].unkE = i; } diff --git a/src/unknown_072E50.c b/src/unknown_072E50.c index c4294797..662879aa 100644 --- a/src/unknown_072E50.c +++ b/src/unknown_072E50.c @@ -83,7 +83,6 @@ GLOBAL_ASM("asm/non_matchings/unknown_072E50/func_800766D4.s") GLOBAL_ASM("asm/non_matchings/unknown_072E50/func_80076924.s") GLOBAL_ASM("asm/non_matchings/unknown_072E50/func_8007698C.s") GLOBAL_ASM("asm/non_matchings/unknown_072E50/func_80076A38.s") -//GLOBAL_ASM("asm/non_matchings/unknown_072E50/func_80076AF4.s") s32 func_80076AF4(s32 arg0, s32 arg1) { s32* temp; diff --git a/src/unknown_079F50.c b/src/unknown_079F50.c index 981de577..9306726f 100644 --- a/src/unknown_079F50.c +++ b/src/unknown_079F50.c @@ -9,6 +9,8 @@ #define OS_SC_PRE_NMI_MSG 4 #define OS_SC_MAX_MESGS 8 +#define OS_SC_YIELD 2 + typedef struct { short type; char misc[30]; @@ -66,6 +68,7 @@ extern OSViMode D_800E3900[];//osViModeTable; extern s32 D_80126120; void __scMain(void); +void __scExec(OSSched *sc, OSScTask *sp, OSScTask *dp); void osCreateScheduler(OSSched *sc, void *stack, OSPri priority, u8 mode, u8 numFields){ sc->curRSPTask = 0; @@ -146,14 +149,170 @@ GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_8007957C.s") GLOBAL_ASM("asm/non_matchings/unknown_079F50/__scMain.s") GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079760.s") GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079818.s") -GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079B44.s") -GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079D5C.s") -GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079DE8.s") -GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079E40.s") -GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079F40.s") -void __scExec(OSSched *sc, OSScTask *sp, OSScTask *dp) -{ + +#if 1 +GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_80079B44.s") +#else +extern f32 D_800DE740; +extern f32 D_800DE744; +extern f32 D_800DE748; +extern f32 D_800DE74C; +extern u32 D_800DE750; +extern f32 D_800E796C; +extern u32 D_80126124; +void func_80079B44(OSSched *sc){ + OSScTask *t, *sp = 0, *dp = 0; + s32 state; + u32 delta; + f32 tmp1; + + + //assert(sc->curRSPTask); + + t = sc->curRSPTask; + sc->curRSPTask = 0; + + if (t->list.t.type == 2) { + D_80126124 = osGetCount(); + delta = D_80126124 - D_80126120; + tmp1 = (f32) delta; + if(delta < 0){ + tmp1 += 4294967296.0; + } + D_800DE74C = tmp1*60.0f/D_800E796C; + D_800DE744 = D_800DE744 + D_800DE74C; + if(D_800DE740 < D_800DE74C){ + D_800DE740 = D_800DE74C; + } + if(D_800DE750%1000 == 1 || D_800DE750%1000 == 2){ + D_800DE748 = D_800DE744/500.0f; + D_800DE744 = 0.0f; + D_800DE740 = 0.0f; + } + } + if(t->state & 0x10){ + if(func_800D1DF0(&(t->list))){ + t->state |= 0x20; + if ((t->flags & 0x07) == -3) { + + /* push the task back on the list */ + t->next = sc->gfxListHead; + sc->gfxListHead = t; + if (sc->gfxListTail == 0) + sc->gfxListTail = t; + } + } + else{ + t->state &= -3; + } + } + else { + t->state &= -3; + __scTaskComplete(sc, t); + } + + state = ((sc->curRSPTask == 0) << 1) | (sc->curRDPTask == 0); + if ( (__scSchedule (sc, &sp, &dp, state)) != state) + __scExec(sc, sp, dp); +} +#endif + +void __scHandleRDP(OSSched *sc){ + OSScTask *t, *sp = 0, *dp = 0; + s32 state; + + t = sc->curRDPTask; + sc->curRDPTask = 0; + + t->state &= -2; + + __scTaskComplete(sc, t); + + state = ((sc->curRSPTask == 0) << 1) | (sc->curRDPTask == 0); + if ( (__scSchedule(sc, &sp, &dp, state)) != state) + __scExec(sc, sp, dp); +} + + +OSScTask *__scTaskReady(OSScTask *t){ + if (t) { + /* + * If there is a pending swap bail out til later (next + * retrace). + */ + if (osViGetCurrentFramebuffer() != osViGetNextFramebuffer()) { + return 0; + } + + return t; + } + + return 0; +} + +#if 1 +GLOBAL_ASM("asm/non_matchings/unknown_079F50/__scTaskComplete.s") +#else +s32 __scTaskComplete(OSSched *sc, OSScTask *t) { + int rv; + int firsttime = 1; + + if ((t->state & 0x03) == 0) { /* none of the needs bits set */ + + assert (t->msgQ); + if(t->msgQ){ + + //rv = osSendMesg(t->msgQ, &t->msg, OS_MESG_BLOCK); + + //if (t->list.t.type == M_GFXTASK) { + if ((t->flags & 0x20) /*&& (t->flags & OS_SC_LAST_TASK)*/){ + if(sc->doAudio < 2){ + sc->frameCount = t; + } + else{ + if(t->startTime == 0){ + osSendMesg(t->msgQ, t->msg, 1); + } + } + //if (firsttime) { + // osViBlack(FALSE); + // firsttime = 0; + //} + //osViSwapBuffer(t->framebuffer); + } + //} + } + return 1; + } + + return 0; +} +#endif + +void __scAppendList(OSSched *sc, OSScTask *t) { + u32 tmp = t->list.t.type; + if (tmp == 2){ + if(sc->audioListTail) + sc->audioListTail->next = t; + else + sc->audioListHead = t; + + sc->audioListTail = t; + } + else{ + if(sc->gfxListTail) + sc->gfxListTail->next = t; + else + sc->gfxListHead = t; + + sc->gfxListTail = t; + } + t->next = NULL; + t->state = t->flags & 0x03; +} + +void __scExec(OSSched *sc, OSScTask *sp, OSScTask *dp){ if (sp) { if (sp->list.t.type == M_AUDTASK) { @@ -184,8 +343,7 @@ void __scExec(OSSched *sc, OSScTask *sp, OSScTask *dp) GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_8007A080.s") #else extern OSTime D_80126118; -void func_8007A080(OSSched *sc) -{ +void func_8007A080(OSSched *sc) { if (sc->curRSPTask->list.t.type == M_GFXTASK) { //sc->curRSPTask->state |= OS_SC_YIELD; @@ -195,5 +353,5 @@ void func_8007A080(OSSched *sc) } } #endif -GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_8007A0D4.s") +GLOBAL_ASM("asm/non_matchings/unknown_079F50/__scSchedule.s") GLOBAL_ASM("asm/non_matchings/unknown_079F50/func_8007A2D0.s") diff --git a/src/unknown_0B8920.c b/src/unknown_0B8920.c index 8b0d9eb9..eb6c5439 100644 --- a/src/unknown_0B8920.c +++ b/src/unknown_0B8920.c @@ -79,7 +79,7 @@ typedef struct unk8012A7E8 { u8 pad24[0x4]; } unk8012A7E8; -extern unk8012A7E8 *D_8012A7E8[8]; +extern unk8012A7E8 (*D_8012A7E8)[1]; extern s32 D_8012A7F0; extern s8 D_8012A7F4; extern s32 D_8012AAD8; @@ -298,9 +298,6 @@ void func_800C4404(s32 arg0, s32 arg1, s32 arg2) { func_800C45A4(arg0, *D_8012A7E8, arg1, arg2, 1.0f); } -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C4440.s") -#else // This function is OK void func_800C4440(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4) { unk8012A7E8 *temp = &(*D_8012A7E8)[0]; @@ -309,37 +306,33 @@ void func_800C4440(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4) { func_800C45A4(arg0, temp, arg3, arg4, 1.0f); } -// Unused? void func_800C44C0(s32 arg0, s32 arg1, s32 arg2, s32 arg3) { - if (arg1 >= 0 && arg1 < 8) { - unk8012A7E8 *temp = &(*D_8012A7E8)[arg1]; // Issue with temp - func_800C45A4(arg0, temp, arg2, arg3, 1.0f); + if (arg1 >= 0) { + if(arg1 < 8){ + unk8012A7E8 *temp = &D_8012A7E8[arg1]; + func_800C45A4(arg0, temp, arg2, arg3, 1.0f); + } } } -// Unused? void func_800C4510(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4, s32 arg5) { if (arg1 >= 0 && arg1 < 8) { - unk8012A7E8 *temp = &(*D_8012A7E8)[arg1]; // Issue with temp + unk8012A7E8 *temp = &D_8012A7E8[arg1]; temp->unk0 = (arg2 == -0x8000) ? temp->unkC >> 1 : arg2; temp->unk2 = (arg3 == -0x8000) ? temp->unkE >> 1 : arg3; func_800C45A4(arg0, temp, arg4, arg5, 1.0f); } } -#endif // Has a jump table GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C45A4.s") GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C4DA0.s") -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C4EDC.s") -#else void func_800C4EDC(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4) { if (arg0 > 0 && arg0 < 8) { // How is temp supposed to be setup for all of these functions? This is driving me nuts. - unk8012A7E8 *temp = &(*D_8012A7E8)[arg0]; // Issue with temp + unk8012A7E8 *temp = &D_8012A7E8[arg0]; // Issue with temp temp->unk0 = 0; temp->unk2 = 0; if (arg1 < arg3) { @@ -360,61 +353,46 @@ void func_800C4EDC(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4) { temp->unkE = (temp->unkA - temp->unk6) + 1; } } -#endif -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C4F7C.s") -#else void func_800C4F7C(s32 arg0, s32 arg1) { if (arg0 >= 0 && arg0 < 8) { - unk8012A7E8 *temp = &(*D_8012A7E8)[arg0]; // Issue with temp + unk8012A7E8 *temp = &D_8012A7E8[arg0]; if (arg1 < D_8012A7E0) { temp->unk1D = arg1; } } } -#endif -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C4FBC.s") -#else + void func_800C4FBC(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4) { if (arg0 > 0 && arg0 < 8) { - unk8012A7E8 *temp = &(*D_8012A7E8[arg0]); // Issue with temp + unk8012A7E8 *temp = &D_8012A7E8[arg0]; temp->unk10 = arg1; temp->unk11 = arg2; temp->unk12 = arg3; temp->unk13 = arg4; } } -#endif -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C5000.s") -#else void func_800C5000(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4, s32 arg5) { unk8012A7E8 *temp; if (arg0 <= 0 || arg0 >= 8) { return; } - temp = &(*D_8012A7E8)[arg0]; // Issue with temp + temp = &D_8012A7E8[arg0]; temp->unk14 = arg1; temp->unk15 = arg2; temp->unk16 = arg3; temp->unk17 = arg4; temp->unk1C = arg5; } -#endif -#if 1 -GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C5050.s") -#else void func_800C5050(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s32 arg4) { unk8012A7E8 *temp; if (arg0 <= 0 || arg0 >= 8) { return; } - temp = &(*D_8012A7E8)[arg0]; // Issue with temp + temp = &D_8012A7E8[arg0]; // Issue with temp temp->unk18 = arg1; temp->unk19 = arg2; temp->unk1A = arg3; @@ -427,7 +405,7 @@ void func_800C5094(s32 arg0, s32 arg1, s32 arg2) { if (arg0 <= 0 || arg0 >= 8) { return; } - temp = &(*D_8012A7E8)[arg0]; // Issue with temp + temp = &D_8012A7E8[arg0]; // Issue with temp temp->unk20 += arg1; temp->unk22 += arg2; } @@ -438,7 +416,7 @@ void func_800C50D8(s32 arg0) { if (arg0 <= 0 || arg0 >= 8) { return; } - temp = &(*D_8012A7E8)[arg0]; // Issue with temp + temp = &D_8012A7E8[arg0]; // Issue with temp temp->unk20 = 0; temp->unk22 = 0; } @@ -448,7 +426,7 @@ void func_800C50D8(s32 arg0) { void func_800C510C(s32 arg0, s32 arg1, s32 arg2, s32 arg3) { func_800C5168(arg0, (*D_8012A7E8)[arg0].unk0, (*D_8012A7E8)[arg0].unk2, arg1, arg2, arg3); } -#endif + GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C5168.s") GLOBAL_ASM("asm/non_matchings/unknown_0B8920/func_800C5494.s") diff --git a/undefined_syms.txt b/undefined_syms.txt index 81e1aa7c..05052cca 100755 --- a/undefined_syms.txt +++ b/undefined_syms.txt @@ -782,8 +782,8 @@ D_800E4760 = 0x800E4760; D_800E47B0 = 0x800E47B0; __osPiAccessQueueEnabled = 0x800E4800; D_800E4810 = 0x800E4810; -D_800E4870 = 0x800E4870; -D_800E4874 = 0x800E4874; +__osViCurr = 0x800E4870; +__osViNext = 0x800E4874; D_800E4878 = 0x800E4878; __osThreadTail = 0x800E4880; __RunQueue = 0x800E4888;