Commit Graph

  • dcd58b2aad Restart music upon set_background_music() call if BETTER_REVERB preset changes (#797) Gregory Heskett 2024-06-01 10:55:58 -04:00
  • f7ff1b85c2 Turn off VI special features on crash (saves 1-2ms on console and fixes coverage issue on ares) + update README + some other stuff Arceveti 2024-05-30 17:18:28 -07:00
  • 1f156d958b reginspect stuff Arceveti 2024-05-23 20:21:15 -07:00
  • 790fcda14c Add "unreachable" after FORCE_CRASH() Arceveti 2024-05-22 16:36:43 -07:00
  • 95d80a5f81 Better double buffering (fixes Parallel screenshot flickering) Arceveti 2024-05-22 16:35:12 -07:00
  • 7ffa9a3bd7 Fixed fixlights.py compile error on python 3.12 (#798) Denis Kopyrin 2024-05-23 01:48:24 +08:00
  • 295d61ba82 Update stack trace page + other fixes Arceveti 2024-05-21 17:11:42 -07:00
  • dbba4871e1 Add mips64-none-elf- to automatically detected prefixes (#799) lolbinarycat 2024-05-18 02:11:10 -04:00
  • 26eb1b896b Small changes Arceveti 2024-05-17 14:49:49 -07:00
  • caf253ede8 Stack trace rewrite (now actually works properly) Arceveti 2024-05-17 14:49:22 -07:00
  • 0682d4f744 Cache op names + other stuff Arceveti 2024-05-14 18:53:17 -07:00
  • 74888eaee3 Fix trap instruction param in pseudo C Arceveti 2024-05-12 03:18:48 -07:00
  • e7417af534 Add subiu and dsubiu pseudoinstructions Arceveti 2024-05-12 01:00:45 -07:00
  • deeed7e493 Improve pseudo C comments Arceveti 2024-05-11 18:26:33 -07:00
  • 583b2ce455 Pseudo C code improvements Arceveti 2024-05-11 18:08:01 -07:00
  • a6b4c33a9a Fix disasm pseudo C flickering by forcing 30 FPS (?) Arceveti 2024-05-11 16:11:08 -07:00
  • 74771e6d77 Disasm pseudo C code mode Arceveti 2024-05-10 01:59:29 -07:00
  • 056706c81b Only use 2 framebuffers + some small fixes Arceveti 2024-05-10 01:50:39 -07:00
  • 3a5b9507a9 Merge branch 'develop/2.3.0' of https://github.com/Reonu/HackerSM64 into develop/2.1.0-new-crash-screen Arceveti 2024-05-08 19:20:17 -07:00
  • cebdb3e604 Print extra registers on summary for certain instructions Arceveti 2024-05-08 18:16:59 -07:00
  • 71c999b5b8 Move disasm reg buffer to disasm file Arceveti 2024-05-08 17:44:16 -07:00
  • 6f779c188e Add option to try to parse non-.text data as instructions Arceveti 2024-05-08 16:39:51 -07:00
  • 71c9293a83 Even better count factor timing adjustment Arceveti 2024-05-08 01:11:47 -07:00
  • e0820c42db disasm improvements Arceveti 2024-05-07 14:44:28 -07:00
  • 33aef53fa6 Better count factor timing adjustment Arceveti 2024-05-07 00:27:37 -07:00
  • 6ee3659e5f thread pri 0 while waiting but pri appmax-1 after crash + mapPacker.py variables Arceveti 2024-05-06 23:54:33 -07:00
  • ca31ea4195 Add count factor and adjust some timings accordingly Arceveti 2024-05-06 16:59:16 -07:00
  • f59c34315d Move register info defines to the files they're used in Arceveti 2024-05-06 00:05:39 -07:00
  • 3483ca10d4 Highlight sp and badvaddr on memory page Arceveti 2024-05-06 00:04:25 -07:00
  • 42f6a73ef5 Handle watchpoint exceptions Arceveti 2024-05-05 15:29:59 -07:00
  • d111ee8d15 Use local variable for LLBit check Arceveti 2024-05-05 00:01:09 -07:00
  • 3696dc8de3 Add LLBit register info Arceveti 2024-05-04 23:55:33 -07:00
  • 7e11ab79d6 Check if valid ram addr in memory page symbols mode Arceveti 2024-05-04 23:54:37 -07:00
  • 520a6f3aed Bugfix: Blue coin duplication (#787) Gregory Heskett 2024-05-03 01:54:43 -04:00
  • 74006f7f8a Memory page f32 mode (aligned) Arceveti 2024-05-01 23:01:14 -07:00
  • 12dec742b7 Better disasm branch arrow fill buffer trigger Arceveti 2024-05-01 16:54:28 -07:00
  • 45a74a34f7 Move attributes to attributes.h Arceveti 2024-05-01 16:07:28 -07:00
  • 4d260f6885 Use G_TF_POINT on 3D billboard numbers (#791) bicyclesoda 2024-04-30 23:19:20 -04:00
  • aedae64e8b Remove destination warp node requirement (#788) Gregory Heskett 2024-04-30 23:10:58 -04:00
  • e101238ea5 insn_db fixes Arceveti 2024-04-30 16:05:44 -07:00
  • 676e4ec290 Add new UNF rdb thread id Arceveti 2024-04-30 13:57:22 -07:00
  • 2ed4517f49 enum typedef consistency Arceveti 2024-04-29 23:40:32 -07:00
  • 6ae348e026 Add hardcoded segments to segments page + move segment data to new files Arceveti 2024-04-29 18:42:59 -07:00
  • 0dd54396f5 Clean up segment_symbols.h Arceveti 2024-04-29 16:48:32 -07:00
  • f3e1496d29 Change test emulator from mupen64plus to parallel-launcher (#790) bicyclesoda 2024-04-29 19:42:13 -04:00
  • d060bc781c Draw footer on crashed page + some null checks Arceveti 2024-04-29 15:18:34 -07:00
  • 7cca77e5c1 Only calculate text scroll speed once Arceveti 2024-04-29 14:32:54 -07:00
  • dec76acdcd Move warp node asserts + add assert for null music dynamics + update readme Arceveti 2024-04-29 02:00:42 -07:00
  • f106513156 show start and size instead of range on segments page Arceveti 2024-04-28 21:10:30 -07:00
  • c734dbbba5 Reduce size of disasm instruction database by half Arceveti 2024-04-28 17:08:39 -07:00
  • 6e7e79b804 Update readme + reduce stack trace buffer size Arceveti 2024-04-28 17:07:36 -07:00
  • e05be1a739 More space for symbols on thread registers page Arceveti 2024-04-26 02:35:39 -07:00
  • eac8af8156 Print an additional character of symbols on memory page + osWritebackDCacheAll on interfaces page Arceveti 2024-04-26 02:19:07 -07:00
  • d37ac917dc Smooth text scrolling Arceveti 2024-04-26 01:52:11 -07:00
  • e6c3e7163c Add symbols mode to memory view Arceveti 2024-04-25 18:37:15 -07:00
  • 2abd2b56c8 Clean up some debug map ifdefs Arceveti 2024-04-25 18:00:35 -07:00
  • e775e71337 Stack trace cleanup + Add HI_OF_/LO_OF_ macros Arceveti 2024-04-25 17:41:26 -07:00
  • 11229d7654 Move reginspect bit decode data to reginspect_bits.inc.c + clean up reginspect header Arceveti 2024-04-25 00:52:15 -07:00
  • c4bdda30aa Improve register order on registers page + improve description printing on reginspect Arceveti 2024-04-24 19:33:27 -07:00
  • 2a59b3f195 Move instruction data to insn_db.inc.c Arceveti 2024-04-24 19:11:08 -07:00
  • 93b65314e6 Merge branch 'develop/2.3.0' of https://github.com/Reonu/HackerSM64 into develop/2.1.0-new-crash-screen Arceveti 2024-04-24 18:57:05 -07:00
  • 3da6bca4cd Improve reginspect pointer detection Arceveti 2024-04-24 16:58:42 -07:00
  • 4101f499f0 Fix macro/define name in assert conditions + mark code after asserts as unreachable Arceveti 2024-04-24 15:33:37 -07:00
  • d57901dd08 Draw registers page sections from list + get_reg_val null checks Arceveti 2024-04-24 15:13:49 -07:00
  • dd3031500b Add mention of L/R to switch page in the summary page instruction text Arceveti 2024-04-23 21:47:34 -07:00
  • 3e24de5b24 C0 config reginspect decoded bits + sureAddr in reg info Arceveti 2024-04-23 18:48:08 -07:00
  • dfd6a4c638 Fix build Arceveti 2024-04-23 16:05:11 -07:00
  • 49186ef8d2 Some C0 register bit mask defines Arceveti 2024-04-23 15:58:55 -07:00
  • 386064eea0 Move reg bit defines from reginspect to reg_bits.h Arceveti 2024-04-23 15:04:12 -07:00
  • 6daa911485 CP2.inc.c and CP3.inc.c consistency Arceveti 2024-04-23 14:55:41 -07:00
  • a5713cabdb Rename 'registers' folder to 'register_data' Arceveti 2024-04-23 14:53:12 -07:00
  • 2b5050f4b4 add 'checkThread' arg to get_reg_val Arceveti 2024-04-23 14:50:45 -07:00
  • 1e8b6f59cd Add cs_draw_custom_5x5_glyph (unused for now) Arceveti 2024-04-23 14:42:04 -07:00
  • 55b1f5bd10 sRegDesc_Default extern Arceveti 2024-04-23 14:02:23 -07:00
  • f7e315f595 Fix register data .inc.c includes Arceveti 2024-04-23 14:01:06 -07:00
  • b9e234981f Rename reg bits commands + fix typos Arceveti 2024-04-22 19:58:03 -07:00
  • 9b4da37d15 Some reginspect bit decoding Arceveti 2024-04-22 19:48:46 -07:00
  • 23f67fd76b Add f3dex3 check to about page Arceveti 2024-04-22 19:45:36 -07:00
  • ac1641e9e9 Cleaner microcode name define Arceveti 2024-04-22 15:23:23 -07:00
  • 31596548ec Reginspect for interface registers Arceveti 2024-04-22 15:18:37 -07:00
  • 30ab8cc197 MapSymbolIndex typedef + fix build warnings Arceveti 2024-04-22 15:00:08 -07:00
  • 29c12a8e68 Fix symbol dividers crash + make the setting work + allow scrolling into physical addresses Arceveti 2024-04-22 14:51:06 -07:00
  • 9f21629bff Improve viewable/scrollable memory boundary defines Arceveti 2024-04-21 20:17:28 -07:00
  • 0005bbbd6a Save up to 130KB of RAM at literally zero cost (#786) arthurtilly 2024-04-22 12:40:47 +12:00
  • e494069b0a Add support for a user-defined config_local.h file (#785) Gregory Heskett 2024-04-21 20:38:07 -04:00
  • 508ab498b7 Rename 'TO_STRING' and 'TO_STRING2' to 'STRINGIFY' and 'EXPAND_AND_STRINGIFY' Arceveti 2024-04-21 15:11:11 -07:00
  • 36bd5b35aa Add build.c + add commit hash to build info + small changes Arceveti 2024-04-21 15:07:16 -07:00
  • f852ff4359 Platform Displacement 2.1 (#776) arthurtilly 2024-04-22 09:14:12 +12:00
  • 2ae3426957 Change compression type to yay0 and ignore .inc.c files in most directories (#784) Gregory Heskett 2024-04-21 17:13:47 -04:00
  • d7e87eab82 Small changes Arceveti 2024-04-21 01:54:12 -07:00
  • 41591bc9a3 Clean up reginspect decoded bits printing Arceveti 2024-04-21 01:16:29 -07:00
  • 64d31e2194 Various cleanup Arceveti 2024-04-21 01:15:05 -07:00
  • 1a064613f9 Registers rewrite Arceveti 2024-04-20 20:21:45 -07:00
  • 32e9216f17 Add to builtins.h + custom message if running code in non-code segment Arceveti 2024-04-20 20:00:59 -07:00
  • 1b89b37782 Print badvaddr on EXC_MOD Arceveti 2024-04-18 18:29:51 -07:00
  • 0e46aaf5b0 Allow moving cursor while reginspect is open + improve register page lists + print binary data on reginspect Arceveti 2024-04-18 17:56:27 -07:00
  • 1f7d4dfeb8 Print badvaddr to summary page for TLB or address exceptions Arceveti 2024-04-18 17:54:21 -07:00
  • f529732d1d Actually fix safe memory reads Arceveti 2024-04-18 17:52:52 -07:00
  • 33b402529f Include assert.h in macros.h Arceveti 2024-04-18 17:47:57 -07:00
  • 5cd024e20f Fix RDB description Arceveti 2024-04-17 17:39:21 -07:00