mirror of
https://github.com/encounter/tp.git
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86f892c3d3
* JKRDvdArchive.s split * JKRMemArchive.s split * JKRAramArchive.s split * JKRCompArchive.s split * JKRDecomp.s split * JKRDvdRipper.s split * JKRAramBlock.s split * JKRAramHeap.s split * JKRAramPiece.s split * JKRAramStream.s split * removed unused .s files * JKRDvdAramRipper.s split * JKRAram.s split * cleanup and making vtables easier to debug * fixed merge errors * fixed JKRFileLoader::fetchVolumeName Co-authored-by: Pheenoh <pheenoh@gmail.com>
180 lines
8.7 KiB
ArmAsm
180 lines
8.7 KiB
ArmAsm
/* aramToMainRam__7JKRAramFUlPUcUl15JKRExpandSwitchUlP7JKRHeapiPUl __ct__7JKRAramFUlUll::aramToMainRam(unsigned long, unsigned char *, unsigned long, JKRExpandSwitch, unsigned long, JKRHeap *, int, unsigned long *) */
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/* JKRAram_NS_aramToMainRam */
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/* 802D25B4 002CF4F4 94 21 FF 90 */ stwu r1, -0x70(r1)
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/* 802D25B8 002CF4F8 7C 08 02 A6 */ mflr r0
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/* 802D25BC 002CF4FC 90 01 00 74 */ stw r0, 0x74(r1)
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/* 802D25C0 002CF500 39 61 00 70 */ addi r11, r1, 0x70
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/* 802D25C4 002CF504 48 08 FB FD */ bl func_803621C0
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/* 802D25C8 002CF508 7C 79 1B 78 */ mr r25, r3
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/* 802D25CC 002CF50C 7C 9A 23 78 */ mr r26, r4
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/* 802D25D0 002CF510 7C BB 2B 78 */ mr r27, r5
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/* 802D25D4 002CF514 7C D6 33 78 */ mr r22, r6
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/* 802D25D8 002CF518 7C FC 3B 78 */ mr r28, r7
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/* 802D25DC 002CF51C 7D 1D 43 78 */ mr r29, r8
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/* 802D25E0 002CF520 7D 3E 4B 78 */ mr r30, r9
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/* 802D25E4 002CF524 7D 5F 53 79 */ or. r31, r10, r10
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/* 802D25E8 002CF528 3B 00 00 00 */ li r24, 0
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/* 802D25EC 002CF52C 41 82 00 0C */ beq lbl_802D25F8
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/* 802D25F0 002CF530 38 00 00 00 */ li r0, 0
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/* 802D25F4 002CF534 90 1F 00 00 */ stw r0, 0(r31)
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lbl_802D25F8:
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/* 802D25F8 002CF538 7F 43 D3 78 */ mr r3, r26
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/* 802D25FC 002CF53C 7F 24 CB 78 */ mr r4, r25
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/* 802D2600 002CF540 38 A0 00 00 */ li r5, 0
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/* 802D2604 002CF544 38 C0 00 00 */ li r6, 0
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/* 802D2608 002CF548 4B FF FC 41 */ bl checkOkAddress__7JKRAramFPUcUlP12JKRAramBlockUl
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/* 802D260C 002CF54C 2C 16 00 01 */ cmpwi r22, 1
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/* 802D2610 002CF550 40 82 00 5C */ bne lbl_802D266C
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/* 802D2614 002CF554 38 01 00 27 */ addi r0, r1, 0x27
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/* 802D2618 002CF558 54 17 00 34 */ rlwinm r23, r0, 0, 0, 0x1a
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/* 802D261C 002CF55C 38 60 00 01 */ li r3, 1
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/* 802D2620 002CF560 7F 24 CB 78 */ mr r4, r25
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/* 802D2624 002CF564 7E E5 BB 78 */ mr r5, r23
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/* 802D2628 002CF568 38 C0 00 20 */ li r6, 0x20
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/* 802D262C 002CF56C 38 E0 00 00 */ li r7, 0
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/* 802D2630 002CF570 48 00 12 09 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
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/* 802D2634 002CF574 7E E3 BB 78 */ mr r3, r23
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/* 802D2638 002CF578 48 00 96 C1 */ bl checkCompressed__9JKRDecompFPUc
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/* 802D263C 002CF57C 2C 03 00 03 */ cmpwi r3, 3
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/* 802D2640 002CF580 40 82 00 08 */ bne lbl_802D2648
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/* 802D2644 002CF584 38 60 00 00 */ li r3, 0
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lbl_802D2648:
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/* 802D2648 002CF588 7C 78 1B 78 */ mr r24, r3
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/* 802D264C 002CF58C 88 B7 00 07 */ lbz r5, 7(r23)
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/* 802D2650 002CF590 88 97 00 06 */ lbz r4, 6(r23)
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/* 802D2654 002CF594 88 77 00 04 */ lbz r3, 4(r23)
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/* 802D2658 002CF598 88 17 00 05 */ lbz r0, 5(r23)
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/* 802D265C 002CF59C 54 00 80 1E */ slwi r0, r0, 0x10
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/* 802D2660 002CF5A0 50 60 C0 0E */ rlwimi r0, r3, 0x18, 0, 7
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/* 802D2664 002CF5A4 50 80 44 2E */ rlwimi r0, r4, 8, 0x10, 0x17
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/* 802D2668 002CF5A8 7C B7 03 78 */ or r23, r5, r0
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lbl_802D266C:
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/* 802D266C 002CF5AC 2C 18 00 02 */ cmpwi r24, 2
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/* 802D2670 002CF5B0 40 82 00 74 */ bne lbl_802D26E4
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/* 802D2674 002CF5B4 28 1C 00 00 */ cmplwi r28, 0
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/* 802D2678 002CF5B8 41 82 00 10 */ beq lbl_802D2688
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/* 802D267C 002CF5BC 7C 1C B8 40 */ cmplw r28, r23
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/* 802D2680 002CF5C0 40 80 00 08 */ bge lbl_802D2688
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/* 802D2684 002CF5C4 7F 97 E3 78 */ mr r23, r28
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lbl_802D2688:
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/* 802D2688 002CF5C8 28 1A 00 00 */ cmplwi r26, 0
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/* 802D268C 002CF5CC 40 82 00 18 */ bne lbl_802D26A4
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/* 802D2690 002CF5D0 7E E3 BB 78 */ mr r3, r23
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/* 802D2694 002CF5D4 38 80 00 20 */ li r4, 0x20
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/* 802D2698 002CF5D8 7F A5 EB 78 */ mr r5, r29
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/* 802D269C 002CF5DC 4B FF BD D9 */ bl alloc__7JKRHeapFUliP7JKRHeap
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/* 802D26A0 002CF5E0 7C 7A 1B 78 */ mr r26, r3
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lbl_802D26A4:
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/* 802D26A4 002CF5E4 28 1A 00 00 */ cmplwi r26, 0
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/* 802D26A8 002CF5E8 40 82 00 0C */ bne lbl_802D26B4
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/* 802D26AC 002CF5EC 38 60 00 00 */ li r3, 0
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/* 802D26B0 002CF5F0 48 00 01 68 */ b lbl_802D2818
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lbl_802D26B4:
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/* 802D26B4 002CF5F4 7F 43 D3 78 */ mr r3, r26
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/* 802D26B8 002CF5F8 7F C4 F3 78 */ mr r4, r30
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/* 802D26BC 002CF5FC 4B FF FC 21 */ bl changeGroupIdIfNeed__7JKRAramFPUci
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/* 802D26C0 002CF600 7F 23 CB 78 */ mr r3, r25
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/* 802D26C4 002CF604 7F 44 D3 78 */ mr r4, r26
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/* 802D26C8 002CF608 7F 65 DB 78 */ mr r5, r27
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/* 802D26CC 002CF60C 7E E6 BB 78 */ mr r6, r23
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/* 802D26D0 002CF610 38 E0 00 00 */ li r7, 0
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/* 802D26D4 002CF614 7F E8 FB 78 */ mr r8, r31
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/* 802D26D8 002CF618 48 00 01 59 */ bl JKRDecompressFromAramToMainRam__FUlPvUlUlUlPUl
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/* 802D26DC 002CF61C 7F 43 D3 78 */ mr r3, r26
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/* 802D26E0 002CF620 48 00 01 38 */ b lbl_802D2818
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lbl_802D26E4:
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/* 802D26E4 002CF624 2C 18 00 01 */ cmpwi r24, 1
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/* 802D26E8 002CF628 40 82 00 D0 */ bne lbl_802D27B8
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/* 802D26EC 002CF62C 7F 63 DB 78 */ mr r3, r27
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/* 802D26F0 002CF630 38 80 FF E0 */ li r4, -32
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/* 802D26F4 002CF634 7F A5 EB 78 */ mr r5, r29
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/* 802D26F8 002CF638 4B FF BD 7D */ bl alloc__7JKRHeapFUliP7JKRHeap
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/* 802D26FC 002CF63C 7C 78 1B 79 */ or. r24, r3, r3
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/* 802D2700 002CF640 40 82 00 0C */ bne lbl_802D270C
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/* 802D2704 002CF644 38 60 00 00 */ li r3, 0
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/* 802D2708 002CF648 48 00 01 10 */ b lbl_802D2818
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lbl_802D270C:
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/* 802D270C 002CF64C 38 60 00 01 */ li r3, 1
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/* 802D2710 002CF650 7F 24 CB 78 */ mr r4, r25
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/* 802D2714 002CF654 7F 05 C3 78 */ mr r5, r24
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/* 802D2718 002CF658 7F 66 DB 78 */ mr r6, r27
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/* 802D271C 002CF65C 38 E0 00 00 */ li r7, 0
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/* 802D2720 002CF660 48 00 11 19 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
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/* 802D2724 002CF664 28 1C 00 00 */ cmplwi r28, 0
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/* 802D2728 002CF668 41 82 00 10 */ beq lbl_802D2738
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/* 802D272C 002CF66C 7C 1C B8 40 */ cmplw r28, r23
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/* 802D2730 002CF670 40 80 00 08 */ bge lbl_802D2738
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/* 802D2734 002CF674 7F 97 E3 78 */ mr r23, r28
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lbl_802D2738:
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/* 802D2738 002CF678 28 1A 00 00 */ cmplwi r26, 0
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/* 802D273C 002CF67C 40 82 00 1C */ bne lbl_802D2758
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/* 802D2740 002CF680 7E E3 BB 78 */ mr r3, r23
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/* 802D2744 002CF684 38 80 00 20 */ li r4, 0x20
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/* 802D2748 002CF688 7F A5 EB 78 */ mr r5, r29
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/* 802D274C 002CF68C 4B FF BD 29 */ bl alloc__7JKRHeapFUliP7JKRHeap
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/* 802D2750 002CF690 7C 79 1B 78 */ mr r25, r3
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/* 802D2754 002CF694 48 00 00 08 */ b lbl_802D275C
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lbl_802D2758:
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/* 802D2758 002CF698 7F 59 D3 78 */ mr r25, r26
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lbl_802D275C:
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/* 802D275C 002CF69C 28 19 00 00 */ cmplwi r25, 0
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/* 802D2760 002CF6A0 40 82 00 18 */ bne lbl_802D2778
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/* 802D2764 002CF6A4 7F 03 C3 78 */ mr r3, r24
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/* 802D2768 002CF6A8 38 80 00 00 */ li r4, 0
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/* 802D276C 002CF6AC 4B FF BD 95 */ bl free__7JKRHeapFPvP7JKRHeap
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/* 802D2770 002CF6B0 38 60 00 00 */ li r3, 0
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/* 802D2774 002CF6B4 48 00 00 A4 */ b lbl_802D2818
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lbl_802D2778:
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/* 802D2778 002CF6B8 7F 23 CB 78 */ mr r3, r25
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/* 802D277C 002CF6BC 7F C4 F3 78 */ mr r4, r30
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/* 802D2780 002CF6C0 4B FF FB 5D */ bl changeGroupIdIfNeed__7JKRAramFPUci
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/* 802D2784 002CF6C4 7F 03 C3 78 */ mr r3, r24
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/* 802D2788 002CF6C8 7F 24 CB 78 */ mr r4, r25
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/* 802D278C 002CF6CC 7E E5 BB 78 */ mr r5, r23
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/* 802D2790 002CF6D0 38 C0 00 00 */ li r6, 0
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/* 802D2794 002CF6D4 48 00 91 F5 */ bl orderSync__9JKRDecompFPUcPUcUlUl
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/* 802D2798 002CF6D8 7F 03 C3 78 */ mr r3, r24
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/* 802D279C 002CF6DC 7F A4 EB 78 */ mr r4, r29
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/* 802D27A0 002CF6E0 4B FF BD 61 */ bl free__7JKRHeapFPvP7JKRHeap
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/* 802D27A4 002CF6E4 28 1F 00 00 */ cmplwi r31, 0
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/* 802D27A8 002CF6E8 41 82 00 08 */ beq lbl_802D27B0
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/* 802D27AC 002CF6EC 92 FF 00 00 */ stw r23, 0(r31)
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lbl_802D27B0:
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/* 802D27B0 002CF6F0 7F 23 CB 78 */ mr r3, r25
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/* 802D27B4 002CF6F4 48 00 00 64 */ b lbl_802D2818
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lbl_802D27B8:
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/* 802D27B8 002CF6F8 28 1A 00 00 */ cmplwi r26, 0
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/* 802D27BC 002CF6FC 40 82 00 18 */ bne lbl_802D27D4
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/* 802D27C0 002CF700 7F 63 DB 78 */ mr r3, r27
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/* 802D27C4 002CF704 38 80 00 20 */ li r4, 0x20
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/* 802D27C8 002CF708 7F A5 EB 78 */ mr r5, r29
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/* 802D27CC 002CF70C 4B FF BC A9 */ bl alloc__7JKRHeapFUliP7JKRHeap
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/* 802D27D0 002CF710 7C 7A 1B 78 */ mr r26, r3
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lbl_802D27D4:
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/* 802D27D4 002CF714 28 1A 00 00 */ cmplwi r26, 0
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/* 802D27D8 002CF718 40 82 00 0C */ bne lbl_802D27E4
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/* 802D27DC 002CF71C 38 60 00 00 */ li r3, 0
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/* 802D27E0 002CF720 48 00 00 38 */ b lbl_802D2818
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lbl_802D27E4:
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/* 802D27E4 002CF724 7F 43 D3 78 */ mr r3, r26
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/* 802D27E8 002CF728 7F C4 F3 78 */ mr r4, r30
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/* 802D27EC 002CF72C 4B FF FA F1 */ bl changeGroupIdIfNeed__7JKRAramFPUci
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/* 802D27F0 002CF730 38 60 00 01 */ li r3, 1
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/* 802D27F4 002CF734 7F 24 CB 78 */ mr r4, r25
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/* 802D27F8 002CF738 7F 45 D3 78 */ mr r5, r26
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/* 802D27FC 002CF73C 7F 66 DB 78 */ mr r6, r27
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/* 802D2800 002CF740 38 E0 00 00 */ li r7, 0
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/* 802D2804 002CF744 48 00 10 35 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
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/* 802D2808 002CF748 28 1F 00 00 */ cmplwi r31, 0
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/* 802D280C 002CF74C 41 82 00 08 */ beq lbl_802D2814
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/* 802D2810 002CF750 93 7F 00 00 */ stw r27, 0(r31)
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lbl_802D2814:
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/* 802D2814 002CF754 7F 43 D3 78 */ mr r3, r26
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lbl_802D2818:
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/* 802D2818 002CF758 39 61 00 70 */ addi r11, r1, 0x70
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/* 802D281C 002CF75C 48 08 F9 F1 */ bl func_8036220C
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/* 802D2820 002CF760 80 01 00 74 */ lwz r0, 0x74(r1)
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/* 802D2824 002CF764 7C 08 03 A6 */ mtlr r0
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/* 802D2828 002CF768 38 21 00 70 */ addi r1, r1, 0x70
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/* 802D282C 002CF76C 4E 80 00 20 */ blr
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