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45 lines
1.8 KiB
ArmAsm
45 lines
1.8 KiB
ArmAsm
lbl_8024F034:
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/* 8024F034 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 8024F038 7C 08 02 A6 */ mflr r0
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/* 8024F03C 90 01 00 24 */ stw r0, 0x24(r1)
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/* 8024F040 93 E1 00 1C */ stw r31, 0x1c(r1)
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/* 8024F044 7C 7F 1B 78 */ mr r31, r3
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/* 8024F048 80 63 00 20 */ lwz r3, 0x20(r3)
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/* 8024F04C C0 22 B3 D0 */ lfs f1, lit_4009(r2)
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/* 8024F050 4B F4 62 51 */ bl setAlphaRate__16dSelect_cursor_cFf
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/* 8024F054 38 80 00 00 */ li r4, 0
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/* 8024F058 88 7F 02 A8 */ lbz r3, 0x2a8(r31)
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/* 8024F05C 88 1F 02 A6 */ lbz r0, 0x2a6(r31)
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/* 8024F060 1C 00 00 05 */ mulli r0, r0, 5
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/* 8024F064 7C 03 02 14 */ add r0, r3, r0
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/* 8024F068 54 00 10 3A */ slwi r0, r0, 2
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/* 8024F06C 7C 7F 02 14 */ add r3, r31, r0
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/* 8024F070 80 63 00 74 */ lwz r3, 0x74(r3)
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/* 8024F074 B0 83 00 64 */ sth r4, 0x64(r3)
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/* 8024F078 38 00 00 96 */ li r0, 0x96
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/* 8024F07C 98 01 00 08 */ stb r0, 8(r1)
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/* 8024F080 98 01 00 09 */ stb r0, 9(r1)
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/* 8024F084 98 01 00 0A */ stb r0, 0xa(r1)
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/* 8024F088 38 00 00 FF */ li r0, 0xff
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/* 8024F08C 98 01 00 0B */ stb r0, 0xb(r1)
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/* 8024F090 80 01 00 08 */ lwz r0, 8(r1)
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/* 8024F094 90 01 00 0C */ stw r0, 0xc(r1)
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/* 8024F098 88 7F 02 A8 */ lbz r3, 0x2a8(r31)
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/* 8024F09C 88 1F 02 A6 */ lbz r0, 0x2a6(r31)
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/* 8024F0A0 1C 00 00 05 */ mulli r0, r0, 5
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/* 8024F0A4 7C 03 02 14 */ add r0, r3, r0
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/* 8024F0A8 54 00 10 3A */ slwi r0, r0, 2
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/* 8024F0AC 7C 7F 02 14 */ add r3, r31, r0
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/* 8024F0B0 80 63 00 74 */ lwz r3, 0x74(r3)
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/* 8024F0B4 80 63 00 04 */ lwz r3, 4(r3)
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/* 8024F0B8 38 81 00 0C */ addi r4, r1, 0xc
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/* 8024F0BC 81 83 00 00 */ lwz r12, 0(r3)
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/* 8024F0C0 81 8C 00 A8 */ lwz r12, 0xa8(r12)
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/* 8024F0C4 7D 89 03 A6 */ mtctr r12
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/* 8024F0C8 4E 80 04 21 */ bctrl
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/* 8024F0CC 83 E1 00 1C */ lwz r31, 0x1c(r1)
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/* 8024F0D0 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 8024F0D4 7C 08 03 A6 */ mtlr r0
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/* 8024F0D8 38 21 00 20 */ addi r1, r1, 0x20
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/* 8024F0DC 4E 80 00 20 */ blr
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