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https://github.com/encounter/tp.git
synced 2026-07-11 06:18:46 -07:00
m_Do_lib OK (#278)
This commit is contained in:
jdflyer
@@ -1,25 +0,0 @@
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lbl_800154EC:
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/* 800154EC 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 800154F0 7C 08 02 A6 */ mflr r0
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/* 800154F4 90 01 00 14 */ stw r0, 0x14(r1)
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/* 800154F8 7C 60 1B 78 */ mr r0, r3
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/* 800154FC 7C 85 23 78 */ mr r5, r4
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/* 80015500 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
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/* 80015504 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
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/* 80015508 80 63 61 B0 */ lwz r3, 0x61b0(r3)
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/* 8001550C 28 03 00 00 */ cmplwi r3, 0
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/* 80015510 40 82 00 18 */ bne lbl_80015528
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/* 80015514 C0 02 81 84 */ lfs f0, lit_3784(r2)
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/* 80015518 D0 05 00 00 */ stfs f0, 0(r5)
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/* 8001551C D0 05 00 04 */ stfs f0, 4(r5)
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/* 80015520 D0 05 00 08 */ stfs f0, 8(r5)
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/* 80015524 48 00 00 10 */ b lbl_80015534
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lbl_80015528:
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/* 80015528 38 63 01 40 */ addi r3, r3, 0x140
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/* 8001552C 7C 04 03 78 */ mr r4, r0
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/* 80015530 48 33 18 3D */ bl PSMTXMultVec
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lbl_80015534:
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/* 80015534 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80015538 7C 08 03 A6 */ mtlr r0
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/* 8001553C 38 21 00 10 */ addi r1, r1, 0x10
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/* 80015540 4E 80 00 20 */ blr
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@@ -1,131 +0,0 @@
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lbl_80015310:
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/* 80015310 94 21 FF D0 */ stwu r1, -0x30(r1)
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/* 80015314 7C 08 02 A6 */ mflr r0
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/* 80015318 90 01 00 34 */ stw r0, 0x34(r1)
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/* 8001531C 39 61 00 30 */ addi r11, r1, 0x30
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/* 80015320 48 34 CE BD */ bl _savegpr_29
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/* 80015324 7C 7D 1B 78 */ mr r29, r3
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/* 80015328 7C 9E 23 78 */ mr r30, r4
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/* 8001532C 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
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/* 80015330 3B E3 61 C0 */ addi r31, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
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/* 80015334 80 7F 61 B0 */ lwz r3, 0x61b0(r31)
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/* 80015338 28 03 00 00 */ cmplwi r3, 0
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/* 8001533C 40 82 00 18 */ bne lbl_80015354
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/* 80015340 C0 02 81 84 */ lfs f0, lit_3784(r2)
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/* 80015344 D0 1E 00 00 */ stfs f0, 0(r30)
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/* 80015348 D0 1E 00 04 */ stfs f0, 4(r30)
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/* 8001534C D0 1E 00 08 */ stfs f0, 8(r30)
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/* 80015350 48 00 01 84 */ b lbl_800154D4
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lbl_80015354:
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/* 80015354 38 63 01 A0 */ addi r3, r3, 0x1a0
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/* 80015358 7F A4 EB 78 */ mr r4, r29
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/* 8001535C 38 A1 00 08 */ addi r5, r1, 8
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/* 80015360 48 33 1A 0D */ bl PSMTXMultVec
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/* 80015364 80 7F 61 B0 */ lwz r3, 0x61b0(r31)
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/* 80015368 C0 83 01 DC */ lfs f4, 0x1dc(r3)
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/* 8001536C C0 3D 00 08 */ lfs f1, 8(r29)
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/* 80015370 C0 03 01 D8 */ lfs f0, 0x1d8(r3)
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/* 80015374 EC 61 00 32 */ fmuls f3, f1, f0
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/* 80015378 C0 3D 00 00 */ lfs f1, 0(r29)
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/* 8001537C C0 03 01 D0 */ lfs f0, 0x1d0(r3)
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/* 80015380 EC 41 00 32 */ fmuls f2, f1, f0
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/* 80015384 C0 3D 00 04 */ lfs f1, 4(r29)
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/* 80015388 C0 03 01 D4 */ lfs f0, 0x1d4(r3)
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/* 8001538C EC 01 00 32 */ fmuls f0, f1, f0
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/* 80015390 EC 02 00 2A */ fadds f0, f2, f0
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/* 80015394 EC 03 00 2A */ fadds f0, f3, f0
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/* 80015398 EC 44 00 2A */ fadds f2, f4, f0
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/* 8001539C C0 21 00 10 */ lfs f1, 0x10(r1)
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/* 800153A0 C0 02 81 84 */ lfs f0, lit_3784(r2)
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/* 800153A4 FC 01 00 40 */ fcmpo cr0, f1, f0
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/* 800153A8 4C 41 13 82 */ cror 2, 1, 2
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/* 800153AC 40 82 00 08 */ bne lbl_800153B4
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/* 800153B0 D0 01 00 10 */ stfs f0, 0x10(r1)
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lbl_800153B4:
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/* 800153B4 C0 02 81 84 */ lfs f0, lit_3784(r2)
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/* 800153B8 FC 02 00 40 */ fcmpo cr0, f2, f0
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/* 800153BC 4C 40 13 82 */ cror 2, 0, 2
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/* 800153C0 40 82 00 3C */ bne lbl_800153FC
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/* 800153C4 FC 00 10 00 */ fcmpu cr0, f0, f2
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/* 800153C8 40 82 00 18 */ bne lbl_800153E0
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/* 800153CC C0 22 81 88 */ lfs f1, lit_3785(r2)
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/* 800153D0 C0 01 00 10 */ lfs f0, 0x10(r1)
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/* 800153D4 EC 01 00 32 */ fmuls f0, f1, f0
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/* 800153D8 D0 1E 00 08 */ stfs f0, 8(r30)
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/* 800153DC 48 00 00 18 */ b lbl_800153F4
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lbl_800153E0:
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/* 800153E0 C0 21 00 10 */ lfs f1, 0x10(r1)
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/* 800153E4 C0 02 81 8C */ lfs f0, lit_3786(r2)
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/* 800153E8 EC 00 10 24 */ fdivs f0, f0, f2
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/* 800153EC EC 01 00 32 */ fmuls f0, f1, f0
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/* 800153F0 D0 1E 00 08 */ stfs f0, 8(r30)
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lbl_800153F4:
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/* 800153F4 C0 62 81 88 */ lfs f3, lit_3785(r2)
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/* 800153F8 48 00 00 18 */ b lbl_80015410
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lbl_800153FC:
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/* 800153FC C0 02 81 8C */ lfs f0, lit_3786(r2)
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/* 80015400 EC 60 10 24 */ fdivs f3, f0, f2
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/* 80015404 C0 01 00 10 */ lfs f0, 0x10(r1)
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/* 80015408 EC 00 00 F2 */ fmuls f0, f0, f3
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/* 8001540C D0 1E 00 08 */ stfs f0, 8(r30)
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lbl_80015410:
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/* 80015410 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
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/* 80015414 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
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/* 80015418 80 63 61 AC */ lwz r3, 0x61ac(r3)
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/* 8001541C C0 02 81 84 */ lfs f0, lit_3784(r2)
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/* 80015420 C0 23 00 00 */ lfs f1, 0(r3)
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/* 80015424 FC 00 08 00 */ fcmpu cr0, f0, f1
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/* 80015428 41 82 00 2C */ beq lbl_80015454
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/* 8001542C C0 42 81 8C */ lfs f2, lit_3786(r2)
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/* 80015430 C0 02 81 90 */ lfs f0, lit_3787(r2)
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/* 80015434 EC 20 00 72 */ fmuls f1, f0, f1
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/* 80015438 C0 03 00 08 */ lfs f0, 8(r3)
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/* 8001543C EC 01 00 2A */ fadds f0, f1, f0
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/* 80015440 EC 22 00 32 */ fmuls f1, f2, f0
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/* 80015444 C0 02 81 94 */ lfs f0, lit_3788(r2)
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/* 80015448 EC 81 00 28 */ fsubs f4, f1, f0
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/* 8001544C C0 C2 81 98 */ lfs f6, lit_3789(r2)
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/* 80015450 48 00 00 0C */ b lbl_8001545C
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lbl_80015454:
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/* 80015454 FC 80 08 90 */ fmr f4, f1
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/* 80015458 C0 C3 00 08 */ lfs f6, 8(r3)
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lbl_8001545C:
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/* 8001545C C0 02 81 84 */ lfs f0, lit_3784(r2)
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/* 80015460 C0 23 00 04 */ lfs f1, 4(r3)
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/* 80015464 FC 00 08 00 */ fcmpu cr0, f0, f1
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/* 80015468 41 82 00 2C */ beq lbl_80015494
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/* 8001546C C0 42 81 8C */ lfs f2, lit_3786(r2)
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/* 80015470 C0 02 81 90 */ lfs f0, lit_3787(r2)
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/* 80015474 EC 20 00 72 */ fmuls f1, f0, f1
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/* 80015478 C0 03 00 0C */ lfs f0, 0xc(r3)
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/* 8001547C EC 01 00 2A */ fadds f0, f1, f0
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/* 80015480 EC 22 00 32 */ fmuls f1, f2, f0
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/* 80015484 C0 02 81 9C */ lfs f0, lit_3790(r2)
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/* 80015488 EC A1 00 28 */ fsubs f5, f1, f0
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/* 8001548C C0 E2 81 A0 */ lfs f7, lit_3791(r2)
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/* 80015490 48 00 00 0C */ b lbl_8001549C
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lbl_80015494:
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/* 80015494 FC A0 08 90 */ fmr f5, f1
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/* 80015498 C0 E3 00 0C */ lfs f7, 0xc(r3)
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lbl_8001549C:
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/* 8001549C C0 42 81 8C */ lfs f2, lit_3786(r2)
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/* 800154A0 C0 01 00 08 */ lfs f0, 8(r1)
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/* 800154A4 EC 00 00 F2 */ fmuls f0, f0, f3
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/* 800154A8 EC 02 00 2A */ fadds f0, f2, f0
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/* 800154AC EC 06 00 32 */ fmuls f0, f6, f0
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/* 800154B0 EC 04 00 2A */ fadds f0, f4, f0
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/* 800154B4 D0 1E 00 00 */ stfs f0, 0(r30)
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/* 800154B8 C0 21 00 0C */ lfs f1, 0xc(r1)
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/* 800154BC FC 00 18 50 */ fneg f0, f3
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/* 800154C0 EC 01 00 32 */ fmuls f0, f1, f0
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/* 800154C4 EC 02 00 2A */ fadds f0, f2, f0
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/* 800154C8 EC 07 00 32 */ fmuls f0, f7, f0
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/* 800154CC EC 05 00 2A */ fadds f0, f5, f0
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/* 800154D0 D0 1E 00 04 */ stfs f0, 4(r30)
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lbl_800154D4:
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/* 800154D4 39 61 00 30 */ addi r11, r1, 0x30
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/* 800154D8 48 34 CD 51 */ bl _restgpr_29
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/* 800154DC 80 01 00 34 */ lwz r0, 0x34(r1)
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/* 800154E0 7C 08 03 A6 */ mtlr r0
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/* 800154E4 38 21 00 30 */ addi r1, r1, 0x30
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/* 800154E8 4E 80 00 20 */ blr
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@@ -1,87 +0,0 @@
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lbl_8001513C:
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/* 8001513C 94 21 FF C0 */ stwu r1, -0x40(r1)
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/* 80015140 7C 08 02 A6 */ mflr r0
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/* 80015144 90 01 00 44 */ stw r0, 0x44(r1)
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/* 80015148 39 61 00 40 */ addi r11, r1, 0x40
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/* 8001514C 48 34 D0 91 */ bl _savegpr_29
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/* 80015150 7C 7F 1B 78 */ mr r31, r3
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/* 80015154 7C 9D 23 78 */ mr r29, r4
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/* 80015158 7C BE 2B 78 */ mr r30, r5
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/* 8001515C 88 03 00 08 */ lbz r0, 8(r3)
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/* 80015160 28 00 00 00 */ cmplwi r0, 0
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/* 80015164 41 82 00 54 */ beq lbl_800151B8
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/* 80015168 7C C3 33 78 */ mr r3, r6
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/* 8001516C 80 1F 00 0C */ lwz r0, 0xc(r31)
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/* 80015170 7C 9F 02 14 */ add r4, r31, r0
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/* 80015174 88 BF 00 09 */ lbz r5, 9(r31)
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/* 80015178 A0 DF 00 0A */ lhz r6, 0xa(r31)
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/* 8001517C 48 34 92 ED */ bl GXInitTlutObj
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/* 80015180 93 C1 00 08 */ stw r30, 8(r1)
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/* 80015184 7F A3 EB 78 */ mr r3, r29
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/* 80015188 80 1F 00 1C */ lwz r0, 0x1c(r31)
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/* 8001518C 7C 9F 02 14 */ add r4, r31, r0
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/* 80015190 A0 BF 00 02 */ lhz r5, 2(r31)
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/* 80015194 A0 DF 00 04 */ lhz r6, 4(r31)
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/* 80015198 88 FF 00 00 */ lbz r7, 0(r31)
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/* 8001519C 89 1F 00 06 */ lbz r8, 6(r31)
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/* 800151A0 89 3F 00 07 */ lbz r9, 7(r31)
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/* 800151A4 88 1F 00 18 */ lbz r0, 0x18(r31)
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/* 800151A8 20 00 00 01 */ subfic r0, r0, 1
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/* 800151AC 54 0A 0F FE */ srwi r10, r0, 0x1f
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/* 800151B0 48 34 8E DD */ bl GXInitTexObjCI
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/* 800151B4 48 00 00 34 */ b lbl_800151E8
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lbl_800151B8:
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/* 800151B8 7F A3 EB 78 */ mr r3, r29
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/* 800151BC 80 1F 00 1C */ lwz r0, 0x1c(r31)
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/* 800151C0 7C 9F 02 14 */ add r4, r31, r0
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/* 800151C4 A0 BF 00 02 */ lhz r5, 2(r31)
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/* 800151C8 A0 DF 00 04 */ lhz r6, 4(r31)
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/* 800151CC 88 FF 00 00 */ lbz r7, 0(r31)
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/* 800151D0 89 1F 00 06 */ lbz r8, 6(r31)
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/* 800151D4 89 3F 00 07 */ lbz r9, 7(r31)
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/* 800151D8 88 1F 00 18 */ lbz r0, 0x18(r31)
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/* 800151DC 20 00 00 01 */ subfic r0, r0, 1
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/* 800151E0 54 0A 0F FE */ srwi r10, r0, 0x1f
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/* 800151E4 48 34 8C 5D */ bl GXInitTexObj
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lbl_800151E8:
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/* 800151E8 7F A3 EB 78 */ mr r3, r29
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/* 800151EC 88 9F 00 14 */ lbz r4, 0x14(r31)
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/* 800151F0 88 BF 00 15 */ lbz r5, 0x15(r31)
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/* 800151F4 C0 42 81 70 */ lfs f2, lit_3634(r2)
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/* 800151F8 88 1F 00 16 */ lbz r0, 0x16(r31)
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/* 800151FC 7C 00 07 74 */ extsb r0, r0
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/* 80015200 C8 82 81 78 */ lfd f4, lit_3638(r2)
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/* 80015204 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 80015208 90 01 00 14 */ stw r0, 0x14(r1)
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/* 8001520C 3C C0 43 30 */ lis r6, 0x4330
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/* 80015210 90 C1 00 10 */ stw r6, 0x10(r1)
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/* 80015214 C8 01 00 10 */ lfd f0, 0x10(r1)
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/* 80015218 EC 00 20 28 */ fsubs f0, f0, f4
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/* 8001521C EC 22 00 32 */ fmuls f1, f2, f0
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/* 80015220 88 1F 00 17 */ lbz r0, 0x17(r31)
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/* 80015224 7C 00 07 74 */ extsb r0, r0
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/* 80015228 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 8001522C 90 01 00 1C */ stw r0, 0x1c(r1)
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/* 80015230 90 C1 00 18 */ stw r6, 0x18(r1)
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/* 80015234 C8 01 00 18 */ lfd f0, 0x18(r1)
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/* 80015238 EC 00 20 28 */ fsubs f0, f0, f4
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/* 8001523C EC 42 00 32 */ fmuls f2, f2, f0
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/* 80015240 C0 62 81 74 */ lfs f3, lit_3635(r2)
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/* 80015244 A8 1F 00 1A */ lha r0, 0x1a(r31)
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/* 80015248 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 8001524C 90 01 00 24 */ stw r0, 0x24(r1)
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/* 80015250 90 C1 00 20 */ stw r6, 0x20(r1)
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/* 80015254 C8 01 00 20 */ lfd f0, 0x20(r1)
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/* 80015258 EC 00 20 28 */ fsubs f0, f0, f4
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/* 8001525C EC 63 00 32 */ fmuls f3, f3, f0
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/* 80015260 88 DF 00 12 */ lbz r6, 0x12(r31)
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/* 80015264 88 FF 00 11 */ lbz r7, 0x11(r31)
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/* 80015268 89 1F 00 13 */ lbz r8, 0x13(r31)
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/* 8001526C 48 34 8E 69 */ bl GXInitTexObjLOD
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/* 80015270 88 7F 00 08 */ lbz r3, 8(r31)
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/* 80015274 39 61 00 40 */ addi r11, r1, 0x40
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/* 80015278 48 34 CF B1 */ bl _restgpr_29
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/* 8001527C 80 01 00 44 */ lwz r0, 0x44(r1)
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/* 80015280 7C 08 03 A6 */ mtlr r0
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/* 80015284 38 21 00 40 */ addi r1, r1, 0x40
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/* 80015288 4E 80 00 20 */ blr
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