mirror of
https://github.com/encounter/tp.git
synced 2026-07-11 06:18:46 -07:00
dSv_danBit_c ok + fixed many nonmatchings
This commit is contained in:
unknown
+1
-1
@@ -139792,7 +139792,7 @@ daAlink_c_NS_checkFinalBattle:
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/* 80118B00 00115A40 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
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/* 80118B04 00115A44 38 63 09 78 */ addi r3, r3, 0x978
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/* 80118B08 00115A48 38 80 00 01 */ li r4, 1
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/* 80118B0C 00115A4C 4B F1 C0 DD */ bl dSv_danBit_c_NS_isSwitch
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/* 80118B0C 00115A4C 4B F1 C0 DD */ bl isSwitch__12dSv_danBit_cCFi
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/* 80118B10 00115A50 2C 03 00 00 */ cmpwi r3, 0
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/* 80118B14 00115A54 41 82 00 08 */ beq lbl_80118B1C
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/* 80118B18 00115A58 3B E0 00 01 */ li r31, 1
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@@ -2872,7 +2872,7 @@ lbl_8002D978:
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/* 8002D98C 0002A8CC 7C 60 22 14 */ add r3, r0, r4
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/* 8002D990 0002A8D0 38 63 09 B6 */ addi r3, r3, 0x9b6
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/* 8002D994 0002A8D4 7F E4 FB 78 */ mr r4, r31
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/* 8002D998 0002A8D8 48 00 73 6D */ bl dSv_zoneBit_c_NS_onSwitch
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/* 8002D998 0002A8D8 48 00 73 6D */ bl onSwitch__13dSv_zoneBit_cFi
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lbl_8002D99C:
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/* 8002D99C 0002A8DC 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 8002D9A0 0002A8E0 80 01 00 14 */ lwz r0, 0x14(r1)
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@@ -2913,7 +2913,7 @@ lbl_8002D9F8:
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/* 8002DA0C 0002A94C 7C 60 22 14 */ add r3, r0, r4
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/* 8002DA10 0002A950 38 63 09 B6 */ addi r3, r3, 0x9b6
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/* 8002DA14 0002A954 7F E4 FB 78 */ mr r4, r31
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/* 8002DA18 0002A958 48 00 73 15 */ bl dSv_zoneBit_c_NS_offSwitch
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/* 8002DA18 0002A958 48 00 73 15 */ bl offSwitch__13dSv_zoneBit_cFi
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lbl_8002DA1C:
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/* 8002DA1C 0002A95C 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 8002DA20 0002A960 80 01 00 14 */ lwz r0, 0x14(r1)
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@@ -2946,7 +2946,7 @@ lbl_8002DA64:
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/* 8002DA78 0002A9B8 7C 60 22 14 */ add r3, r0, r4
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/* 8002DA7C 0002A9BC 38 63 09 B6 */ addi r3, r3, 0x9b6
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/* 8002DA80 0002A9C0 7F E4 FB 78 */ mr r4, r31
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/* 8002DA84 0002A9C4 48 00 72 CD */ bl dSv_zoneBit_c_NS_isSwitch
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/* 8002DA84 0002A9C4 48 00 72 CD */ bl isSwitch__13dSv_zoneBit_cCFi
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lbl_8002DA88:
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/* 8002DA88 0002A9C8 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 8002DA8C 0002A9CC 80 01 00 14 */ lwz r0, 0x14(r1)
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+1
-1
@@ -2403,7 +2403,7 @@ dAttention_c_NS_checkButton:
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/* 80072128 0006F068 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
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/* 8007212C 0006F06C 38 63 09 78 */ addi r3, r3, 0x978
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/* 80072130 0006F070 38 80 00 01 */ li r4, 1
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/* 80072134 0006F074 4B FC 2A B5 */ bl dSv_danBit_c_NS_isSwitch
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/* 80072134 0006F074 4B FC 2A B5 */ bl isSwitch__12dSv_danBit_cCFi
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/* 80072138 0006F078 2C 03 00 00 */ cmpwi r3, 0
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/* 8007213C 0006F07C 40 82 00 38 */ bne lbl_80072174
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/* 80072140 0006F080 88 1F 03 2B */ lbz r0, 0x32b(r31)
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+1
-1
@@ -2189,7 +2189,7 @@ lbl_8002A408:
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/* 8002A41C 0002735C 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
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/* 8002A420 00027360 38 63 09 78 */ addi r3, r3, 0x978
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/* 8002A424 00027364 38 80 00 32 */ li r4, 0x32
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/* 8002A428 00027368 48 00 A7 C1 */ bl dSv_danBit_c_NS_isSwitch
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/* 8002A428 00027368 48 00 A7 C1 */ bl isSwitch__12dSv_danBit_cCFi
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/* 8002A42C 0002736C 2C 03 00 00 */ cmpwi r3, 0
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/* 8002A430 00027370 41 82 00 90 */ beq lbl_8002A4C0
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/* 8002A434 00027374 3C 60 80 40 */ lis r3, lbl_804061C0@ha
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+11
-208
@@ -2,203 +2,6 @@
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.section .text, "ax" # 80032918
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.global dSv_danBit_c_NS_init
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dSv_danBit_c_NS_init:
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/* 80034B14 00031A54 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80034B18 00031A58 7C 08 02 A6 */ mflr r0
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/* 80034B1C 00031A5C 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80034B20 00031A60 7C 85 07 74 */ extsb r5, r4
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/* 80034B24 00031A64 88 03 00 00 */ lbz r0, 0(r3)
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/* 80034B28 00031A68 7C 00 07 74 */ extsb r0, r0
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/* 80034B2C 00031A6C 7C 05 00 00 */ cmpw r5, r0
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/* 80034B30 00031A70 41 82 00 50 */ beq lbl_80034B80
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/* 80034B34 00031A74 38 A0 00 00 */ li r5, 0
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/* 80034B38 00031A78 90 A3 00 04 */ stw r5, 4(r3)
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/* 80034B3C 00031A7C 90 A3 00 08 */ stw r5, 8(r3)
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/* 80034B40 00031A80 90 A3 00 0C */ stw r5, 0xc(r3)
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/* 80034B44 00031A84 90 A3 00 10 */ stw r5, 0x10(r3)
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/* 80034B48 00031A88 90 A3 00 14 */ stw r5, 0x14(r3)
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/* 80034B4C 00031A8C 90 A3 00 18 */ stw r5, 0x18(r3)
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/* 80034B50 00031A90 98 83 00 00 */ stb r4, 0(r3)
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/* 80034B54 00031A94 98 A3 00 01 */ stb r5, 1(r3)
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/* 80034B58 00031A98 38 80 FF FF */ li r4, -1
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/* 80034B5C 00031A9C 38 00 00 10 */ li r0, 0x10
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/* 80034B60 00031AA0 7C 09 03 A6 */ mtctr r0
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lbl_80034B64:
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/* 80034B64 00031AA4 38 05 00 1C */ addi r0, r5, 0x1c
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/* 80034B68 00031AA8 7C 83 03 2E */ sthx r4, r3, r0
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/* 80034B6C 00031AAC 38 A5 00 02 */ addi r5, r5, 2
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/* 80034B70 00031AB0 42 00 FF F4 */ bdnz lbl_80034B64
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/* 80034B74 00031AB4 4B FF D1 85 */ bl daObjCarry_c_NS_clrSaveFlag
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/* 80034B78 00031AB8 38 60 00 01 */ li r3, 1
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/* 80034B7C 00031ABC 48 00 00 0C */ b lbl_80034B88
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lbl_80034B80:
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/* 80034B80 00031AC0 4B FF D1 85 */ bl daObjCarry_c_NS_setSaveFlag
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/* 80034B84 00031AC4 38 60 00 00 */ li r3, 0
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lbl_80034B88:
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/* 80034B88 00031AC8 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80034B8C 00031ACC 7C 08 03 A6 */ mtlr r0
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/* 80034B90 00031AD0 38 21 00 10 */ addi r1, r1, 0x10
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/* 80034B94 00031AD4 4E 80 00 20 */ blr
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.global dSv_danBit_c_NS_onSwitch
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dSv_danBit_c_NS_onSwitch:
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/* 80034B98 00031AD8 7C 80 2E 70 */ srawi r0, r4, 5
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/* 80034B9C 00031ADC 54 00 10 3A */ slwi r0, r0, 2
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/* 80034BA0 00031AE0 7C C3 02 14 */ add r6, r3, r0
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/* 80034BA4 00031AE4 80 A6 00 04 */ lwz r5, 4(r6)
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/* 80034BA8 00031AE8 38 60 00 01 */ li r3, 1
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/* 80034BAC 00031AEC 54 80 06 FE */ clrlwi r0, r4, 0x1b
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/* 80034BB0 00031AF0 7C 60 00 30 */ slw r0, r3, r0
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/* 80034BB4 00031AF4 7C A0 03 78 */ or r0, r5, r0
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/* 80034BB8 00031AF8 90 06 00 04 */ stw r0, 4(r6)
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/* 80034BBC 00031AFC 4E 80 00 20 */ blr
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.global dSv_danBit_c_NS_offSwitch
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dSv_danBit_c_NS_offSwitch:
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/* 80034BC0 00031B00 7C 80 2E 70 */ srawi r0, r4, 5
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/* 80034BC4 00031B04 54 00 10 3A */ slwi r0, r0, 2
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/* 80034BC8 00031B08 7C C3 02 14 */ add r6, r3, r0
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/* 80034BCC 00031B0C 80 A6 00 04 */ lwz r5, 4(r6)
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/* 80034BD0 00031B10 38 60 00 01 */ li r3, 1
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/* 80034BD4 00031B14 54 80 06 FE */ clrlwi r0, r4, 0x1b
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/* 80034BD8 00031B18 7C 60 00 30 */ slw r0, r3, r0
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/* 80034BDC 00031B1C 7C A0 00 78 */ andc r0, r5, r0
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/* 80034BE0 00031B20 90 06 00 04 */ stw r0, 4(r6)
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/* 80034BE4 00031B24 4E 80 00 20 */ blr
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.global dSv_danBit_c_NS_isSwitch
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dSv_danBit_c_NS_isSwitch:
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/* 80034BE8 00031B28 7C 80 2E 70 */ srawi r0, r4, 5
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/* 80034BEC 00031B2C 54 00 10 3A */ slwi r0, r0, 2
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/* 80034BF0 00031B30 7C 63 02 14 */ add r3, r3, r0
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/* 80034BF4 00031B34 80 A3 00 04 */ lwz r5, 4(r3)
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/* 80034BF8 00031B38 38 60 00 01 */ li r3, 1
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/* 80034BFC 00031B3C 54 80 06 FE */ clrlwi r0, r4, 0x1b
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/* 80034C00 00031B40 7C 60 00 30 */ slw r0, r3, r0
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/* 80034C04 00031B44 7C A3 00 38 */ and r3, r5, r0
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/* 80034C08 00031B48 30 03 FF FF */ addic r0, r3, -1
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/* 80034C0C 00031B4C 7C 60 19 10 */ subfe r3, r0, r3
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/* 80034C10 00031B50 4E 80 00 20 */ blr
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.global dSv_danBit_c_NS_revSwitch
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dSv_danBit_c_NS_revSwitch:
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/* 80034C14 00031B54 38 A0 00 01 */ li r5, 1
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/* 80034C18 00031B58 54 80 06 FE */ clrlwi r0, r4, 0x1b
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/* 80034C1C 00031B5C 7C A5 00 30 */ slw r5, r5, r0
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/* 80034C20 00031B60 7C 80 2E 70 */ srawi r0, r4, 5
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/* 80034C24 00031B64 54 00 10 3A */ slwi r0, r0, 2
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/* 80034C28 00031B68 7C 63 02 14 */ add r3, r3, r0
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/* 80034C2C 00031B6C 80 03 00 04 */ lwz r0, 4(r3)
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/* 80034C30 00031B70 7C 00 2A 78 */ xor r0, r0, r5
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/* 80034C34 00031B74 90 03 00 04 */ stw r0, 4(r3)
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/* 80034C38 00031B78 80 03 00 04 */ lwz r0, 4(r3)
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/* 80034C3C 00031B7C 7C 03 28 38 */ and r3, r0, r5
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/* 80034C40 00031B80 30 03 FF FF */ addic r0, r3, -1
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/* 80034C44 00031B84 7C 60 19 10 */ subfe r3, r0, r3
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/* 80034C48 00031B88 4E 80 00 20 */ blr
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.global dSv_danBit_c_NS_onItem
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dSv_danBit_c_NS_onItem:
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/* 80034C4C 00031B8C 7C 80 2E 70 */ srawi r0, r4, 5
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/* 80034C50 00031B90 54 00 10 3A */ slwi r0, r0, 2
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/* 80034C54 00031B94 7C C3 02 14 */ add r6, r3, r0
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/* 80034C58 00031B98 80 A6 00 0C */ lwz r5, 0xc(r6)
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/* 80034C5C 00031B9C 38 60 00 01 */ li r3, 1
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/* 80034C60 00031BA0 54 80 06 FE */ clrlwi r0, r4, 0x1b
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/* 80034C64 00031BA4 7C 60 00 30 */ slw r0, r3, r0
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/* 80034C68 00031BA8 7C A0 03 78 */ or r0, r5, r0
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/* 80034C6C 00031BAC 90 06 00 0C */ stw r0, 0xc(r6)
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/* 80034C70 00031BB0 4E 80 00 20 */ blr
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.global dSv_danBit_c_NS_isItem
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dSv_danBit_c_NS_isItem:
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/* 80034C74 00031BB4 7C 80 2E 70 */ srawi r0, r4, 5
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/* 80034C78 00031BB8 54 00 10 3A */ slwi r0, r0, 2
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/* 80034C7C 00031BBC 7C 63 02 14 */ add r3, r3, r0
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/* 80034C80 00031BC0 80 A3 00 0C */ lwz r5, 0xc(r3)
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/* 80034C84 00031BC4 38 60 00 01 */ li r3, 1
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/* 80034C88 00031BC8 54 80 06 FE */ clrlwi r0, r4, 0x1b
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/* 80034C8C 00031BCC 7C 60 00 30 */ slw r0, r3, r0
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/* 80034C90 00031BD0 7C A3 00 38 */ and r3, r5, r0
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/* 80034C94 00031BD4 30 03 FF FF */ addic r0, r3, -1
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/* 80034C98 00031BD8 7C 60 19 10 */ subfe r3, r0, r3
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/* 80034C9C 00031BDC 4E 80 00 20 */ blr
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.global dSv_zoneBit_c_NS_init
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dSv_zoneBit_c_NS_init:
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/* 80034CA0 00031BE0 38 80 00 00 */ li r4, 0
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/* 80034CA4 00031BE4 7C 85 23 78 */ mr r5, r4
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/* 80034CA8 00031BE8 38 00 00 02 */ li r0, 2
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/* 80034CAC 00031BEC 7C 09 03 A6 */ mtctr r0
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lbl_80034CB0:
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/* 80034CB0 00031BF0 7C A3 23 2E */ sthx r5, r3, r4
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/* 80034CB4 00031BF4 38 84 00 02 */ addi r4, r4, 2
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/* 80034CB8 00031BF8 42 00 FF F8 */ bdnz lbl_80034CB0
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/* 80034CBC 00031BFC 38 80 00 00 */ li r4, 0
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/* 80034CC0 00031C00 38 A0 00 00 */ li r5, 0
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/* 80034CC4 00031C04 38 00 00 02 */ li r0, 2
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/* 80034CC8 00031C08 7C 09 03 A6 */ mtctr r0
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lbl_80034CCC:
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/* 80034CCC 00031C0C 38 04 00 06 */ addi r0, r4, 6
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/* 80034CD0 00031C10 7C A3 03 2E */ sthx r5, r3, r0
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/* 80034CD4 00031C14 38 84 00 02 */ addi r4, r4, 2
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/* 80034CD8 00031C18 42 00 FF F4 */ bdnz lbl_80034CCC
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/* 80034CDC 00031C1C 38 00 00 00 */ li r0, 0
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/* 80034CE0 00031C20 B0 03 00 04 */ sth r0, 4(r3)
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/* 80034CE4 00031C24 B0 03 00 0A */ sth r0, 0xa(r3)
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/* 80034CE8 00031C28 4E 80 00 20 */ blr
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.global dSv_zoneBit_c_NS_clearRoomSwitch
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dSv_zoneBit_c_NS_clearRoomSwitch:
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/* 80034CEC 00031C2C 38 00 00 00 */ li r0, 0
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/* 80034CF0 00031C30 B0 03 00 04 */ sth r0, 4(r3)
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/* 80034CF4 00031C34 4E 80 00 20 */ blr
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.global dSv_zoneBit_c_NS_clearRoomItem
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dSv_zoneBit_c_NS_clearRoomItem:
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/* 80034CF8 00031C38 38 00 00 00 */ li r0, 0
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/* 80034CFC 00031C3C B0 03 00 0A */ sth r0, 0xa(r3)
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/* 80034D00 00031C40 4E 80 00 20 */ blr
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.global dSv_zoneBit_c_NS_onSwitch
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dSv_zoneBit_c_NS_onSwitch:
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/* 80034D04 00031C44 7C 80 26 70 */ srawi r0, r4, 4
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/* 80034D08 00031C48 54 07 08 3C */ slwi r7, r0, 1
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/* 80034D0C 00031C4C 7C C3 3A 2E */ lhzx r6, r3, r7
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/* 80034D10 00031C50 38 A0 00 01 */ li r5, 1
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/* 80034D14 00031C54 54 80 07 3E */ clrlwi r0, r4, 0x1c
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/* 80034D18 00031C58 7C A0 00 30 */ slw r0, r5, r0
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/* 80034D1C 00031C5C 54 00 04 3E */ clrlwi r0, r0, 0x10
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/* 80034D20 00031C60 7C C0 03 78 */ or r0, r6, r0
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/* 80034D24 00031C64 7C 03 3B 2E */ sthx r0, r3, r7
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/* 80034D28 00031C68 4E 80 00 20 */ blr
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.global dSv_zoneBit_c_NS_offSwitch
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dSv_zoneBit_c_NS_offSwitch:
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/* 80034D2C 00031C6C 7C 80 26 70 */ srawi r0, r4, 4
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/* 80034D30 00031C70 54 07 08 3C */ slwi r7, r0, 1
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/* 80034D34 00031C74 7C C3 3A 2E */ lhzx r6, r3, r7
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||||
/* 80034D38 00031C78 38 A0 00 01 */ li r5, 1
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/* 80034D3C 00031C7C 54 80 07 3E */ clrlwi r0, r4, 0x1c
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/* 80034D40 00031C80 7C A0 00 30 */ slw r0, r5, r0
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/* 80034D44 00031C84 7C C0 00 78 */ andc r0, r6, r0
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/* 80034D48 00031C88 7C 03 3B 2E */ sthx r0, r3, r7
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/* 80034D4C 00031C8C 4E 80 00 20 */ blr
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.global dSv_zoneBit_c_NS_isSwitch
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dSv_zoneBit_c_NS_isSwitch:
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/* 80034D50 00031C90 38 A0 00 01 */ li r5, 1
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/* 80034D54 00031C94 54 80 07 3E */ clrlwi r0, r4, 0x1c
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/* 80034D58 00031C98 7C A5 00 30 */ slw r5, r5, r0
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/* 80034D5C 00031C9C 7C 80 26 70 */ srawi r0, r4, 4
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/* 80034D60 00031CA0 54 00 08 3C */ slwi r0, r0, 1
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/* 80034D64 00031CA4 7C 03 02 2E */ lhzx r0, r3, r0
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/* 80034D68 00031CA8 7C A3 00 38 */ and r3, r5, r0
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/* 80034D6C 00031CAC 30 03 FF FF */ addic r0, r3, -1
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/* 80034D70 00031CB0 7C 60 19 10 */ subfe r3, r0, r3
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/* 80034D74 00031CB4 4E 80 00 20 */ blr
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.global dSv_zoneBit_c_NS_revSwitch
|
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dSv_zoneBit_c_NS_revSwitch:
|
||||
/* 80034D78 00031CB8 7C 86 26 70 */ srawi r6, r4, 4
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@@ -363,7 +166,7 @@ dSv_zone_c_NS_init:
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||||
/* 80034F54 00031E94 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 80034F58 00031E98 98 83 00 00 */ stb r4, 0(r3)
|
||||
/* 80034F5C 00031E9C 38 7F 00 02 */ addi r3, r31, 2
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||||
/* 80034F60 00031EA0 4B FF FD 41 */ bl dSv_zoneBit_c_NS_init
|
||||
/* 80034F60 00031EA0 4B FF FD 41 */ bl init__13dSv_zoneBit_cFv
|
||||
/* 80034F64 00031EA4 38 7F 00 10 */ addi r3, r31, 0x10
|
||||
/* 80034F68 00031EA8 4B FF FF 4D */ bl dSv_zoneActor_c_NS_init
|
||||
/* 80034F6C 00031EAC 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||
@@ -409,7 +212,7 @@ dSv_info_c_NS_init:
|
||||
/* 80034FE8 00031F28 4B FF FA 7D */ bl init__12dSv_memory_cFv
|
||||
/* 80034FEC 00031F2C 38 7F 09 78 */ addi r3, r31, 0x978
|
||||
/* 80034FF0 00031F30 38 80 FF FF */ li r4, -1
|
||||
/* 80034FF4 00031F34 4B FF FB 21 */ bl dSv_danBit_c_NS_init
|
||||
/* 80034FF4 00031F34 4B FF FB 21 */ bl init__12dSv_danBit_cFSc
|
||||
/* 80034FF8 00031F38 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80034FFC 00031F3C 48 00 01 51 */ bl dSv_info_c_NS_initZone
|
||||
/* 80035000 00031F40 38 7F 0D D8 */ addi r3, r31, 0xdd8
|
||||
@@ -593,7 +396,7 @@ lbl_80035244:
|
||||
/* 80035248 00032188 40 80 00 14 */ bge lbl_8003525C
|
||||
/* 8003524C 0003218C 38 7E 09 78 */ addi r3, r30, 0x978
|
||||
/* 80035250 00032190 38 9F FF 80 */ addi r4, r31, -128
|
||||
/* 80035254 00032194 4B FF F9 45 */ bl dSv_danBit_c_NS_onSwitch
|
||||
/* 80035254 00032194 4B FF F9 45 */ bl onSwitch__12dSv_danBit_cFi
|
||||
/* 80035258 00032198 48 00 00 40 */ b lbl_80035298
|
||||
lbl_8003525C:
|
||||
/* 8003525C 0003219C 7C A3 2B 78 */ mr r3, r5
|
||||
@@ -604,7 +407,7 @@ lbl_8003525C:
|
||||
/* 80035270 000321B0 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 80035274 000321B4 7C 7E 1A 14 */ add r3, r30, r3
|
||||
/* 80035278 000321B8 38 9F FF 40 */ addi r4, r31, -192
|
||||
/* 8003527C 000321BC 4B FF FA 89 */ bl dSv_zoneBit_c_NS_onSwitch
|
||||
/* 8003527C 000321BC 4B FF FA 89 */ bl onSwitch__13dSv_zoneBit_cFi
|
||||
/* 80035280 000321C0 48 00 00 18 */ b lbl_80035298
|
||||
lbl_80035284:
|
||||
/* 80035284 000321C4 54 63 28 34 */ slwi r3, r3, 5
|
||||
@@ -645,7 +448,7 @@ lbl_800352F4:
|
||||
/* 800352F8 00032238 40 80 00 14 */ bge lbl_8003530C
|
||||
/* 800352FC 0003223C 38 7E 09 78 */ addi r3, r30, 0x978
|
||||
/* 80035300 00032240 38 9F FF 80 */ addi r4, r31, -128
|
||||
/* 80035304 00032244 4B FF F8 BD */ bl dSv_danBit_c_NS_offSwitch
|
||||
/* 80035304 00032244 4B FF F8 BD */ bl offSwitch__12dSv_danBit_cFi
|
||||
/* 80035308 00032248 48 00 00 40 */ b lbl_80035348
|
||||
lbl_8003530C:
|
||||
/* 8003530C 0003224C 7C A3 2B 78 */ mr r3, r5
|
||||
@@ -656,7 +459,7 @@ lbl_8003530C:
|
||||
/* 80035320 00032260 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 80035324 00032264 7C 7E 1A 14 */ add r3, r30, r3
|
||||
/* 80035328 00032268 38 9F FF 40 */ addi r4, r31, -192
|
||||
/* 8003532C 0003226C 4B FF FA 01 */ bl dSv_zoneBit_c_NS_offSwitch
|
||||
/* 8003532C 0003226C 4B FF FA 01 */ bl offSwitch__13dSv_zoneBit_cFi
|
||||
/* 80035330 00032270 48 00 00 18 */ b lbl_80035348
|
||||
lbl_80035334:
|
||||
/* 80035334 00032274 54 63 28 34 */ slwi r3, r3, 5
|
||||
@@ -699,7 +502,7 @@ lbl_800353A8:
|
||||
/* 800353AC 000322EC 40 80 00 14 */ bge lbl_800353C0
|
||||
/* 800353B0 000322F0 38 7E 09 78 */ addi r3, r30, 0x978
|
||||
/* 800353B4 000322F4 38 9F FF 80 */ addi r4, r31, -128
|
||||
/* 800353B8 000322F8 4B FF F8 31 */ bl dSv_danBit_c_NS_isSwitch
|
||||
/* 800353B8 000322F8 4B FF F8 31 */ bl isSwitch__12dSv_danBit_cCFi
|
||||
/* 800353BC 000322FC 48 00 00 58 */ b lbl_80035414
|
||||
lbl_800353C0:
|
||||
/* 800353C0 00032300 7C A3 2B 78 */ mr r3, r5
|
||||
@@ -718,7 +521,7 @@ lbl_800353E0:
|
||||
/* 800353EC 0003232C 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 800353F0 00032330 7C 7E 1A 14 */ add r3, r30, r3
|
||||
/* 800353F4 00032334 38 9F FF 40 */ addi r4, r31, -192
|
||||
/* 800353F8 00032338 4B FF F9 59 */ bl dSv_zoneBit_c_NS_isSwitch
|
||||
/* 800353F8 00032338 4B FF F9 59 */ bl isSwitch__13dSv_zoneBit_cCFi
|
||||
/* 800353FC 0003233C 48 00 00 18 */ b lbl_80035414
|
||||
lbl_80035400:
|
||||
/* 80035400 00032340 54 63 28 34 */ slwi r3, r3, 5
|
||||
@@ -758,7 +561,7 @@ lbl_80035474:
|
||||
/* 80035478 000323B8 40 80 00 14 */ bge lbl_8003548C
|
||||
/* 8003547C 000323BC 38 7E 09 78 */ addi r3, r30, 0x978
|
||||
/* 80035480 000323C0 38 9F FF 80 */ addi r4, r31, -128
|
||||
/* 80035484 000323C4 4B FF F7 91 */ bl dSv_danBit_c_NS_revSwitch
|
||||
/* 80035484 000323C4 4B FF F7 91 */ bl revSwitch__12dSv_danBit_cFi
|
||||
/* 80035488 000323C8 48 00 00 40 */ b lbl_800354C8
|
||||
lbl_8003548C:
|
||||
/* 8003548C 000323CC 7C A3 2B 78 */ mr r3, r5
|
||||
@@ -803,7 +606,7 @@ lbl_80035510:
|
||||
/* 80035510 00032450 2C 1F 00 80 */ cmpwi r31, 0x80
|
||||
/* 80035514 00032454 40 80 00 10 */ bge lbl_80035524
|
||||
/* 80035518 00032458 38 7E 09 78 */ addi r3, r30, 0x978
|
||||
/* 8003551C 0003245C 4B FF F7 31 */ bl dSv_danBit_c_NS_onItem
|
||||
/* 8003551C 0003245C 4B FF F7 31 */ bl onItem__12dSv_danBit_cFi
|
||||
/* 80035520 00032460 48 00 00 58 */ b lbl_80035578
|
||||
lbl_80035524:
|
||||
/* 80035524 00032464 2C 1F 00 A0 */ cmpwi r31, 0xa0
|
||||
@@ -857,7 +660,7 @@ lbl_800355C4:
|
||||
/* 800355C4 00032504 2C 1F 00 80 */ cmpwi r31, 0x80
|
||||
/* 800355C8 00032508 40 80 00 10 */ bge lbl_800355D8
|
||||
/* 800355CC 0003250C 38 7E 09 78 */ addi r3, r30, 0x978
|
||||
/* 800355D0 00032510 4B FF F6 A5 */ bl dSv_danBit_c_NS_isItem
|
||||
/* 800355D0 00032510 4B FF F6 A5 */ bl isItem__12dSv_danBit_cCFi
|
||||
/* 800355D4 00032514 48 00 00 58 */ b lbl_8003562C
|
||||
lbl_800355D8:
|
||||
/* 800355D8 00032518 2C 1F 00 A0 */ cmpwi r31, 0xa0
|
||||
|
||||
+5
-5
@@ -338,7 +338,7 @@ lbl_8002424C:
|
||||
/* 80024290 000211D0 38 03 61 C0 */ addi r0, r3, lbl_804061C0@l
|
||||
/* 80024294 000211D4 7C 60 22 14 */ add r3, r0, r4
|
||||
/* 80024298 000211D8 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 8002429C 000211DC 48 01 0A 51 */ bl dSv_zoneBit_c_NS_clearRoomSwitch
|
||||
/* 8002429C 000211DC 48 01 0A 51 */ bl clearRoomSwitch__13dSv_zoneBit_cFv
|
||||
/* 800242A0 000211E0 88 1E 03 F7 */ lbz r0, 0x3f7(r30)
|
||||
/* 800242A4 000211E4 7C 00 07 74 */ extsb r0, r0
|
||||
/* 800242A8 000211E8 54 04 28 34 */ slwi r4, r0, 5
|
||||
@@ -346,7 +346,7 @@ lbl_8002424C:
|
||||
/* 800242B0 000211F0 38 03 61 C0 */ addi r0, r3, lbl_804061C0@l
|
||||
/* 800242B4 000211F4 7C 60 22 14 */ add r3, r0, r4
|
||||
/* 800242B8 000211F8 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 800242BC 000211FC 48 01 0A 3D */ bl dSv_zoneBit_c_NS_clearRoomItem
|
||||
/* 800242BC 000211FC 48 01 0A 3D */ bl clearRoomItem__13dSv_zoneBit_cFv
|
||||
lbl_800242C0:
|
||||
/* 800242C0 00021200 38 00 FF FF */ li r0, -1
|
||||
/* 800242C4 00021204 98 1E 03 F8 */ stb r0, 0x3f8(r30)
|
||||
@@ -705,7 +705,7 @@ lbl_80024750:
|
||||
/* 80024774 000216B4 38 03 61 C0 */ addi r0, r3, lbl_804061C0@l
|
||||
/* 80024778 000216B8 7C 60 22 14 */ add r3, r0, r4
|
||||
/* 8002477C 000216BC 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 80024780 000216C0 48 01 05 6D */ bl dSv_zoneBit_c_NS_clearRoomSwitch
|
||||
/* 80024780 000216C0 48 01 05 6D */ bl clearRoomSwitch__13dSv_zoneBit_cFv
|
||||
/* 80024784 000216C4 88 1E 03 F7 */ lbz r0, 0x3f7(r30)
|
||||
/* 80024788 000216C8 7C 00 07 74 */ extsb r0, r0
|
||||
/* 8002478C 000216CC 54 04 28 34 */ slwi r4, r0, 5
|
||||
@@ -713,7 +713,7 @@ lbl_80024750:
|
||||
/* 80024794 000216D4 38 03 61 C0 */ addi r0, r3, lbl_804061C0@l
|
||||
/* 80024798 000216D8 7C 60 22 14 */ add r3, r0, r4
|
||||
/* 8002479C 000216DC 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 800247A0 000216E0 48 01 05 59 */ bl dSv_zoneBit_c_NS_clearRoomItem
|
||||
/* 800247A0 000216E0 48 01 05 59 */ bl clearRoomItem__13dSv_zoneBit_cFv
|
||||
/* 800247A4 000216E4 7F E3 FB 78 */ mr r3, r31
|
||||
/* 800247A8 000216E8 81 9F 00 00 */ lwz r12, 0(r31)
|
||||
/* 800247AC 000216EC 81 8C 00 BC */ lwz r12, 0xbc(r12)
|
||||
@@ -1880,7 +1880,7 @@ lbl_800257BC:
|
||||
/* 800257F8 00022738 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
|
||||
/* 800257FC 0002273C 38 63 09 78 */ addi r3, r3, 0x978
|
||||
/* 80025800 00022740 7F E4 07 74 */ extsb r4, r31
|
||||
/* 80025804 00022744 48 00 F3 11 */ bl dSv_danBit_c_NS_init
|
||||
/* 80025804 00022744 48 00 F3 11 */ bl init__12dSv_danBit_cFSc
|
||||
/* 80025808 00022748 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8002580C 0002274C 4B FF E7 45 */ bl dStage_KeepDoorInfoInit
|
||||
/* 80025810 00022750 38 60 00 01 */ li r3, 1
|
||||
|
||||
@@ -1656,7 +1656,7 @@ lbl_8024B3E8:
|
||||
/* 8024B604 00248544 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
|
||||
/* 8024B608 00248548 38 63 09 78 */ addi r3, r3, 0x978
|
||||
/* 8024B60C 0024854C A0 84 00 04 */ lhz r4, 4(r4)
|
||||
/* 8024B610 00248550 4B DE 95 D9 */ bl dSv_danBit_c_NS_isSwitch
|
||||
/* 8024B610 00248550 4B DE 95 D9 */ bl isSwitch__12dSv_danBit_cCFi
|
||||
/* 8024B614 00248554 7C 60 00 34 */ cntlzw r0, r3
|
||||
/* 8024B618 00248558 54 03 DE 3E */ rlwinm r3, r0, 0x1b, 0x18, 0x1f
|
||||
/* 8024B61C 0024855C 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
@@ -1670,7 +1670,7 @@ lbl_8024B3E8:
|
||||
/* 8024B63C 0024857C 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
|
||||
/* 8024B640 00248580 38 63 09 78 */ addi r3, r3, 0x978
|
||||
/* 8024B644 00248584 A0 84 00 04 */ lhz r4, 4(r4)
|
||||
/* 8024B648 00248588 4B DE 96 2D */ bl dSv_danBit_c_NS_isItem
|
||||
/* 8024B648 00248588 4B DE 96 2D */ bl isItem__12dSv_danBit_cCFi
|
||||
/* 8024B64C 0024858C 7C 60 00 34 */ cntlzw r0, r3
|
||||
/* 8024B650 00248590 54 03 DE 3E */ rlwinm r3, r0, 0x1b, 0x18, 0x1f
|
||||
/* 8024B654 00248594 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
@@ -2342,7 +2342,7 @@ lbl_8024BF34:
|
||||
/* 8024C030 00248F70 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
|
||||
/* 8024C034 00248F74 38 63 09 78 */ addi r3, r3, 0x978
|
||||
/* 8024C038 00248F78 38 80 00 3C */ li r4, 0x3c
|
||||
/* 8024C03C 00248F7C 4B DE 8B AD */ bl dSv_danBit_c_NS_isSwitch
|
||||
/* 8024C03C 00248F7C 4B DE 8B AD */ bl isSwitch__12dSv_danBit_cCFi
|
||||
/* 8024C040 00248F80 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8024C044 00248F84 41 82 00 0C */ beq lbl_8024C050
|
||||
/* 8024C048 00248F88 3B C0 00 04 */ li r30, 4
|
||||
@@ -2965,7 +2965,7 @@ lbl_8024C950:
|
||||
/* 8024C954 00249894 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
|
||||
/* 8024C958 00249898 38 63 09 78 */ addi r3, r3, 0x978
|
||||
/* 8024C95C 0024989C A0 81 00 0A */ lhz r4, 0xa(r1)
|
||||
/* 8024C960 002498A0 4B DE 82 39 */ bl dSv_danBit_c_NS_onSwitch
|
||||
/* 8024C960 002498A0 4B DE 82 39 */ bl onSwitch__12dSv_danBit_cFi
|
||||
/* 8024C964 002498A4 48 00 00 18 */ b lbl_8024C97C
|
||||
lbl_8024C968:
|
||||
/* 8024C968 002498A8 A0 61 00 0A */ lhz r3, 0xa(r1)
|
||||
@@ -3022,7 +3022,7 @@ lbl_8024CA18:
|
||||
/* 8024CA1C 0024995C 38 63 61 C0 */ addi r3, r3, lbl_804061C0@l
|
||||
/* 8024CA20 00249960 38 63 09 78 */ addi r3, r3, 0x978
|
||||
/* 8024CA24 00249964 A0 81 00 0A */ lhz r4, 0xa(r1)
|
||||
/* 8024CA28 00249968 4B DE 81 99 */ bl dSv_danBit_c_NS_offSwitch
|
||||
/* 8024CA28 00249968 4B DE 81 99 */ bl offSwitch__12dSv_danBit_cFi
|
||||
/* 8024CA2C 0024996C 48 00 00 18 */ b lbl_8024CA44
|
||||
lbl_8024CA30:
|
||||
/* 8024CA30 00249970 A0 61 00 0A */ lhz r3, 0xa(r1)
|
||||
|
||||
+1
-1
@@ -962,7 +962,7 @@ lbl_8025A188:
|
||||
/* 8025A1C0 00257100 40 82 00 10 */ bne lbl_8025A1D0
|
||||
/* 8025A1C4 00257104 38 63 09 78 */ addi r3, r3, 0x978
|
||||
/* 8025A1C8 00257108 38 80 00 1E */ li r4, 0x1e
|
||||
/* 8025A1CC 0025710C 4B DD A9 CD */ bl dSv_danBit_c_NS_onSwitch
|
||||
/* 8025A1CC 0025710C 4B DD A9 CD */ bl onSwitch__12dSv_danBit_cFi
|
||||
lbl_8025A1D0:
|
||||
/* 8025A1D0 00257110 7F A3 EB 78 */ mr r3, r29
|
||||
/* 8025A1D4 00257114 88 1F 4E 0A */ lbz r0, 0x4e0a(r31)
|
||||
|
||||
+2
-2
@@ -498,7 +498,7 @@ lbl_8025B498:
|
||||
/* 8025B4D0 00258410 38 03 61 C0 */ addi r0, r3, lbl_804061C0@l
|
||||
/* 8025B4D4 00258414 7C 60 22 14 */ add r3, r0, r4
|
||||
/* 8025B4D8 00258418 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 8025B4DC 0025841C 4B DD 98 11 */ bl dSv_zoneBit_c_NS_clearRoomSwitch
|
||||
/* 8025B4DC 0025841C 4B DD 98 11 */ bl clearRoomSwitch__13dSv_zoneBit_cFv
|
||||
/* 8025B4E0 00258420 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8025B4E4 00258424 4B DD 24 CD */ bl dStage_roomControl_c_NS_getZoneNo
|
||||
/* 8025B4E8 00258428 54 64 28 34 */ slwi r4, r3, 5
|
||||
@@ -506,7 +506,7 @@ lbl_8025B498:
|
||||
/* 8025B4F0 00258430 38 03 61 C0 */ addi r0, r3, lbl_804061C0@l
|
||||
/* 8025B4F4 00258434 7C 60 22 14 */ add r3, r0, r4
|
||||
/* 8025B4F8 00258438 38 63 09 B6 */ addi r3, r3, 0x9b6
|
||||
/* 8025B4FC 0025843C 4B DD 97 FD */ bl dSv_zoneBit_c_NS_clearRoomItem
|
||||
/* 8025B4FC 0025843C 4B DD 97 FD */ bl clearRoomItem__13dSv_zoneBit_cFv
|
||||
/* 8025B500 00258440 88 1F 00 00 */ lbz r0, 0(r31)
|
||||
/* 8025B504 00258444 54 00 06 F2 */ rlwinm r0, r0, 0, 0x1b, 0x19
|
||||
/* 8025B508 00258448 98 1F 00 00 */ stb r0, 0(r31)
|
||||
|
||||
@@ -82,7 +82,7 @@ dSvBit_childSwDungeonHIO_c_NS_init:
|
||||
lbl_8025BC70:
|
||||
/* 8025BC70 00258BB0 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8025BC74 00258BB4 7F C4 F3 78 */ mr r4, r30
|
||||
/* 8025BC78 00258BB8 4B DD 8F 71 */ bl dSv_danBit_c_NS_isSwitch
|
||||
/* 8025BC78 00258BB8 4B DD 8F 71 */ bl isSwitch__12dSv_danBit_cCFi
|
||||
/* 8025BC7C 00258BBC 7C 9D F2 14 */ add r4, r29, r30
|
||||
/* 8025BC80 00258BC0 98 64 00 05 */ stb r3, 5(r4)
|
||||
/* 8025BC84 00258BC4 88 04 00 05 */ lbz r0, 5(r4)
|
||||
@@ -240,7 +240,7 @@ dSvBit_childItDungeonHIO_c_NS_init:
|
||||
lbl_8025BE68:
|
||||
/* 8025BE68 00258DA8 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8025BE6C 00258DAC 7F C4 F3 78 */ mr r4, r30
|
||||
/* 8025BE70 00258DB0 4B DD 8E 05 */ bl dSv_danBit_c_NS_isItem
|
||||
/* 8025BE70 00258DB0 4B DD 8E 05 */ bl isItem__12dSv_danBit_cCFi
|
||||
/* 8025BE74 00258DB4 7C 9D F2 14 */ add r4, r29, r30
|
||||
/* 8025BE78 00258DB8 98 64 00 05 */ stb r3, 5(r4)
|
||||
/* 8025BE7C 00258DBC 88 04 00 05 */ lbz r0, 5(r4)
|
||||
|
||||
+9
-13
@@ -175,7 +175,7 @@ class dSv_horse_place_c {
|
||||
class dSv_player_return_place_c {
|
||||
public:
|
||||
void init(void);
|
||||
void set(const char*, const cXyz&, short, s8);
|
||||
void set(const char*, s8, u8);
|
||||
|
||||
private:
|
||||
u8 current_stage[8];
|
||||
@@ -499,25 +499,21 @@ class dSv_memory2_c {
|
||||
|
||||
class dSv_danBit_c {
|
||||
public:
|
||||
void init(void);
|
||||
bool init(s8);
|
||||
void onSwitch(int);
|
||||
void offSwitch(int);
|
||||
bool isSwitch(int) const;
|
||||
u8 revSwitch(int);
|
||||
bool revSwitch(int);
|
||||
void onItem(int);
|
||||
bool isItem(int) const;
|
||||
|
||||
private:
|
||||
u8 unk0;
|
||||
s8 unk0;
|
||||
u8 unk1;
|
||||
u8 unk2[2];
|
||||
u32 unk4;
|
||||
u32 unk8;
|
||||
u32 unk12;
|
||||
u32 unk16;
|
||||
u32 unk20;
|
||||
u32 unk24;
|
||||
u16 unk28[16];
|
||||
u32 switch_bitfield[2];
|
||||
u32 item_bitfield[4];
|
||||
s16 unk28[16];
|
||||
};
|
||||
|
||||
class dSv_zoneBit_c {
|
||||
@@ -540,9 +536,9 @@ class dSv_zoneBit_c {
|
||||
|
||||
private:
|
||||
u16 unk0[2];
|
||||
u16 unk4;
|
||||
u16 room_switch;
|
||||
u16 unk6[2];
|
||||
u16 unk10;
|
||||
u16 room_item;
|
||||
u16 unk12;
|
||||
};
|
||||
|
||||
|
||||
@@ -19,20 +19,3 @@
|
||||
/* 80032D10 0002FC50 7C 08 03 A6 */ mtlr r0
|
||||
/* 80032D14 0002FC54 38 21 00 10 */ addi r1, r1, 0x10
|
||||
/* 80032D18 0002FC58 4E 80 00 20 */ blr
|
||||
/* 80032D1C 0002FC5C 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 80032D20 0002FC60 7C 08 02 A6 */ mflr r0
|
||||
/* 80032D24 0002FC64 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 80032D28 0002FC68 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 80032D2C 0002FC6C 48 32 F4 B1 */ bl _savegpr_29
|
||||
/* 80032D30 0002FC70 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80032D34 0002FC74 7C BE 2B 78 */ mr r30, r5
|
||||
/* 80032D38 0002FC78 7C DF 33 78 */ mr r31, r6
|
||||
/* 80032D3C 0002FC7C 48 33 5D F1 */ bl strcpy
|
||||
/* 80032D40 0002FC80 9B DD 00 09 */ stb r30, 9(r29)
|
||||
/* 80032D44 0002FC84 9B FD 00 08 */ stb r31, 8(r29)
|
||||
/* 80032D48 0002FC88 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 80032D4C 0002FC8C 48 32 F4 DD */ bl _restgpr_29
|
||||
/* 80032D50 0002FC90 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80032D54 0002FC94 7C 08 03 A6 */ mtlr r0
|
||||
/* 80032D58 0002FC98 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 80032D5C 0002FC9C 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,17 @@
|
||||
/* 80032D1C 0002FC5C 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 80032D20 0002FC60 7C 08 02 A6 */ mflr r0
|
||||
/* 80032D24 0002FC64 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 80032D28 0002FC68 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 80032D2C 0002FC6C 48 32 F4 B1 */ bl _savegpr_29
|
||||
/* 80032D30 0002FC70 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80032D34 0002FC74 7C BE 2B 78 */ mr r30, r5
|
||||
/* 80032D38 0002FC78 7C DF 33 78 */ mr r31, r6
|
||||
/* 80032D3C 0002FC7C 48 33 5D F1 */ bl strcpy
|
||||
/* 80032D40 0002FC80 9B DD 00 09 */ stb r30, 9(r29)
|
||||
/* 80032D44 0002FC84 9B FD 00 08 */ stb r31, 8(r29)
|
||||
/* 80032D48 0002FC88 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 80032D4C 0002FC8C 48 32 F4 DD */ bl _restgpr_29
|
||||
/* 80032D50 0002FC90 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80032D54 0002FC94 7C 08 03 A6 */ mtlr r0
|
||||
/* 80032D58 0002FC98 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 80032D5C 0002FC9C 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,10 @@
|
||||
/* 80034B98 00031AD8 7C 80 2E 70 */ srawi r0, r4, 5
|
||||
/* 80034B9C 00031ADC 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 80034BA0 00031AE0 7C C3 02 14 */ add r6, r3, r0
|
||||
/* 80034BA4 00031AE4 80 A6 00 04 */ lwz r5, 4(r6)
|
||||
/* 80034BA8 00031AE8 38 60 00 01 */ li r3, 1
|
||||
/* 80034BAC 00031AEC 54 80 06 FE */ clrlwi r0, r4, 0x1b
|
||||
/* 80034BB0 00031AF0 7C 60 00 30 */ slw r0, r3, r0
|
||||
/* 80034BB4 00031AF4 7C A0 03 78 */ or r0, r5, r0
|
||||
/* 80034BB8 00031AF8 90 06 00 04 */ stw r0, 4(r6)
|
||||
/* 80034BBC 00031AFC 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,10 @@
|
||||
/* 80034BC0 00031B00 7C 80 2E 70 */ srawi r0, r4, 5
|
||||
/* 80034BC4 00031B04 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 80034BC8 00031B08 7C C3 02 14 */ add r6, r3, r0
|
||||
/* 80034BCC 00031B0C 80 A6 00 04 */ lwz r5, 4(r6)
|
||||
/* 80034BD0 00031B10 38 60 00 01 */ li r3, 1
|
||||
/* 80034BD4 00031B14 54 80 06 FE */ clrlwi r0, r4, 0x1b
|
||||
/* 80034BD8 00031B18 7C 60 00 30 */ slw r0, r3, r0
|
||||
/* 80034BDC 00031B1C 7C A0 00 78 */ andc r0, r5, r0
|
||||
/* 80034BE0 00031B20 90 06 00 04 */ stw r0, 4(r6)
|
||||
/* 80034BE4 00031B24 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,11 @@
|
||||
/* 80034BE8 00031B28 7C 80 2E 70 */ srawi r0, r4, 5
|
||||
/* 80034BEC 00031B2C 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 80034BF0 00031B30 7C 63 02 14 */ add r3, r3, r0
|
||||
/* 80034BF4 00031B34 80 A3 00 04 */ lwz r5, 4(r3)
|
||||
/* 80034BF8 00031B38 38 60 00 01 */ li r3, 1
|
||||
/* 80034BFC 00031B3C 54 80 06 FE */ clrlwi r0, r4, 0x1b
|
||||
/* 80034C00 00031B40 7C 60 00 30 */ slw r0, r3, r0
|
||||
/* 80034C04 00031B44 7C A3 00 38 */ and r3, r5, r0
|
||||
/* 80034C08 00031B48 30 03 FF FF */ addic r0, r3, -1
|
||||
/* 80034C0C 00031B4C 7C 60 19 10 */ subfe r3, r0, r3
|
||||
/* 80034C10 00031B50 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,14 @@
|
||||
/* 80034C14 00031B54 38 A0 00 01 */ li r5, 1
|
||||
/* 80034C18 00031B58 54 80 06 FE */ clrlwi r0, r4, 0x1b
|
||||
/* 80034C1C 00031B5C 7C A5 00 30 */ slw r5, r5, r0
|
||||
/* 80034C20 00031B60 7C 80 2E 70 */ srawi r0, r4, 5
|
||||
/* 80034C24 00031B64 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 80034C28 00031B68 7C 63 02 14 */ add r3, r3, r0
|
||||
/* 80034C2C 00031B6C 80 03 00 04 */ lwz r0, 4(r3)
|
||||
/* 80034C30 00031B70 7C 00 2A 78 */ xor r0, r0, r5
|
||||
/* 80034C34 00031B74 90 03 00 04 */ stw r0, 4(r3)
|
||||
/* 80034C38 00031B78 80 03 00 04 */ lwz r0, 4(r3)
|
||||
/* 80034C3C 00031B7C 7C 03 28 38 */ and r3, r0, r5
|
||||
/* 80034C40 00031B80 30 03 FF FF */ addic r0, r3, -1
|
||||
/* 80034C44 00031B84 7C 60 19 10 */ subfe r3, r0, r3
|
||||
/* 80034C48 00031B88 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,10 @@
|
||||
/* 80034C4C 00031B8C 7C 80 2E 70 */ srawi r0, r4, 5
|
||||
/* 80034C50 00031B90 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 80034C54 00031B94 7C C3 02 14 */ add r6, r3, r0
|
||||
/* 80034C58 00031B98 80 A6 00 0C */ lwz r5, 0xc(r6)
|
||||
/* 80034C5C 00031B9C 38 60 00 01 */ li r3, 1
|
||||
/* 80034C60 00031BA0 54 80 06 FE */ clrlwi r0, r4, 0x1b
|
||||
/* 80034C64 00031BA4 7C 60 00 30 */ slw r0, r3, r0
|
||||
/* 80034C68 00031BA8 7C A0 03 78 */ or r0, r5, r0
|
||||
/* 80034C6C 00031BAC 90 06 00 0C */ stw r0, 0xc(r6)
|
||||
/* 80034C70 00031BB0 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,11 @@
|
||||
/* 80034C74 00031BB4 7C 80 2E 70 */ srawi r0, r4, 5
|
||||
/* 80034C78 00031BB8 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 80034C7C 00031BBC 7C 63 02 14 */ add r3, r3, r0
|
||||
/* 80034C80 00031BC0 80 A3 00 0C */ lwz r5, 0xc(r3)
|
||||
/* 80034C84 00031BC4 38 60 00 01 */ li r3, 1
|
||||
/* 80034C88 00031BC8 54 80 06 FE */ clrlwi r0, r4, 0x1b
|
||||
/* 80034C8C 00031BCC 7C 60 00 30 */ slw r0, r3, r0
|
||||
/* 80034C90 00031BD0 7C A3 00 38 */ and r3, r5, r0
|
||||
/* 80034C94 00031BD4 30 03 FF FF */ addic r0, r3, -1
|
||||
/* 80034C98 00031BD8 7C 60 19 10 */ subfe r3, r0, r3
|
||||
/* 80034C9C 00031BDC 4E 80 00 20 */ blr
|
||||
@@ -0,0 +1,10 @@
|
||||
/* 80034D04 00031C44 7C 80 26 70 */ srawi r0, r4, 4
|
||||
/* 80034D08 00031C48 54 07 08 3C */ slwi r7, r0, 1
|
||||
/* 80034D0C 00031C4C 7C C3 3A 2E */ lhzx r6, r3, r7
|
||||
/* 80034D10 00031C50 38 A0 00 01 */ li r5, 1
|
||||
/* 80034D14 00031C54 54 80 07 3E */ clrlwi r0, r4, 0x1c
|
||||
/* 80034D18 00031C58 7C A0 00 30 */ slw r0, r5, r0
|
||||
/* 80034D1C 00031C5C 54 00 04 3E */ clrlwi r0, r0, 0x10
|
||||
/* 80034D20 00031C60 7C C0 03 78 */ or r0, r6, r0
|
||||
/* 80034D24 00031C64 7C 03 3B 2E */ sthx r0, r3, r7
|
||||
/* 80034D28 00031C68 4E 80 00 20 */ blr
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user