This commit is contained in:
Pheenoh
2021-01-10 01:24:52 -05:00
400 changed files with 2912 additions and 4108 deletions
+27 -24
View File
@@ -1,15 +1,12 @@
#ifndef __JKRARAM_H__
#define __JKRARAM_H__
#include "JSystem/JKernel/JKRAramHeap/JKRAramHeap.h"
#include "JSystem/JKernel/JKRDvdRipper/JKRDvdRipper.h"
#include "JSystem/JKernel/JKRThread/JKRThread.h"
#include "dolphin/types.h"
// JKRExpandSwitch
#include "JSystem/JKernel/JKRDvdRipper/JKRDvdRipper.h"
#include "global.h"
#include "JSystem/JKernel/JKRAramHeap/JKRAramHeap.h"
class JKRHeap;
class JKRAramBlock;
class JKRAram : public JKRThread {
@@ -20,30 +17,33 @@ private:
/* vt[03] */ void* run(void); /* override */
public:
void* getAudioMemory() { return this->mAudioMemoryPtr; }
u32 getAudioMemSize() { return this->mAudioMemorySize; }
u32 getAudioMemory() const { return mAudioMemoryPtr; }
u32 getAudioMemSize() const { return mAudioMemorySize; }
u32 getGraphMemory() const { return mGraphMemoryPtr; }
u32 getGraphMemSize() const { return mGraphMemorySize; }
private:
void* mAudioMemoryPtr;
u32 mAudioMemorySize;
void* mGraphMemoryPtr;
u32 mGraphMemorySize;
void* mAramMemoryPtr;
u32 mAramMemorySize;
JKRAramHeap* mAramHeap;
u32 field_0x9c;
u32 field_0xa0;
/* 0x00 */ // vtable
/* 0x04 */ // JKRThread
/* 0x7C */ u32 mAudioMemoryPtr;
/* 0x80 */ u32 mAudioMemorySize;
/* 0x84 */ u32 mGraphMemoryPtr;
/* 0x88 */ u32 mGraphMemorySize;
/* 0x8C */ u32 mAramMemoryPtr;
/* 0x90 */ u32 mAramMemorySize;
/* 0x94 */ JKRAramHeap* mAramHeap;
/* 0x98 */ u32 mStackArray[3];
public:
static void create(u32, u32, long, long, long);
static JKRAram* create(u32, u32, long, long, long);
static void checkOkAddress(u8*, u32, JKRAramBlock*, u32);
static void changeGroupIdIfNeed(u8*, int);
static void mainRamToAram(u8*, u32, u32, JKRExpandSwitch, u32, JKRHeap*, int, u32*);
static void aramToMainRam(u32, u8*, u32, JKRExpandSwitch, u32, JKRHeap*, int, u32*);
static JKRAram* getManager() { return lbl_804513C8; }
static JKRAram* getManager() { return sAramObject; }
static JKRAramHeap* getAramHeap() { return getManager()->mAramHeap; }
static JSUList<JKRAMCommand>& getCommandList() { return sAramCommandList; }
static u8 decideAramGroupId(int groupId) {
JKRAramHeap* heap;
@@ -56,14 +56,17 @@ public:
return (u8)groupId;
}
static u32 getSZSBufferSize() { return lbl_804508B8; }
static u32 getSZSBufferSize() { return sSZSBufferSize; }
static void setSZSBufferSize(u32 size) { sSZSBufferSize = size; }
void setSZSBufferSize(u32 size) { lbl_804508B8 = size; }
private:
static JKRAram* sAramObject;
static u32 sSZSBufferSize;
static OSMessage sMessageBuffer[4];
static OSMessageQueue sMessageQueue;
static JSUList<JKRAMCommand> sAramCommandList;
};
void JKRDecompressFromAramToMainRam(u32, void*, u32, u32, u32, u32*);
static void decompSZS_subroutine(u8*, u8*);
static void firstSrcData(void);
static void nextSrcData(u8*);
#endif
@@ -10,11 +10,11 @@
/* 802D1FC0 002CEF00 7C BD 2B 78 */ mr r29, r5
/* 802D1FC4 002CEF04 7C DE 33 78 */ mr r30, r6
/* 802D1FC8 002CEF08 7C FF 3B 78 */ mr r31, r7
/* 802D1FCC 002CEF0C 80 0D 8E 48 */ lwz r0, lbl_804513C8-_SDA_BASE_(r13)
/* 802D1FCC 002CEF0C 80 0D 8E 48 */ lwz r0, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D1FD0 002CEF10 28 00 00 00 */ cmplwi r0, 0
/* 802D1FD4 002CEF14 40 82 00 34 */ bne lbl_802D2008
/* 802D1FD8 002CEF18 38 60 00 A4 */ li r3, 0xa4
/* 802D1FDC 002CEF1C 80 8D 8D F0 */ lwz r4, lbl_80451370-_SDA_BASE_(r13)
/* 802D1FDC 002CEF1C 80 8D 8D F0 */ lwz r4, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D1FE0 002CEF20 38 A0 00 00 */ li r5, 0
/* 802D1FE4 002CEF24 4B FF CC B5 */ bl __nw__FUlP7JKRHeapi
/* 802D1FE8 002CEF28 7C 60 1B 79 */ or. r0, r3, r3
@@ -25,16 +25,16 @@
/* 802D1FFC 002CEF3C 48 00 00 45 */ bl __ct__7JKRAramFUlUll
/* 802D2000 002CEF40 7C 60 1B 78 */ mr r0, r3
lbl_802D2004:
/* 802D2004 002CEF44 90 0D 8E 48 */ stw r0, lbl_804513C8-_SDA_BASE_(r13)
/* 802D2004 002CEF44 90 0D 8E 48 */ stw r0, sAramObject__7JKRAram-_SDA_BASE_(r13)
lbl_802D2008:
/* 802D2008 002CEF48 7F A3 EB 78 */ mr r3, r29
/* 802D200C 002CEF4C 48 00 1B 3D */ bl create__13JKRAramStreamFl
/* 802D2010 002CEF50 7F C3 F3 78 */ mr r3, r30
/* 802D2014 002CEF54 48 00 96 6D */ bl create__9JKRDecompFl
/* 802D2018 002CEF58 80 6D 8E 48 */ lwz r3, lbl_804513C8-_SDA_BASE_(r13)
/* 802D2018 002CEF58 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D201C 002CEF5C 80 63 00 2C */ lwz r3, 0x2c(r3)
/* 802D2020 002CEF60 48 06 F7 95 */ bl OSResumeThread
/* 802D2024 002CEF64 80 6D 8E 48 */ lwz r3, lbl_804513C8-_SDA_BASE_(r13)
/* 802D2024 002CEF64 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D2028 002CEF68 39 61 00 20 */ addi r11, r1, 0x20
/* 802D202C 002CEF6C 48 09 01 F5 */ bl _restgpr_27
/* 802D2030 002CEF70 80 01 00 24 */ lwz r0, 0x24(r1)
@@ -54,7 +54,7 @@ lbl_802D20FC:
/* 802D2100 002CF040 90 1C 00 8C */ stw r0, 0x8c(r28)
lbl_802D2104:
/* 802D2104 002CF044 38 60 00 44 */ li r3, 0x44
/* 802D2108 002CF048 80 8D 8D F0 */ lwz r4, lbl_80451370-_SDA_BASE_(r13)
/* 802D2108 002CF048 80 8D 8D F0 */ lwz r4, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D210C 002CF04C 38 A0 00 00 */ li r5, 0
/* 802D2110 002CF050 4B FF CB 89 */ bl __nw__FUlP7JKRHeapi
/* 802D2114 002CF054 7C 60 1B 79 */ or. r0, r3, r3
@@ -12,7 +12,7 @@
/* 802D2170 002CF0B0 38 03 C1 58 */ addi r0, r3, lbl_803CC158@l
/* 802D2174 002CF0B4 90 1E 00 00 */ stw r0, 0(r30)
/* 802D2178 002CF0B8 38 00 00 00 */ li r0, 0
/* 802D217C 002CF0BC 90 0D 8E 48 */ stw r0, lbl_804513C8-_SDA_BASE_(r13)
/* 802D217C 002CF0BC 90 0D 8E 48 */ stw r0, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D2180 002CF0C0 80 7E 00 94 */ lwz r3, 0x94(r30)
/* 802D2184 002CF0C4 28 03 00 00 */ cmplwi r3, 0
/* 802D2188 002CF0C8 41 82 00 1C */ beq lbl_802D21A4
@@ -5,14 +5,14 @@
/* 802D21E4 002CF124 90 01 00 24 */ stw r0, 0x24(r1)
/* 802D21E8 002CF128 39 61 00 20 */ addi r11, r1, 0x20
/* 802D21EC 002CF12C 48 08 FF F1 */ bl _savegpr_29
/* 802D21F0 002CF130 3C 60 80 3D */ lis r3, lbl_803CC138@ha
/* 802D21F4 002CF134 38 63 C1 38 */ addi r3, r3, lbl_803CC138@l
/* 802D21F8 002CF138 3C 80 80 3D */ lis r4, lbl_803CC128@ha
/* 802D21FC 002CF13C 38 84 C1 28 */ addi r4, r4, lbl_803CC128@l
/* 802D21F0 002CF130 3C 60 80 3D */ lis r3, sMessageQueue__7JKRAram@ha
/* 802D21F4 002CF134 38 63 C1 38 */ addi r3, r3, sMessageQueue__7JKRAram@l
/* 802D21F8 002CF138 3C 80 80 3D */ lis r4, sMessageBuffer__7JKRAram@ha
/* 802D21FC 002CF13C 38 84 C1 28 */ addi r4, r4, sMessageBuffer__7JKRAram@l
/* 802D2200 002CF140 38 A0 00 04 */ li r5, 4
/* 802D2204 002CF144 48 06 C7 91 */ bl OSInitMessageQueue
/* 802D2208 002CF148 3C 60 80 3D */ lis r3, lbl_803CC138@ha
/* 802D220C 002CF14C 3B E3 C1 38 */ addi r31, r3, lbl_803CC138@l
/* 802D2208 002CF148 3C 60 80 3D */ lis r3, sMessageQueue__7JKRAram@ha
/* 802D220C 002CF14C 3B E3 C1 38 */ addi r31, r3, sMessageQueue__7JKRAram@l
lbl_802D2210:
/* 802D2210 002CF150 7F E3 FB 78 */ mr r3, r31
/* 802D2214 002CF154 38 81 00 08 */ addi r4, r1, 8
@@ -7,7 +7,7 @@
/* 802D22EC 002CF22C 93 C1 00 08 */ stw r30, 8(r1)
/* 802D22F0 002CF230 7C 7E 1B 78 */ mr r30, r3
/* 802D22F4 002CF234 7C 9F 23 78 */ mr r31, r4
/* 802D22F8 002CF238 80 6D 8D F4 */ lwz r3, lbl_80451374-_SDA_BASE_(r13)
/* 802D22F8 002CF238 80 6D 8D F4 */ lwz r3, sCurrentHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D22FC 002CF23C 81 83 00 00 */ lwz r12, 0(r3)
/* 802D2300 002CF240 81 8C 00 10 */ lwz r12, 0x10(r12)
/* 802D2304 002CF244 7D 89 03 A6 */ mtctr r12
@@ -48,7 +48,7 @@ lbl_802D23DC:
lbl_802D23E4:
/* 802D23E4 002CF324 28 18 00 00 */ cmplwi r24, 0
/* 802D23E8 002CF328 40 82 00 50 */ bne lbl_802D2438
/* 802D23EC 002CF32C 80 6D 8E 48 */ lwz r3, lbl_804513C8-_SDA_BASE_(r13)
/* 802D23EC 002CF32C 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D23F0 002CF330 80 63 00 94 */ lwz r3, 0x94(r3)
/* 802D23F4 002CF334 7F 24 CB 78 */ mr r4, r25
/* 802D23F8 002CF338 38 A0 00 00 */ li r5, 0
@@ -61,7 +61,7 @@ lbl_802D23E4:
lbl_802D2414:
/* 802D2414 002CF354 2C 1B 00 00 */ cmpwi r27, 0
/* 802D2418 002CF358 40 80 00 14 */ bge lbl_802D242C
/* 802D241C 002CF35C 80 8D 8E 48 */ lwz r4, lbl_804513C8-_SDA_BASE_(r13)
/* 802D241C 002CF35C 80 8D 8E 48 */ lwz r4, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D2420 002CF360 80 84 00 94 */ lwz r4, 0x94(r4)
/* 802D2424 002CF364 88 04 00 40 */ lbz r0, 0x40(r4)
/* 802D2428 002CF368 48 00 00 08 */ b lbl_802D2430
@@ -136,7 +136,7 @@ lbl_802D24FC:
lbl_802D2510:
/* 802D2510 002CF450 28 18 00 00 */ cmplwi r24, 0
/* 802D2514 002CF454 40 82 00 50 */ bne lbl_802D2564
/* 802D2518 002CF458 80 6D 8E 48 */ lwz r3, lbl_804513C8-_SDA_BASE_(r13)
/* 802D2518 002CF458 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D251C 002CF45C 80 63 00 94 */ lwz r3, 0x94(r3)
/* 802D2520 002CF460 7F E4 FB 78 */ mr r4, r31
/* 802D2524 002CF464 38 A0 00 00 */ li r5, 0
@@ -144,7 +144,7 @@ lbl_802D2510:
/* 802D252C 002CF46C 7C 7D 1B 78 */ mr r29, r3
/* 802D2530 002CF470 2C 1B 00 00 */ cmpwi r27, 0
/* 802D2534 002CF474 40 80 00 14 */ bge lbl_802D2548
/* 802D2538 002CF478 80 8D 8E 48 */ lwz r4, lbl_804513C8-_SDA_BASE_(r13)
/* 802D2538 002CF478 80 8D 8E 48 */ lwz r4, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D253C 002CF47C 80 84 00 94 */ lwz r4, 0x94(r4)
/* 802D2540 002CF480 88 04 00 40 */ lbz r0, 0x40(r4)
/* 802D2544 002CF484 48 00 00 08 */ b lbl_802D254C
@@ -27,66 +27,66 @@ lbl_802D2884:
/* 802D288C 002CF7CC 3C 60 80 43 */ lis r3, lbl_804342E8@ha
/* 802D2890 002CF7D0 38 63 42 E8 */ addi r3, r3, lbl_804342E8@l
/* 802D2894 002CF7D4 48 06 C7 AD */ bl OSLockMutex
/* 802D2898 002CF7D8 83 2D 83 38 */ lwz r25, lbl_804508B8-_SDA_BASE_(r13)
/* 802D289C 002CF7DC 80 6D 8D F0 */ lwz r3, lbl_80451370-_SDA_BASE_(r13)
/* 802D2898 002CF7D8 83 2D 83 38 */ lwz r25, sSZSBufferSize__7JKRAram-_SDA_BASE_(r13)
/* 802D289C 002CF7DC 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D28A0 002CF7E0 7F 24 CB 78 */ mr r4, r25
/* 802D28A4 002CF7E4 38 A0 00 20 */ li r5, 0x20
/* 802D28A8 002CF7E8 4B FF BC 2D */ bl alloc__7JKRHeapFUli
/* 802D28AC 002CF7EC 90 6D 8E 4C */ stw r3, lbl_804513CC-_SDA_BASE_(r13)
/* 802D28AC 002CF7EC 90 6D 8E 4C */ stw r3, JKRAram__szpBuf-_SDA_BASE_(r13)
/* 802D28B0 002CF7F0 7C 03 CA 14 */ add r0, r3, r25
/* 802D28B4 002CF7F4 90 0D 8E 50 */ stw r0, lbl_804513D0-_SDA_BASE_(r13)
/* 802D28B4 002CF7F4 90 0D 8E 50 */ stw r0, JKRAram__szpEnd-_SDA_BASE_(r13)
/* 802D28B8 002CF7F8 28 1E 00 00 */ cmplwi r30, 0
/* 802D28BC 002CF7FC 41 82 00 28 */ beq lbl_802D28E4
/* 802D28C0 002CF800 80 6D 8D F0 */ lwz r3, lbl_80451370-_SDA_BASE_(r13)
/* 802D28C0 002CF800 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D28C4 002CF804 38 80 11 20 */ li r4, 0x1120
/* 802D28C8 002CF808 38 A0 00 00 */ li r5, 0
/* 802D28CC 002CF80C 4B FF BC 09 */ bl alloc__7JKRHeapFUli
/* 802D28D0 002CF810 90 6D 8E 54 */ stw r3, lbl_804513D4-_SDA_BASE_(r13)
/* 802D28D0 002CF810 90 6D 8E 54 */ stw r3, JKRAram__refBuf-_SDA_BASE_(r13)
/* 802D28D4 002CF814 38 03 11 20 */ addi r0, r3, 0x1120
/* 802D28D8 002CF818 90 0D 8E 58 */ stw r0, lbl_804513D8-_SDA_BASE_(r13)
/* 802D28DC 002CF81C 90 6D 8E 5C */ stw r3, lbl_804513DC-_SDA_BASE_(r13)
/* 802D28D8 002CF818 90 0D 8E 58 */ stw r0, JKRAram__refEnd-_SDA_BASE_(r13)
/* 802D28DC 002CF81C 90 6D 8E 5C */ stw r3, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D28E0 002CF820 48 00 00 0C */ b lbl_802D28EC
lbl_802D28E4:
/* 802D28E4 002CF824 38 00 00 00 */ li r0, 0
/* 802D28E8 002CF828 90 0D 8E 54 */ stw r0, lbl_804513D4-_SDA_BASE_(r13)
/* 802D28E8 002CF828 90 0D 8E 54 */ stw r0, JKRAram__refBuf-_SDA_BASE_(r13)
lbl_802D28EC:
/* 802D28EC 002CF82C 93 4D 8E 6C */ stw r26, lbl_804513EC-_SDA_BASE_(r13)
/* 802D28EC 002CF82C 93 4D 8E 6C */ stw r26, JKRAram__srcAddress-_SDA_BASE_(r13)
/* 802D28F0 002CF830 38 00 00 00 */ li r0, 0
/* 802D28F4 002CF834 90 0D 8E 60 */ stw r0, lbl_804513E0-_SDA_BASE_(r13)
/* 802D28F4 002CF834 90 0D 8E 60 */ stw r0, JKRAram__srcOffset-_SDA_BASE_(r13)
/* 802D28F8 002CF838 28 1C 00 00 */ cmplwi r28, 0
/* 802D28FC 002CF83C 38 00 FF FF */ li r0, -1
/* 802D2900 002CF840 41 82 00 08 */ beq lbl_802D2908
/* 802D2904 002CF844 7F 80 E3 78 */ mr r0, r28
lbl_802D2908:
/* 802D2908 002CF848 90 0D 8E 64 */ stw r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D290C 002CF84C 93 CD 8E 70 */ stw r30, lbl_804513F0-_SDA_BASE_(r13)
/* 802D2908 002CF848 90 0D 8E 64 */ stw r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D290C 002CF84C 93 CD 8E 70 */ stw r30, JKRAram__fileOffset-_SDA_BASE_(r13)
/* 802D2910 002CF850 38 00 00 00 */ li r0, 0
/* 802D2914 002CF854 90 0D 8E 74 */ stw r0, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2918 002CF858 93 AD 8E 78 */ stw r29, lbl_804513F8-_SDA_BASE_(r13)
/* 802D2914 002CF854 90 0D 8E 74 */ stw r0, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2918 002CF858 93 AD 8E 78 */ stw r29, JKRAram__maxDest-_SDA_BASE_(r13)
/* 802D291C 002CF85C 28 1F 00 00 */ cmplwi r31, 0
/* 802D2920 002CF860 41 82 00 0C */ beq lbl_802D292C
/* 802D2924 002CF864 7F E3 FB 78 */ mr r3, r31
/* 802D2928 002CF868 48 00 00 08 */ b lbl_802D2930
lbl_802D292C:
/* 802D292C 002CF86C 38 6D 8E 84 */ addi r3, r13, 0x80451404-0x80458580 /* lbl_80451404-_SDA_BASE_ */
/* 802D292C 002CF86C 38 6D 8E 84 */ addi r3, r13, 0x80451404-0x80458580 /* JKRAram__tsArea-_SDA_BASE_ */
lbl_802D2930:
/* 802D2930 002CF870 90 6D 8E 80 */ stw r3, lbl_80451400-_SDA_BASE_(r13)
/* 802D2930 002CF870 90 6D 8E 80 */ stw r3, JKRAram__tsPtr-_SDA_BASE_(r13)
/* 802D2934 002CF874 38 00 00 00 */ li r0, 0
/* 802D2938 002CF878 90 03 00 00 */ stw r0, 0(r3)
/* 802D293C 002CF87C 48 00 03 05 */ bl firstSrcData__Fv
/* 802D2940 002CF880 7F 64 DB 78 */ mr r4, r27
/* 802D2944 002CF884 48 00 00 5D */ bl decompSZS_subroutine__FPUcPUc
/* 802D2948 002CF888 80 6D 8E 4C */ lwz r3, lbl_804513CC-_SDA_BASE_(r13)
/* 802D2948 002CF888 80 6D 8E 4C */ lwz r3, JKRAram__szpBuf-_SDA_BASE_(r13)
/* 802D294C 002CF88C 38 80 00 00 */ li r4, 0
/* 802D2950 002CF890 4B FF BB B1 */ bl free__7JKRHeapFPvP7JKRHeap
/* 802D2954 002CF894 80 6D 8E 54 */ lwz r3, lbl_804513D4-_SDA_BASE_(r13)
/* 802D2954 002CF894 80 6D 8E 54 */ lwz r3, JKRAram__refBuf-_SDA_BASE_(r13)
/* 802D2958 002CF898 28 03 00 00 */ cmplwi r3, 0
/* 802D295C 002CF89C 41 82 00 0C */ beq lbl_802D2968
/* 802D2960 002CF8A0 38 80 00 00 */ li r4, 0
/* 802D2964 002CF8A4 4B FF BB 9D */ bl free__7JKRHeapFPvP7JKRHeap
lbl_802D2968:
/* 802D2968 002CF8A8 7F 63 DB 78 */ mr r3, r27
/* 802D296C 002CF8AC 80 8D 8E 80 */ lwz r4, lbl_80451400-_SDA_BASE_(r13)
/* 802D296C 002CF8AC 80 8D 8E 80 */ lwz r4, JKRAram__tsPtr-_SDA_BASE_(r13)
/* 802D2970 002CF8B0 80 84 00 00 */ lwz r4, 0(r4)
/* 802D2974 002CF8B4 48 06 8C C5 */ bl DCStoreRangeNoSync
/* 802D2978 002CF8B8 3C 60 80 43 */ lis r3, lbl_804342E8@ha
@@ -25,11 +25,11 @@ lbl_802D29F4:
/* 802D29F4 002CF934 38 60 FF FF */ li r3, -1
/* 802D29F8 002CF938 48 00 02 30 */ b lbl_802D2C28
lbl_802D29FC:
/* 802D29FC 002CF93C 80 CD 8E 70 */ lwz r6, lbl_804513F0-_SDA_BASE_(r13)
/* 802D29FC 002CF93C 80 CD 8E 70 */ lwz r6, JKRAram__fileOffset-_SDA_BASE_(r13)
/* 802D2A00 002CF940 80 A3 00 04 */ lwz r5, 4(r3)
/* 802D2A04 002CF944 7C A6 28 50 */ subf r5, r6, r5
/* 802D2A08 002CF948 7F FD 2A 14 */ add r31, r29, r5
/* 802D2A0C 002CF94C 80 AD 8E 78 */ lwz r5, lbl_804513F8-_SDA_BASE_(r13)
/* 802D2A0C 002CF94C 80 AD 8E 78 */ lwz r5, JKRAram__maxDest-_SDA_BASE_(r13)
/* 802D2A10 002CF950 7C BD 2A 14 */ add r5, r29, r5
/* 802D2A14 002CF954 7C 1F 28 40 */ cmplw r31, r5
/* 802D2A18 002CF958 40 81 00 08 */ ble lbl_802D2A20
@@ -39,10 +39,10 @@ lbl_802D2A20:
lbl_802D2A24:
/* 802D2A24 002CF964 2C 04 00 00 */ cmpwi r4, 0
/* 802D2A28 002CF968 40 82 00 2C */ bne lbl_802D2A54
/* 802D2A2C 002CF96C 80 0D 8E 68 */ lwz r0, lbl_804513E8-_SDA_BASE_(r13)
/* 802D2A2C 002CF96C 80 0D 8E 68 */ lwz r0, JKRAram__srcLimit-_SDA_BASE_(r13)
/* 802D2A30 002CF970 7C 03 00 40 */ cmplw r3, r0
/* 802D2A34 002CF974 40 81 00 14 */ ble lbl_802D2A48
/* 802D2A38 002CF978 80 0D 8E 64 */ lwz r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D2A38 002CF978 80 0D 8E 64 */ lwz r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D2A3C 002CF97C 28 00 00 00 */ cmplwi r0, 0
/* 802D2A40 002CF980 41 82 00 08 */ beq lbl_802D2A48
/* 802D2A44 002CF984 48 00 02 A1 */ bl nextSrcData__FPUc
@@ -53,10 +53,10 @@ lbl_802D2A48:
lbl_802D2A54:
/* 802D2A54 002CF994 54 05 06 31 */ rlwinm. r5, r0, 0, 0x18, 0x18
/* 802D2A58 002CF998 41 82 00 94 */ beq lbl_802D2AEC
/* 802D2A5C 002CF99C 80 CD 8E 70 */ lwz r6, lbl_804513F0-_SDA_BASE_(r13)
/* 802D2A5C 002CF99C 80 CD 8E 70 */ lwz r6, JKRAram__fileOffset-_SDA_BASE_(r13)
/* 802D2A60 002CF9A0 28 06 00 00 */ cmplwi r6, 0
/* 802D2A64 002CF9A4 41 82 00 5C */ beq lbl_802D2AC0
/* 802D2A68 002CF9A8 80 AD 8E 74 */ lwz r5, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2A68 002CF9A8 80 AD 8E 74 */ lwz r5, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2A6C 002CF9AC 7C 05 30 40 */ cmplw r5, r6
/* 802D2A70 002CF9B0 41 80 00 1C */ blt lbl_802D2A8C
/* 802D2A74 002CF9B4 88 A3 00 00 */ lbz r5, 0(r3)
@@ -67,16 +67,16 @@ lbl_802D2A54:
/* 802D2A88 002CF9C8 41 82 01 94 */ beq lbl_802D2C1C
lbl_802D2A8C:
/* 802D2A8C 002CF9CC 88 E3 00 00 */ lbz r7, 0(r3)
/* 802D2A90 002CF9D0 80 CD 8E 5C */ lwz r6, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2A90 002CF9D0 80 CD 8E 5C */ lwz r6, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D2A94 002CF9D4 38 A6 00 01 */ addi r5, r6, 1
/* 802D2A98 002CF9D8 90 AD 8E 5C */ stw r5, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2A98 002CF9D8 90 AD 8E 5C */ stw r5, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D2A9C 002CF9DC 98 E6 00 00 */ stb r7, 0(r6)
/* 802D2AA0 002CF9E0 80 CD 8E 5C */ lwz r6, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2AA4 002CF9E4 80 AD 8E 58 */ lwz r5, lbl_804513D8-_SDA_BASE_(r13)
/* 802D2AA0 002CF9E0 80 CD 8E 5C */ lwz r6, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D2AA4 002CF9E4 80 AD 8E 58 */ lwz r5, JKRAram__refEnd-_SDA_BASE_(r13)
/* 802D2AA8 002CF9E8 7C 06 28 40 */ cmplw r6, r5
/* 802D2AAC 002CF9EC 40 82 00 0C */ bne lbl_802D2AB8
/* 802D2AB0 002CF9F0 80 AD 8E 54 */ lwz r5, lbl_804513D4-_SDA_BASE_(r13)
/* 802D2AB4 002CF9F4 90 AD 8E 5C */ stw r5, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2AB0 002CF9F0 80 AD 8E 54 */ lwz r5, JKRAram__refBuf-_SDA_BASE_(r13)
/* 802D2AB4 002CF9F4 90 AD 8E 5C */ stw r5, JKRAram__refCurrent-_SDA_BASE_(r13)
lbl_802D2AB8:
/* 802D2AB8 002CF9F8 38 63 00 01 */ addi r3, r3, 1
/* 802D2ABC 002CF9FC 48 00 00 20 */ b lbl_802D2ADC
@@ -89,26 +89,26 @@ lbl_802D2AC0:
/* 802D2AD4 002CFA14 3B DE 00 01 */ addi r30, r30, 1
/* 802D2AD8 002CFA18 41 82 01 44 */ beq lbl_802D2C1C
lbl_802D2ADC:
/* 802D2ADC 002CFA1C 80 AD 8E 74 */ lwz r5, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2ADC 002CFA1C 80 AD 8E 74 */ lwz r5, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2AE0 002CFA20 38 A5 00 01 */ addi r5, r5, 1
/* 802D2AE4 002CFA24 90 AD 8E 74 */ stw r5, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2AE4 002CFA24 90 AD 8E 74 */ stw r5, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2AE8 002CFA28 48 00 01 24 */ b lbl_802D2C0C
lbl_802D2AEC:
/* 802D2AEC 002CFA2C 88 C3 00 00 */ lbz r6, 0(r3)
/* 802D2AF0 002CFA30 88 E3 00 01 */ lbz r7, 1(r3)
/* 802D2AF4 002CFA34 50 C7 45 2E */ rlwimi r7, r6, 8, 0x14, 0x17
/* 802D2AF8 002CFA38 7C C5 26 70 */ srawi r5, r6, 4
/* 802D2AFC 002CFA3C 81 0D 8E 70 */ lwz r8, lbl_804513F0-_SDA_BASE_(r13)
/* 802D2AFC 002CFA3C 81 0D 8E 70 */ lwz r8, JKRAram__fileOffset-_SDA_BASE_(r13)
/* 802D2B00 002CFA40 28 08 00 00 */ cmplwi r8, 0
/* 802D2B04 002CFA44 38 63 00 02 */ addi r3, r3, 2
/* 802D2B08 002CFA48 41 82 00 2C */ beq lbl_802D2B34
/* 802D2B0C 002CFA4C 80 CD 8E 5C */ lwz r6, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2B0C 002CFA4C 80 CD 8E 5C */ lwz r6, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D2B10 002CFA50 7C C7 30 50 */ subf r6, r7, r6
/* 802D2B14 002CFA54 39 26 FF FF */ addi r9, r6, -1
/* 802D2B18 002CFA58 80 ED 8E 54 */ lwz r7, lbl_804513D4-_SDA_BASE_(r13)
/* 802D2B18 002CFA58 80 ED 8E 54 */ lwz r7, JKRAram__refBuf-_SDA_BASE_(r13)
/* 802D2B1C 002CFA5C 7C 09 38 40 */ cmplw r9, r7
/* 802D2B20 002CFA60 40 80 00 1C */ bge lbl_802D2B3C
/* 802D2B24 002CFA64 80 CD 8E 58 */ lwz r6, lbl_804513D8-_SDA_BASE_(r13)
/* 802D2B24 002CFA64 80 CD 8E 58 */ lwz r6, JKRAram__refEnd-_SDA_BASE_(r13)
/* 802D2B28 002CFA68 7C C7 30 50 */ subf r6, r7, r6
/* 802D2B2C 002CFA6C 7D 29 32 14 */ add r9, r9, r6
/* 802D2B30 002CFA70 48 00 00 0C */ b lbl_802D2B3C
@@ -128,8 +128,8 @@ lbl_802D2B58:
/* 802D2B58 002CFA98 28 08 00 00 */ cmplwi r8, 0
/* 802D2B5C 002CFA9C 41 82 00 80 */ beq lbl_802D2BDC
lbl_802D2B60:
/* 802D2B60 002CFAA0 80 ED 8E 74 */ lwz r7, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2B64 002CFAA4 80 CD 8E 70 */ lwz r6, lbl_804513F0-_SDA_BASE_(r13)
/* 802D2B60 002CFAA0 80 ED 8E 74 */ lwz r7, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2B64 002CFAA4 80 CD 8E 70 */ lwz r6, JKRAram__fileOffset-_SDA_BASE_(r13)
/* 802D2B68 002CFAA8 7C 07 30 40 */ cmplw r7, r6
/* 802D2B6C 002CFAAC 41 80 00 1C */ blt lbl_802D2B88
/* 802D2B70 002CFAB0 88 C9 00 00 */ lbz r6, 0(r9)
@@ -140,25 +140,25 @@ lbl_802D2B60:
/* 802D2B84 002CFAC4 41 82 00 88 */ beq lbl_802D2C0C
lbl_802D2B88:
/* 802D2B88 002CFAC8 89 09 00 00 */ lbz r8, 0(r9)
/* 802D2B8C 002CFACC 80 ED 8E 5C */ lwz r7, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2B8C 002CFACC 80 ED 8E 5C */ lwz r7, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D2B90 002CFAD0 38 C7 00 01 */ addi r6, r7, 1
/* 802D2B94 002CFAD4 90 CD 8E 5C */ stw r6, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2B94 002CFAD4 90 CD 8E 5C */ stw r6, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D2B98 002CFAD8 99 07 00 00 */ stb r8, 0(r7)
/* 802D2B9C 002CFADC 80 CD 8E 5C */ lwz r6, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2BA0 002CFAE0 80 ED 8E 58 */ lwz r7, lbl_804513D8-_SDA_BASE_(r13)
/* 802D2B9C 002CFADC 80 CD 8E 5C */ lwz r6, JKRAram__refCurrent-_SDA_BASE_(r13)
/* 802D2BA0 002CFAE0 80 ED 8E 58 */ lwz r7, JKRAram__refEnd-_SDA_BASE_(r13)
/* 802D2BA4 002CFAE4 7C 06 38 40 */ cmplw r6, r7
/* 802D2BA8 002CFAE8 40 82 00 0C */ bne lbl_802D2BB4
/* 802D2BAC 002CFAEC 80 CD 8E 54 */ lwz r6, lbl_804513D4-_SDA_BASE_(r13)
/* 802D2BB0 002CFAF0 90 CD 8E 5C */ stw r6, lbl_804513DC-_SDA_BASE_(r13)
/* 802D2BAC 002CFAEC 80 CD 8E 54 */ lwz r6, JKRAram__refBuf-_SDA_BASE_(r13)
/* 802D2BB0 002CFAF0 90 CD 8E 5C */ stw r6, JKRAram__refCurrent-_SDA_BASE_(r13)
lbl_802D2BB4:
/* 802D2BB4 002CFAF4 39 29 00 01 */ addi r9, r9, 1
/* 802D2BB8 002CFAF8 7C 09 38 40 */ cmplw r9, r7
/* 802D2BBC 002CFAFC 40 82 00 08 */ bne lbl_802D2BC4
/* 802D2BC0 002CFB00 81 2D 8E 54 */ lwz r9, lbl_804513D4-_SDA_BASE_(r13)
/* 802D2BC0 002CFB00 81 2D 8E 54 */ lwz r9, JKRAram__refBuf-_SDA_BASE_(r13)
lbl_802D2BC4:
/* 802D2BC4 002CFB04 80 CD 8E 74 */ lwz r6, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2BC4 002CFB04 80 CD 8E 74 */ lwz r6, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2BC8 002CFB08 38 C6 00 01 */ addi r6, r6, 1
/* 802D2BCC 002CFB0C 90 CD 8E 74 */ stw r6, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2BCC 002CFB0C 90 CD 8E 74 */ stw r6, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2BD0 002CFB10 34 A5 FF FF */ addic. r5, r5, -1
/* 802D2BD4 002CFB14 40 82 FF 8C */ bne lbl_802D2B60
/* 802D2BD8 002CFB18 48 00 00 34 */ b lbl_802D2C0C
@@ -169,9 +169,9 @@ lbl_802D2BDC:
/* 802D2BE8 002CFB28 7C 1D F8 40 */ cmplw r29, r31
/* 802D2BEC 002CFB2C 3B DE 00 01 */ addi r30, r30, 1
/* 802D2BF0 002CFB30 41 82 00 1C */ beq lbl_802D2C0C
/* 802D2BF4 002CFB34 80 CD 8E 74 */ lwz r6, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2BF4 002CFB34 80 CD 8E 74 */ lwz r6, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2BF8 002CFB38 38 C6 00 01 */ addi r6, r6, 1
/* 802D2BFC 002CFB3C 90 CD 8E 74 */ stw r6, lbl_804513F4-_SDA_BASE_(r13)
/* 802D2BFC 002CFB3C 90 CD 8E 74 */ stw r6, JKRAram__readCount-_SDA_BASE_(r13)
/* 802D2C00 002CFB40 34 A5 FF FF */ addic. r5, r5, -1
/* 802D2C04 002CFB44 39 29 00 01 */ addi r9, r9, 1
/* 802D2C08 002CFB48 40 82 FF D4 */ bne lbl_802D2BDC
@@ -181,7 +181,7 @@ lbl_802D2C0C:
/* 802D2C14 002CFB54 38 84 FF FF */ addi r4, r4, -1
/* 802D2C18 002CFB58 41 80 FE 0C */ blt lbl_802D2A24
lbl_802D2C1C:
/* 802D2C1C 002CFB5C 80 6D 8E 80 */ lwz r3, lbl_80451400-_SDA_BASE_(r13)
/* 802D2C1C 002CFB5C 80 6D 8E 80 */ lwz r3, JKRAram__tsPtr-_SDA_BASE_(r13)
/* 802D2C20 002CFB60 93 C3 00 00 */ stw r30, 0(r3)
/* 802D2C24 002CFB64 38 60 00 00 */ li r3, 0
lbl_802D2C28:
@@ -5,36 +5,36 @@
/* 802D2C48 002CFB88 90 01 00 14 */ stw r0, 0x14(r1)
/* 802D2C4C 002CFB8C 93 E1 00 0C */ stw r31, 0xc(r1)
/* 802D2C50 002CFB90 93 C1 00 08 */ stw r30, 8(r1)
/* 802D2C54 002CFB94 80 6D 8E 50 */ lwz r3, lbl_804513D0-_SDA_BASE_(r13)
/* 802D2C54 002CFB94 80 6D 8E 50 */ lwz r3, JKRAram__szpEnd-_SDA_BASE_(r13)
/* 802D2C58 002CFB98 38 03 FF E7 */ addi r0, r3, -25
/* 802D2C5C 002CFB9C 90 0D 8E 68 */ stw r0, lbl_804513E8-_SDA_BASE_(r13)
/* 802D2C60 002CFBA0 80 0D 8E 4C */ lwz r0, lbl_804513CC-_SDA_BASE_(r13)
/* 802D2C5C 002CFB9C 90 0D 8E 68 */ stw r0, JKRAram__srcLimit-_SDA_BASE_(r13)
/* 802D2C60 002CFBA0 80 0D 8E 4C */ lwz r0, JKRAram__szpBuf-_SDA_BASE_(r13)
/* 802D2C64 002CFBA4 7C 1E 03 78 */ mr r30, r0
/* 802D2C68 002CFBA8 7C 60 18 50 */ subf r3, r0, r3
/* 802D2C6C 002CFBAC 80 0D 8E 64 */ lwz r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D2C6C 002CFBAC 80 0D 8E 64 */ lwz r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D2C70 002CFBB0 7C 00 18 40 */ cmplw r0, r3
/* 802D2C74 002CFBB4 7C 7F 1B 78 */ mr r31, r3
/* 802D2C78 002CFBB8 40 80 00 08 */ bge lbl_802D2C80
/* 802D2C7C 002CFBBC 7C 1F 03 78 */ mr r31, r0
lbl_802D2C80:
/* 802D2C80 002CFBC0 38 60 00 01 */ li r3, 1
/* 802D2C84 002CFBC4 80 8D 8E 6C */ lwz r4, lbl_804513EC-_SDA_BASE_(r13)
/* 802D2C88 002CFBC8 80 0D 8E 60 */ lwz r0, lbl_804513E0-_SDA_BASE_(r13)
/* 802D2C84 002CFBC4 80 8D 8E 6C */ lwz r4, JKRAram__srcAddress-_SDA_BASE_(r13)
/* 802D2C88 002CFBC8 80 0D 8E 60 */ lwz r0, JKRAram__srcOffset-_SDA_BASE_(r13)
/* 802D2C8C 002CFBCC 7C 84 02 14 */ add r4, r4, r0
/* 802D2C90 002CFBD0 7F C5 F3 78 */ mr r5, r30
/* 802D2C94 002CFBD4 38 1F 00 1F */ addi r0, r31, 0x1f
/* 802D2C98 002CFBD8 54 06 00 34 */ rlwinm r6, r0, 0, 0, 0x1a
/* 802D2C9C 002CFBDC 38 E0 00 00 */ li r7, 0
/* 802D2CA0 002CFBE0 48 00 0B 99 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D2CA4 002CFBE4 80 0D 8E 60 */ lwz r0, lbl_804513E0-_SDA_BASE_(r13)
/* 802D2CA4 002CFBE4 80 0D 8E 60 */ lwz r0, JKRAram__srcOffset-_SDA_BASE_(r13)
/* 802D2CA8 002CFBE8 7C 00 FA 14 */ add r0, r0, r31
/* 802D2CAC 002CFBEC 90 0D 8E 60 */ stw r0, lbl_804513E0-_SDA_BASE_(r13)
/* 802D2CB0 002CFBF0 80 0D 8E 64 */ lwz r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D2CAC 002CFBEC 90 0D 8E 60 */ stw r0, JKRAram__srcOffset-_SDA_BASE_(r13)
/* 802D2CB0 002CFBF0 80 0D 8E 64 */ lwz r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D2CB4 002CFBF4 7C 1F 00 51 */ subf. r0, r31, r0
/* 802D2CB8 002CFBF8 90 0D 8E 64 */ stw r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D2CB8 002CFBF8 90 0D 8E 64 */ stw r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D2CBC 002CFBFC 40 82 00 0C */ bne lbl_802D2CC8
/* 802D2CC0 002CFC00 7C 1E FA 14 */ add r0, r30, r31
/* 802D2CC4 002CFC04 90 0D 8E 68 */ stw r0, lbl_804513E8-_SDA_BASE_(r13)
/* 802D2CC4 002CFC04 90 0D 8E 68 */ stw r0, JKRAram__srcLimit-_SDA_BASE_(r13)
lbl_802D2CC8:
/* 802D2CC8 002CFC08 7F C3 F3 78 */ mr r3, r30
/* 802D2CCC 002CFC0C 83 E1 00 0C */ lwz r31, 0xc(r1)
@@ -6,46 +6,46 @@
/* 802D2CF0 002CFC30 39 61 00 20 */ addi r11, r1, 0x20
/* 802D2CF4 002CFC34 48 08 F4 E5 */ bl _savegpr_28
/* 802D2CF8 002CFC38 7C 64 1B 78 */ mr r4, r3
/* 802D2CFC 002CFC3C 80 0D 8E 50 */ lwz r0, lbl_804513D0-_SDA_BASE_(r13)
/* 802D2CFC 002CFC3C 80 0D 8E 50 */ lwz r0, JKRAram__szpEnd-_SDA_BASE_(r13)
/* 802D2D00 002CFC40 7F A4 00 50 */ subf r29, r4, r0
/* 802D2D04 002CFC44 57 A5 06 FF */ clrlwi. r5, r29, 0x1b
/* 802D2D08 002CFC48 41 82 00 14 */ beq lbl_802D2D1C
/* 802D2D0C 002CFC4C 80 6D 8E 4C */ lwz r3, lbl_804513CC-_SDA_BASE_(r13)
/* 802D2D0C 002CFC4C 80 6D 8E 4C */ lwz r3, JKRAram__szpBuf-_SDA_BASE_(r13)
/* 802D2D10 002CFC50 38 03 00 20 */ addi r0, r3, 0x20
/* 802D2D14 002CFC54 7F C5 00 50 */ subf r30, r5, r0
/* 802D2D18 002CFC58 48 00 00 08 */ b lbl_802D2D20
lbl_802D2D1C:
/* 802D2D1C 002CFC5C 83 CD 8E 4C */ lwz r30, lbl_804513CC-_SDA_BASE_(r13)
/* 802D2D1C 002CFC5C 83 CD 8E 4C */ lwz r30, JKRAram__szpBuf-_SDA_BASE_(r13)
lbl_802D2D20:
/* 802D2D20 002CFC60 7F C3 F3 78 */ mr r3, r30
/* 802D2D24 002CFC64 7F A5 EB 78 */ mr r5, r29
/* 802D2D28 002CFC68 4B D3 08 19 */ bl memcpy
/* 802D2D2C 002CFC6C 7F FE EA 14 */ add r31, r30, r29
/* 802D2D30 002CFC70 80 0D 8E 50 */ lwz r0, lbl_804513D0-_SDA_BASE_(r13)
/* 802D2D30 002CFC70 80 0D 8E 50 */ lwz r0, JKRAram__szpEnd-_SDA_BASE_(r13)
/* 802D2D34 002CFC74 7F 9F 00 50 */ subf r28, r31, r0
/* 802D2D38 002CFC78 80 0D 8E 64 */ lwz r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D2D38 002CFC78 80 0D 8E 64 */ lwz r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D2D3C 002CFC7C 7C 1C 00 40 */ cmplw r28, r0
/* 802D2D40 002CFC80 40 81 00 08 */ ble lbl_802D2D48
/* 802D2D44 002CFC84 7C 1C 03 78 */ mr r28, r0
lbl_802D2D48:
/* 802D2D48 002CFC88 38 60 00 01 */ li r3, 1
/* 802D2D4C 002CFC8C 80 8D 8E 6C */ lwz r4, lbl_804513EC-_SDA_BASE_(r13)
/* 802D2D50 002CFC90 80 0D 8E 60 */ lwz r0, lbl_804513E0-_SDA_BASE_(r13)
/* 802D2D4C 002CFC8C 80 8D 8E 6C */ lwz r4, JKRAram__srcAddress-_SDA_BASE_(r13)
/* 802D2D50 002CFC90 80 0D 8E 60 */ lwz r0, JKRAram__srcOffset-_SDA_BASE_(r13)
/* 802D2D54 002CFC94 7C 84 02 14 */ add r4, r4, r0
/* 802D2D58 002CFC98 7C BE EA 14 */ add r5, r30, r29
/* 802D2D5C 002CFC9C 38 1C 00 1F */ addi r0, r28, 0x1f
/* 802D2D60 002CFCA0 54 06 00 34 */ rlwinm r6, r0, 0, 0, 0x1a
/* 802D2D64 002CFCA4 38 E0 00 00 */ li r7, 0
/* 802D2D68 002CFCA8 48 00 0A D1 */ bl orderSync__12JKRAramPieceFiUlUlUlP12JKRAramBlock
/* 802D2D6C 002CFCAC 80 0D 8E 60 */ lwz r0, lbl_804513E0-_SDA_BASE_(r13)
/* 802D2D6C 002CFCAC 80 0D 8E 60 */ lwz r0, JKRAram__srcOffset-_SDA_BASE_(r13)
/* 802D2D70 002CFCB0 7C 00 E2 14 */ add r0, r0, r28
/* 802D2D74 002CFCB4 90 0D 8E 60 */ stw r0, lbl_804513E0-_SDA_BASE_(r13)
/* 802D2D78 002CFCB8 80 0D 8E 64 */ lwz r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D2D74 002CFCB4 90 0D 8E 60 */ stw r0, JKRAram__srcOffset-_SDA_BASE_(r13)
/* 802D2D78 002CFCB8 80 0D 8E 64 */ lwz r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D2D7C 002CFCBC 7C 1C 00 51 */ subf. r0, r28, r0
/* 802D2D80 002CFCC0 90 0D 8E 64 */ stw r0, lbl_804513E4-_SDA_BASE_(r13)
/* 802D2D80 002CFCC0 90 0D 8E 64 */ stw r0, JKRAram__transLeft-_SDA_BASE_(r13)
/* 802D2D84 002CFCC4 40 82 00 0C */ bne lbl_802D2D90
/* 802D2D88 002CFCC8 7C 1F E2 14 */ add r0, r31, r28
/* 802D2D8C 002CFCCC 90 0D 8E 68 */ stw r0, lbl_804513E8-_SDA_BASE_(r13)
/* 802D2D8C 002CFCCC 90 0D 8E 68 */ stw r0, JKRAram__srcLimit-_SDA_BASE_(r13)
lbl_802D2D90:
/* 802D2D90 002CFCD0 7F C3 F3 78 */ mr r3, r30
/* 802D2D94 002CFCD4 39 61 00 20 */ addi r11, r1, 0x20
@@ -3,11 +3,11 @@
/* 802D2DAC 002CFCEC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 802D2DB0 002CFCF0 7C 08 02 A6 */ mflr r0
/* 802D2DB4 002CFCF4 90 01 00 14 */ stw r0, 0x14(r1)
/* 802D2DB8 002CFCF8 3C 60 80 43 */ lis r3, lbl_804342DC@ha
/* 802D2DBC 002CFCFC 38 63 42 DC */ addi r3, r3, lbl_804342DC@l
/* 802D2DB8 002CFCF8 3C 60 80 43 */ lis r3, sAramCommandList__7JKRAram@ha
/* 802D2DBC 002CFCFC 38 63 42 DC */ addi r3, r3, sAramCommandList__7JKRAram@l
/* 802D2DC0 002CFD00 48 00 91 55 */ bl initiate__10JSUPtrListFv
/* 802D2DC4 002CFD04 3C 60 80 43 */ lis r3, lbl_804342DC@ha
/* 802D2DC8 002CFD08 38 63 42 DC */ addi r3, r3, lbl_804342DC@l
/* 802D2DC4 002CFD04 3C 60 80 43 */ lis r3, sAramCommandList__7JKRAram@ha
/* 802D2DC8 002CFD08 38 63 42 DC */ addi r3, r3, sAramCommandList__7JKRAram@l
/* 802D2DCC 002CFD0C 3C 80 80 2D */ lis r4, JSUList_NS_dtor_X4_@ha
/* 802D2DD0 002CFD10 38 84 2D F0 */ addi r4, r4, JSUList_NS_dtor_X4_@l
/* 802D2DD4 002CFD14 3C A0 80 43 */ lis r5, lbl_804342D0@ha
@@ -13,7 +13,7 @@ public:
void getAramAddress_Entry(SDIFileEntry*);
void getAramAddress(char const*);
/* vt[15] */ u32 getExpandedResSize(const void*) const; /* override */
/* vt[15] */ u32 getExpandedResSize(const void*); /* override */
/* vt[16] */ void* fetchResource(SDIFileEntry*, u32*); /* override */
/* vt[17] */ void* fetchResource(void*, u32, SDIFileEntry*, u32*); /* override */
@@ -30,8 +30,8 @@ lbl_802D7114:
/* 802D7128 002D4068 80 03 00 04 */ lwz r0, 4(r3)
/* 802D712C 002D406C 7C 04 02 14 */ add r0, r4, r0
/* 802D7130 002D4070 90 1D 00 28 */ stw r0, 0x28(r29)
/* 802D7134 002D4074 3C 60 80 43 */ lis r3, lbl_80434354@ha
/* 802D7138 002D4078 38 63 43 54 */ addi r3, r3, lbl_80434354@l
/* 802D7134 002D4074 3C 60 80 43 */ lis r3, sVolumeList__13JKRFileLoader@ha
/* 802D7138 002D4078 38 63 43 54 */ addi r3, r3, sVolumeList__13JKRFileLoader@l
/* 802D713C 002D407C 38 9D 00 18 */ addi r4, r29, 0x18
/* 802D7140 002D4080 48 00 4E B1 */ bl prepend__10JSUPtrListFP10JSUPtrLink
/* 802D7144 002D4084 38 00 00 01 */ li r0, 1
@@ -67,8 +67,8 @@ lbl_802D7234:
/* 802D7250 002D4190 7D 89 03 A6 */ mtctr r12
/* 802D7254 002D4194 4E 80 04 21 */ bctrl
lbl_802D7258:
/* 802D7258 002D4198 3C 60 80 43 */ lis r3, lbl_80434354@ha
/* 802D725C 002D419C 38 63 43 54 */ addi r3, r3, lbl_80434354@l
/* 802D7258 002D4198 3C 60 80 43 */ lis r3, sVolumeList__13JKRFileLoader@ha
/* 802D725C 002D419C 38 63 43 54 */ addi r3, r3, sVolumeList__13JKRFileLoader@l
/* 802D7260 002D41A0 38 9E 00 18 */ addi r4, r30, 0x18
/* 802D7264 002D41A4 48 00 4E F9 */ bl remove__10JSUPtrListFP10JSUPtrLink
/* 802D7268 002D41A8 38 00 00 00 */ li r0, 0
@@ -14,7 +14,7 @@
/* 802D72D4 002D4214 90 03 00 54 */ stw r0, 0x54(r3)
/* 802D72D8 002D4218 90 03 00 64 */ stw r0, 0x64(r3)
/* 802D72DC 002D421C 38 60 00 F8 */ li r3, 0xf8
/* 802D72E0 002D4220 80 8D 8D F0 */ lwz r4, lbl_80451370-_SDA_BASE_(r13)
/* 802D72E0 002D4220 80 8D 8D F0 */ lwz r4, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D72E4 002D4224 80 1F 00 60 */ lwz r0, 0x60(r31)
/* 802D72E8 002D4228 2C 00 00 01 */ cmpwi r0, 1
/* 802D72EC 002D422C 38 A0 FF FC */ li r5, -4
@@ -37,7 +37,7 @@ lbl_802D7310:
/* 802D7328 002D4268 38 60 00 00 */ li r3, 0
/* 802D732C 002D426C 48 00 02 9C */ b lbl_802D75C8
lbl_802D7330:
/* 802D7330 002D4270 80 6D 8D F0 */ lwz r3, lbl_80451370-_SDA_BASE_(r13)
/* 802D7330 002D4270 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D7334 002D4274 38 80 00 20 */ li r4, 0x20
/* 802D7338 002D4278 38 A0 FF E0 */ li r5, -32
/* 802D733C 002D427C 4B FF 71 99 */ bl alloc__7JKRHeapFUli
@@ -57,7 +57,7 @@ lbl_802D7354:
/* 802D7370 002D42B0 39 00 00 01 */ li r8, 1
/* 802D7374 002D42B4 39 20 00 00 */ li r9, 0
/* 802D7378 002D42B8 39 5F 00 5C */ addi r10, r31, 0x5c
/* 802D737C 002D42BC 48 00 28 D9 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlP14JKRCompressionPUl
/* 802D737C 002D42BC 48 00 28 D9 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D7380 002D42C0 7F A3 EB 78 */ mr r3, r29
/* 802D7384 002D42C4 38 80 00 20 */ li r4, 0x20
/* 802D7388 002D42C8 48 06 41 F9 */ bl DCInvalidateRange
@@ -91,7 +91,7 @@ lbl_802D73D8:
/* 802D73F0 002D4330 39 00 00 01 */ li r8, 1
/* 802D73F4 002D4334 39 20 00 20 */ li r9, 0x20
/* 802D73F8 002D4338 39 40 00 00 */ li r10, 0
/* 802D73FC 002D433C 48 00 28 59 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlP14JKRCompressionPUl
/* 802D73FC 002D433C 48 00 28 59 */ bl loadToMainRAM__12JKRDvdRipperFlPUc15JKRExpandSwitchUlP7JKRHeapQ212JKRDvdRipper15EAllocDirectionUlPiPUl
/* 802D7400 002D4340 80 7F 00 44 */ lwz r3, 0x44(r31)
/* 802D7404 002D4344 7F 64 DB 78 */ mr r4, r27
/* 802D7408 002D4348 48 06 41 79 */ bl DCInvalidateRange
@@ -131,7 +131,7 @@ lbl_802D7484:
/* 802D7484 002D43C4 54 80 06 3F */ clrlwi. r0, r4, 0x18
/* 802D7488 002D43C8 41 82 00 60 */ beq lbl_802D74E8
/* 802D748C 002D43CC 7F C3 F3 78 */ mr r3, r30
/* 802D7490 002D43D0 48 08 DC 41 */ bl func_803650D0
/* 802D7490 002D43D0 48 08 DC 41 */ bl abs
/* 802D7494 002D43D4 7C 64 1B 78 */ mr r4, r3
/* 802D7498 002D43D8 80 BF 00 38 */ lwz r5, 0x38(r31)
/* 802D749C 002D43DC 80 7F 00 44 */ lwz r3, 0x44(r31)
@@ -153,12 +153,12 @@ lbl_802D74D4:
/* 802D74D8 002D4418 80 BF 00 44 */ lwz r5, 0x44(r31)
/* 802D74DC 002D441C 80 05 00 08 */ lwz r0, 8(r5)
/* 802D74E0 002D4420 54 05 10 3A */ slwi r5, r0, 2
/* 802D74E4 002D4424 4B D2 BF 75 */ bl func_80003458
/* 802D74E4 002D4424 4B D2 BF 75 */ bl memset
lbl_802D74E8:
/* 802D74E8 002D4428 80 7D 00 10 */ lwz r3, 0x10(r29)
/* 802D74EC 002D442C 38 03 00 1F */ addi r0, r3, 0x1f
/* 802D74F0 002D4430 54 04 00 34 */ rlwinm r4, r0, 0, 0, 0x1a
/* 802D74F4 002D4434 80 6D 8E 48 */ lwz r3, lbl_804513C8-_SDA_BASE_(r13)
/* 802D74F4 002D4434 80 6D 8E 48 */ lwz r3, sAramObject__7JKRAram-_SDA_BASE_(r13)
/* 802D74F8 002D4438 80 63 00 94 */ lwz r3, 0x94(r3)
/* 802D74FC 002D443C 80 1F 00 60 */ lwz r0, 0x60(r31)
/* 802D7500 002D4440 20 A0 00 01 */ subfic r5, r0, 1
@@ -197,7 +197,7 @@ lbl_802D7554:
lbl_802D7578:
/* 802D7578 002D44B8 28 1D 00 00 */ cmplwi r29, 0
/* 802D757C 002D44BC 41 82 00 10 */ beq lbl_802D758C
/* 802D7580 002D44C0 80 6D 8D F0 */ lwz r3, lbl_80451370-_SDA_BASE_(r13)
/* 802D7580 002D44C0 80 6D 8D F0 */ lwz r3, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D7584 002D44C4 7F A4 EB 78 */ mr r4, r29
/* 802D7588 002D44C8 4B FF 6F C1 */ bl free__7JKRHeapFPv
lbl_802D758C:
@@ -62,4 +62,9 @@ private:
static void unlock() { OSUnlockMutex(&lbl_80434330); }
};
inline BOOL JKRAramPcs(int direction, u32 source, u32 destination, u32 length,
JKRAramBlock* block) {
return JKRAramPiece::orderSync(direction, source, destination, length, block);
}
#endif
@@ -52,7 +52,7 @@ lbl_802D365C:
/* 802D36D4 002D0614 48 00 EB 29 */ bl JUTException_NS_panic_f
lbl_802D36D8:
/* 802D36D8 002D0618 38 60 00 08 */ li r3, 8
/* 802D36DC 002D061C 80 8D 8D F0 */ lwz r4, lbl_80451370-_SDA_BASE_(r13)
/* 802D36DC 002D061C 80 8D 8D F0 */ lwz r4, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D36E0 002D0620 38 A0 FF FC */ li r5, -4
/* 802D36E4 002D0624 4B FF B5 B5 */ bl __nw__FUlP7JKRHeapi
/* 802D36E8 002D0628 7C 79 1B 78 */ mr r25, r3
@@ -67,8 +67,8 @@ lbl_802D36D8:
/* 802D370C 002D064C 38 00 00 01 */ li r0, 1
/* 802D3710 002D0650 90 19 00 00 */ stw r0, 0(r25)
/* 802D3714 002D0654 93 59 00 04 */ stw r26, 4(r25)
/* 802D3718 002D0658 3C 60 80 3D */ lis r3, lbl_803CC138@ha
/* 802D371C 002D065C 38 63 C1 38 */ addi r3, r3, lbl_803CC138@l
/* 802D3718 002D0658 3C 60 80 3D */ lis r3, sMessageQueue__7JKRAram@ha
/* 802D371C 002D065C 38 63 C1 38 */ addi r3, r3, sMessageQueue__7JKRAram@l
/* 802D3720 002D0660 7F 24 CB 78 */ mr r4, r25
/* 802D3724 002D0664 38 A0 00 01 */ li r5, 1
/* 802D3728 002D0668 48 06 B2 CD */ bl OSSendMessage
@@ -8,26 +8,32 @@
class JKRAramStreamCommand {
public:
enum Type {
UNKNOWN = 0,
READ = 1,
WRITE = 2,
};
JKRAramStreamCommand();
public:
u32 field_0x00;
u32 field_0x04;
u32 field_0x08;
u32 field_0x0c;
JSUFileInputStream* field_0x10;
u32 field_0x14;
u32* field_0x18;
u32 field_0x1c;
u32 field_0x20;
u32 field_0x24;
bool field_0x28;
u8 padding_0x29[3];
u32 field_0x2c;
OSMessageQueue mQueue;
OSMessage mMessage;
u32 field_0x54;
u32 field_0x58;
/* 0x00 */ Type mType;
/* 0x04 */ u32 mAddress;
/* 0x08 */ u32 mSize;
/* 0x0C */ u32 field_0x0c;
/* 0x10 */ JSUFileInputStream* mStream;
/* 0x14 */ u32 mOffset;
/* 0x18 */ u32* mReturnSize;
/* 0x1C */ u8* mTransferBuffer;
/* 0x20 */ u32 mTransferBufferSize;
/* 0x24 */ JKRHeap* mHeap;
/* 0x28 */ bool mAllocatedTransferBuffer;
/* 0x29 */ u8 padding_0x29[3];
/* 0x2C */ u32 field_0x2c;
/* 0x30 */ OSMessageQueue mMessageQueue;
/* 0x50 */ OSMessage mMessage;
/* 0x54 */ u32 field_0x54;
/* 0x58 */ u32 field_0x58;
};
class JKRAramStream : public JKRThread {
@@ -38,13 +44,26 @@ private:
/* vt[03] */ void* run(void); /* override */
public:
static void create(long);
static JKRAramStream* create(long);
static void readFromAram(void);
static void writeToAram(JKRAramStreamCommand*);
static void write_StreamToAram_Async(JSUFileInputStream*, u32, u32, u32, u32*);
static void sync(JKRAramStreamCommand*, int);
static s32 readFromAram(void);
static s32 writeToAram(JKRAramStreamCommand*);
static JKRAramStreamCommand* write_StreamToAram_Async(JSUFileInputStream*, u32, u32, u32, u32*);
static JKRAramStreamCommand* sync(JKRAramStreamCommand*, BOOL);
static void setTransBuffer(u8*, u32, JKRHeap*);
private:
static JKRAramStream* sAramStreamObject;
static OSMessage sMessageBuffer[4];
static OSMessageQueue sMessageQueue;
static u8* transBuffer;
static u32 transSize;
static JKRHeap* transHeap;
};
inline JKRAramStream* JKRCreateAramStreamManager(long priority) {
return JKRAramStream::create(priority);
}
#endif
@@ -5,11 +5,11 @@
/* 802D3B50 002D0A90 90 01 00 14 */ stw r0, 0x14(r1)
/* 802D3B54 002D0A94 93 E1 00 0C */ stw r31, 0xc(r1)
/* 802D3B58 002D0A98 7C 7F 1B 78 */ mr r31, r3
/* 802D3B5C 002D0A9C 80 0D 8E 88 */ lwz r0, lbl_80451408-_SDA_BASE_(r13)
/* 802D3B5C 002D0A9C 80 0D 8E 88 */ lwz r0, sAramStreamObject__13JKRAramStream-_SDA_BASE_(r13)
/* 802D3B60 002D0AA0 28 00 00 00 */ cmplwi r0, 0
/* 802D3B64 002D0AA4 40 82 00 3C */ bne lbl_802D3BA0
/* 802D3B68 002D0AA8 38 60 00 7C */ li r3, 0x7c
/* 802D3B6C 002D0AAC 80 8D 8D F0 */ lwz r4, lbl_80451370-_SDA_BASE_(r13)
/* 802D3B6C 002D0AAC 80 8D 8D F0 */ lwz r4, sSystemHeap__7JKRHeap-_SDA_BASE_(r13)
/* 802D3B70 002D0AB0 38 A0 00 00 */ li r5, 0
/* 802D3B74 002D0AB4 4B FF B1 25 */ bl __nw__FUlP7JKRHeapi
/* 802D3B78 002D0AB8 7C 60 1B 79 */ or. r0, r3, r3
@@ -18,13 +18,13 @@
/* 802D3B84 002D0AC4 48 00 00 35 */ bl __ct__13JKRAramStreamFl
/* 802D3B88 002D0AC8 7C 60 1B 78 */ mr r0, r3
lbl_802D3B8C:
/* 802D3B8C 002D0ACC 90 0D 8E 88 */ stw r0, lbl_80451408-_SDA_BASE_(r13)
/* 802D3B8C 002D0ACC 90 0D 8E 88 */ stw r0, sAramStreamObject__13JKRAramStream-_SDA_BASE_(r13)
/* 802D3B90 002D0AD0 38 60 00 00 */ li r3, 0
/* 802D3B94 002D0AD4 38 80 00 00 */ li r4, 0
/* 802D3B98 002D0AD8 38 A0 00 00 */ li r5, 0
/* 802D3B9C 002D0ADC 48 00 04 99 */ bl setTransBuffer__13JKRAramStreamFPUcUlP7JKRHeap
lbl_802D3BA0:
/* 802D3BA0 002D0AE0 80 6D 8E 88 */ lwz r3, lbl_80451408-_SDA_BASE_(r13)
/* 802D3BA0 002D0AE0 80 6D 8E 88 */ lwz r3, sAramStreamObject__13JKRAramStream-_SDA_BASE_(r13)
/* 802D3BA4 002D0AE4 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 802D3BA8 002D0AE8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 802D3BAC 002D0AEC 7C 08 03 A6 */ mtlr r0

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