* JKRDvdArchive.s split

* JKRMemArchive.s split

* JKRAramArchive.s split

* JKRCompArchive.s split

* JKRDecomp.s split

* JKRDvdRipper.s split

* JKRAramBlock.s split

* JKRAramHeap.s split

* JKRAramPiece.s split

* JKRAramStream.s split

* removed unused .s files

* JKRDvdAramRipper.s split

* JKRAram.s split

* cleanup and making vtables easier to debug

* fixed merge errors

* fixed JKRFileLoader::fetchVolumeName

Co-authored-by: Pheenoh <pheenoh@gmail.com>
This commit is contained in:
Jonathan Wase
2020-12-06 15:02:25 -05:00
committed by GitHub
co-authored by Pheenoh
parent 819f178657
commit 86f892c3d3
201 changed files with 9912 additions and 8262 deletions
+3 -3
View File
@@ -410,7 +410,7 @@ lbl_802DD700:
/* 802DD710 002DA650 80 1C 00 74 */ lwz r0, 0x74(r28)
/* 802DD714 002DA654 7C 84 00 50 */ subf r4, r4, r0
/* 802DD718 002DA658 38 A0 00 00 */ li r5, 0
/* 802DD71C 002DA65C 4B FF 58 A1 */ bl JKRAramHeap_NS_alloc
/* 802DD71C 002DA65C 4B FF 58 A1 */ bl alloc__11JKRAramHeapFUlQ211JKRAramHeap10EAllocMode
/* 802DD720 002DA660 90 7C 00 AC */ stw r3, 0xac(r28)
/* 802DD724 002DA664 80 1C 00 AC */ lwz r0, 0xac(r28)
/* 802DD728 002DA668 28 00 00 00 */ cmplwi r0, 0
@@ -625,7 +625,7 @@ lbl_802DD9EC:
/* 802DDA14 002DA954 39 00 00 00 */ li r8, 0
/* 802DDA18 002DA958 39 20 FF FF */ li r9, -1
/* 802DDA1C 002DA95C 39 40 00 00 */ li r10, 0
/* 802DDA20 002DA960 4B FF 49 1D */ bl JKRAram_NS_mainRamToAram
/* 802DDA20 002DA960 4B FF 49 1D */ bl mainRamToAram__7JKRAramFPUcUlUl15JKRExpandSwitchUlP7JKRHeapiPUl
/* 802DDA24 002DA964 28 03 00 00 */ cmplwi r3, 0
/* 802DDA28 002DA968 40 82 00 24 */ bne lbl_802DDA4C
/* 802DDA2C 002DA96C 3C 60 80 3A */ lis r3, lbl_8039D2F0@ha
@@ -796,7 +796,7 @@ lbl_802DDC40:
/* 802DDC70 002DABB0 39 00 00 00 */ li r8, 0
/* 802DDC74 002DABB4 39 20 FF FF */ li r9, -1
/* 802DDC78 002DABB8 39 40 00 00 */ li r10, 0
/* 802DDC7C 002DABBC 4B FF 49 39 */ bl JKRAram_NS_aramToMainRam
/* 802DDC7C 002DABBC 4B FF 49 39 */ bl aramToMainRam__7JKRAramFUlPUcUl15JKRExpandSwitchUlP7JKRHeapiPUl
/* 802DDC80 002DABC0 38 7F 00 20 */ addi r3, r31, 0x20
/* 802DDC84 002DABC4 38 9F 00 40 */ addi r4, r31, 0x40
/* 802DDC88 002DABC8 A0 BF 00 1A */ lhz r5, 0x1a(r31)