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migrate remaining d_save and m_Do_main asm to inline, add intial class mapping for dFile_select_c

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2020-11-29 20:16:52 -05:00
parent 58afa9ed78
commit 44b14ec128
163 changed files with 1975 additions and 1732 deletions
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asm/m/Do/m_Do_ext.s
+10 -10
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@@ -763,7 +763,7 @@ lbl_8000DAE8:
/* 8000DB14 0000AA54 7C 08 02 A6 */ mflr r0
/* 8000DB18 0000AA58 90 01 00 24 */ stw r0, 0x24(r1)
/* 8000DB1C 0000AA5C 39 61 00 20 */ addi r11, r1, 0x20
/* 8000DB20 0000AA60 48 35 46 B1 */ bl func_803621D0
/* 8000DB20 0000AA60 48 35 46 B1 */ bl _savegpr_26
/* 8000DB24 0000AA64 7C 7A 1B 78 */ mr r26, r3
/* 8000DB28 0000AA68 80 03 00 6C */ lwz r0, 0x6c(r3)
/* 8000DB2C 0000AA6C 3C 60 80 43 */ lis r3, lbl_80434AC8@ha
@@ -802,7 +802,7 @@ lbl_8000DBA0:
/* 8000DBA8 0000AAE8 7C 03 00 40 */ cmplw r3, r0
/* 8000DBAC 0000AAEC 41 80 FF 9C */ blt lbl_8000DB48
/* 8000DBB0 0000AAF0 39 61 00 20 */ addi r11, r1, 0x20
/* 8000DBB4 0000AAF4 48 35 46 69 */ bl func_8036221C
/* 8000DBB4 0000AAF4 48 35 46 69 */ bl _restgpr_26
/* 8000DBB8 0000AAF8 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8000DBBC 0000AAFC 7C 08 03 A6 */ mtlr r0
/* 8000DBC0 0000AB00 38 21 00 20 */ addi r1, r1, 0x20
@@ -1010,7 +1010,7 @@ lbl_8000DE64:
/* 8000DE90 0000ADD0 7C 08 02 A6 */ mflr r0
/* 8000DE94 0000ADD4 90 01 00 24 */ stw r0, 0x24(r1)
/* 8000DE98 0000ADD8 39 61 00 20 */ addi r11, r1, 0x20
/* 8000DE9C 0000ADDC 48 35 43 35 */ bl func_803621D0
/* 8000DE9C 0000ADDC 48 35 43 35 */ bl _savegpr_26
/* 8000DEA0 0000ADE0 7C 7A 1B 78 */ mr r26, r3
/* 8000DEA4 0000ADE4 3B 80 00 00 */ li r28, 0
/* 8000DEA8 0000ADE8 3F E0 C0 00 */ lis r31, 0xc000
@@ -1052,7 +1052,7 @@ lbl_8000DF14:
/* 8000DF1C 0000AE5C 7C 03 00 40 */ cmplw r3, r0
/* 8000DF20 0000AE60 41 80 FF 90 */ blt lbl_8000DEB0
/* 8000DF24 0000AE64 39 61 00 20 */ addi r11, r1, 0x20
/* 8000DF28 0000AE68 48 35 42 F5 */ bl func_8036221C
/* 8000DF28 0000AE68 48 35 42 F5 */ bl _restgpr_26
/* 8000DF2C 0000AE6C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8000DF30 0000AE70 7C 08 03 A6 */ mtlr r0
/* 8000DF34 0000AE74 38 21 00 20 */ addi r1, r1, 0x20
@@ -2627,7 +2627,7 @@ lbl_8000F488:
/* 8000F4C4 0000C404 DB C1 00 C0 */ stfd f30, 0xc0(r1)
/* 8000F4C8 0000C408 F3 C1 00 C8 */ psq_st f30, 200(r1), 0, qr0
/* 8000F4CC 0000C40C 39 61 00 C0 */ addi r11, r1, 0xc0
/* 8000F4D0 0000C410 48 35 2D 01 */ bl func_803621D0
/* 8000F4D0 0000C410 48 35 2D 01 */ bl _savegpr_26
/* 8000F4D4 0000C414 7C 7C 1B 78 */ mr r28, r3
/* 8000F4D8 0000C418 80 6D 90 74 */ lwz r3, lbl_804515F4-_SDA_BASE_(r13)
/* 8000F4DC 0000C41C A3 E3 00 14 */ lhz r31, 0x14(r3)
@@ -2850,7 +2850,7 @@ lbl_8000F820:
/* 8000F828 0000C768 E3 C1 00 C8 */ psq_l f30, 200(r1), 0, qr0
/* 8000F82C 0000C76C CB C1 00 C0 */ lfd f30, 0xc0(r1)
/* 8000F830 0000C770 39 61 00 C0 */ addi r11, r1, 0xc0
/* 8000F834 0000C774 48 35 29 E9 */ bl func_8036221C
/* 8000F834 0000C774 48 35 29 E9 */ bl _restgpr_26
/* 8000F838 0000C778 80 01 00 E4 */ lwz r0, 0xe4(r1)
/* 8000F83C 0000C77C 7C 08 03 A6 */ mtlr r0
/* 8000F840 0000C780 38 21 00 E0 */ addi r1, r1, 0xe0
@@ -6032,7 +6032,7 @@ cXyz:
/* 800125E4 0000F524 7C 08 02 A6 */ mflr r0
/* 800125E8 0000F528 90 01 00 24 */ stw r0, 0x24(r1)
/* 800125EC 0000F52C 39 61 00 20 */ addi r11, r1, 0x20
/* 800125F0 0000F530 48 34 FB E1 */ bl func_803621D0
/* 800125F0 0000F530 48 34 FB E1 */ bl _savegpr_26
/* 800125F4 0000F534 7C 7A 1B 78 */ mr r26, r3
/* 800125F8 0000F538 7C 9E 23 78 */ mr r30, r4
/* 800125FC 0000F53C 7C BB 2B 78 */ mr r27, r5
@@ -6085,7 +6085,7 @@ lbl_8001268C:
/* 800126A0 0000F5E0 38 60 00 01 */ li r3, 1
lbl_800126A4:
/* 800126A4 0000F5E4 39 61 00 20 */ addi r11, r1, 0x20
/* 800126A8 0000F5E8 48 34 FB 75 */ bl func_8036221C
/* 800126A8 0000F5E8 48 34 FB 75 */ bl _restgpr_26
/* 800126AC 0000F5EC 80 01 00 24 */ lwz r0, 0x24(r1)
/* 800126B0 0000F5F0 7C 08 03 A6 */ mtlr r0
/* 800126B4 0000F5F4 38 21 00 20 */ addi r1, r1, 0x20
@@ -8326,7 +8326,7 @@ mDoExt_initFontCommon:
/* 80014808 00011748 7C 08 02 A6 */ mflr r0
/* 8001480C 0001174C 90 01 00 24 */ stw r0, 0x24(r1)
/* 80014810 00011750 39 61 00 20 */ addi r11, r1, 0x20
/* 80014814 00011754 48 34 D9 BD */ bl func_803621D0
/* 80014814 00011754 48 34 D9 BD */ bl _savegpr_26
/* 80014818 00011758 7C 7E 1B 78 */ mr r30, r3
/* 8001481C 0001175C 7C 9F 23 78 */ mr r31, r4
/* 80014820 00011760 7C BA 2B 78 */ mr r26, r5
@@ -8406,7 +8406,7 @@ lbl_8001492C:
/* 80014930 00011870 90 1E 00 00 */ stw r0, 0(r30)
lbl_80014934:
/* 80014934 00011874 39 61 00 20 */ addi r11, r1, 0x20
/* 80014938 00011878 48 34 D8 E5 */ bl func_8036221C
/* 80014938 00011878 48 34 D8 E5 */ bl _restgpr_26
/* 8001493C 0001187C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80014940 00011880 7C 08 03 A6 */ mtlr r0
/* 80014944 00011884 38 21 00 20 */ addi r1, r1, 0x20
asm/m/Do/m_Do_main.s
-1034
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