encounter/tp
0
0
Fork 0
mirror of https://github.com/encounter/tp.git synced 2026-07-11 06:18:46 -07:00
Code Issues Packages Projects Releases Wiki Activity

migrate remaining d_save and m_Do_main asm to inline, add intial class mapping for dFile_select_c

Browse Source
This commit is contained in:
unknown
2020-11-29 20:16:52 -05:00
parent 58afa9ed78
commit 44b14ec128
163 changed files with 1975 additions and 1732 deletions
Download Patch File Download Diff File Expand all files Collapse all files
asm/d/d_vibration.s
+4 -4
View File
@@ -50,7 +50,7 @@ _unnamed_d_vibration_cpp__NS_randombit:
/* 8006F1E4 0006C124 DB E1 00 30 */ stfd f31, 0x30(r1)
/* 8006F1E8 0006C128 F3 E1 00 38 */ psq_st f31, 56(r1), 0, qr0
/* 8006F1EC 0006C12C 39 61 00 30 */ addi r11, r1, 0x30
/* 8006F1F0 0006C130 48 2F 2F E1 */ bl func_803621D0
/* 8006F1F0 0006C130 48 2F 2F E1 */ bl _savegpr_26
/* 8006F1F4 0006C134 7C 7A 1B 78 */ mr r26, r3
/* 8006F1F8 0006C138 3B 80 00 00 */ li r28, 0
/* 8006F1FC 0006C13C 3B 60 00 00 */ li r27, 0
@@ -77,7 +77,7 @@ lbl_8006F23C:
/* 8006F248 0006C188 E3 E1 00 38 */ psq_l f31, 56(r1), 0, qr0
/* 8006F24C 0006C18C CB E1 00 30 */ lfd f31, 0x30(r1)
/* 8006F250 0006C190 39 61 00 30 */ addi r11, r1, 0x30
/* 8006F254 0006C194 48 2F 2F C9 */ bl func_8036221C
/* 8006F254 0006C194 48 2F 2F C9 */ bl _restgpr_26
/* 8006F258 0006C198 80 01 00 44 */ lwz r0, 0x44(r1)
/* 8006F25C 0006C19C 7C 08 03 A6 */ mtlr r0
/* 8006F260 0006C1A0 38 21 00 40 */ addi r1, r1, 0x40
@@ -764,7 +764,7 @@ dVibration_c_NS_StartQuake_X1_:
/* 8006FC10 0006CB50 7C 08 02 A6 */ mflr r0
/* 8006FC14 0006CB54 90 01 00 24 */ stw r0, 0x24(r1)
/* 8006FC18 0006CB58 39 61 00 20 */ addi r11, r1, 0x20
/* 8006FC1C 0006CB5C 48 2F 25 B5 */ bl func_803621D0
/* 8006FC1C 0006CB5C 48 2F 25 B5 */ bl _savegpr_26
/* 8006FC20 0006CB60 7C 7B 1B 78 */ mr r27, r3
/* 8006FC24 0006CB64 7C 9C 23 78 */ mr r28, r4
/* 8006FC28 0006CB68 7C BD 2B 78 */ mr r29, r5
@@ -855,7 +855,7 @@ lbl_8006FD24:
lbl_8006FD78:
/* 8006FD78 0006CCB8 7F E3 FB 78 */ mr r3, r31
/* 8006FD7C 0006CCBC 39 61 00 20 */ addi r11, r1, 0x20
/* 8006FD80 0006CCC0 48 2F 24 9D */ bl func_8036221C
/* 8006FD80 0006CCC0 48 2F 24 9D */ bl _restgpr_26
/* 8006FD84 0006CCC4 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8006FD88 0006CCC8 7C 08 03 A6 */ mtlr r0
/* 8006FD8C 0006CCCC 38 21 00 20 */ addi r1, r1, 0x20