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https://github.com/encounter/osdev.git
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Luke Street
153 lines
3.2 KiB
NASM
153 lines
3.2 KiB
NASM
[bits 32]
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extern isr_handler
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extern irq_handler
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%macro ISR_NOERRCODE 1 ; define a macro, taking one parameter
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global isr%1 ; %1 accesses the first parameter.
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isr%1:
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cli
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push byte 0
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push byte %1
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jmp isr_common_stub
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%endmacro
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%macro ISR_ERRCODE 1
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global isr%1
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isr%1:
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cli
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push byte %1
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jmp isr_common_stub
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%endmacro
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; This macro creates a stub for an IRQ - the first parameter is
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; the IRQ number, the second is the ISR number it is remapped to.
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%macro IRQ 2
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global irq%1
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irq%1:
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cli
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push byte 0
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push byte %2
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jmp irq_common_stub
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%endmacro
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ISR_NOERRCODE 0
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ISR_NOERRCODE 1
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ISR_NOERRCODE 2
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ISR_NOERRCODE 3
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ISR_NOERRCODE 4
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ISR_NOERRCODE 5
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ISR_NOERRCODE 6
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ISR_NOERRCODE 7
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ISR_ERRCODE 8
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ISR_NOERRCODE 9
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ISR_ERRCODE 10
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ISR_ERRCODE 11
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ISR_ERRCODE 12
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ISR_ERRCODE 13
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ISR_ERRCODE 14
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ISR_NOERRCODE 15
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ISR_NOERRCODE 16
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ISR_NOERRCODE 17
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ISR_NOERRCODE 18
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ISR_NOERRCODE 19
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ISR_NOERRCODE 20
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ISR_NOERRCODE 21
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ISR_NOERRCODE 22
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ISR_NOERRCODE 23
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ISR_NOERRCODE 24
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ISR_NOERRCODE 25
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ISR_NOERRCODE 26
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ISR_NOERRCODE 27
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ISR_NOERRCODE 28
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ISR_NOERRCODE 29
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ISR_NOERRCODE 30
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ISR_NOERRCODE 31
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IRQ 0, 32
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IRQ 1, 33
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IRQ 2, 34
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IRQ 3, 35
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IRQ 4, 36
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IRQ 5, 37
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IRQ 6, 38
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IRQ 7, 39
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IRQ 8, 40
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IRQ 9, 41
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IRQ 10, 42
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IRQ 11, 43
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IRQ 12, 44
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IRQ 13, 45
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IRQ 14, 46
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IRQ 15, 47
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; This is our common ISR stub. It saves the processor state, sets
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; up for kernel mode segments, calls the C-level fault handler,
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; and finally restores the stack frame.
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isr_common_stub:
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pusha ; Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax
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; Preserve the MXCSR register.
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sub esp, 4
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stmxcsr [esp]
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mov ax, ds ; Lower 16-bits of eax = ds.
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push eax ; save the data segment descriptor
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;mov ax, 0x10 ; load the kernel data segment descriptor
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;mov ds, ax
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;mov es, ax
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;mov fs, ax
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;mov gs, ax
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call isr_handler
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pop eax ; reload the original data segment descriptor
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;mov ds, ax
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;mov es, ax
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;mov fs, ax
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;mov gs, ax
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; Restore the MXCSR register.
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ldmxcsr [esp]
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add esp, 4
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popa ; Pops edi,esi,ebp...
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add esp, 8 ; Cleans up the pushed error code and pushed ISR number
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sti
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iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP
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; This is our common IRQ stub. It saves the processor state, sets
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; up for kernel mode segments, calls the C-level fault handler,
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; and finally restores the stack frame.
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irq_common_stub:
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pusha ; Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax
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; Preserve the MXCSR register.
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sub esp, 4
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stmxcsr [esp]
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mov ax, ds ; Lower 16-bits of eax = ds.
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push eax ; save the data segment descriptor
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;mov ax, 0x10 ; load the kernel data segment descriptor
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;mov ds, ax
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;mov es, ax
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;mov fs, ax
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;mov gs, ax
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call irq_handler
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pop ebx ; reload the original data segment descriptor
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;mov ds, bx
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;mov es, bx
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;mov fs, bx
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;mov gs, bx
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; Restore the MXCSR register.
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ldmxcsr [esp]
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add esp, 4
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popa ; Pops edi,esi,ebp...
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add esp, 8 ; Cleans up the pushed error code and pushed ISR number
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sti
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iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP |