mirror of
https://github.com/encounter/objdiff.git
synced 2026-07-10 12:18:36 -07:00
x86: Support inline data for jumptables
This commit is contained in:
@@ -14,7 +14,7 @@ use crate::{
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arch::Arch,
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diff::{ArmArchVersion, ArmR9Usage, DiffObjConfig, display::InstructionPart},
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obj::{
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InstructionRef, RelocationFlags, ResolvedInstructionRef, ResolvedRelocation,
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InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef, ResolvedRelocation,
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ScannedInstruction, SymbolFlag, SymbolFlagSet, SymbolKind,
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},
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};
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@@ -183,6 +183,7 @@ impl Arch for ArchArm {
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address: u64,
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code: &[u8],
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section_index: usize,
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_relocations: &[Relocation],
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diff_config: &DiffObjConfig,
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) -> Result<Vec<ScannedInstruction>> {
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let start_addr = address as u32;
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@@ -17,7 +17,7 @@ use crate::{
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arch::Arch,
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diff::{DiffObjConfig, display::InstructionPart},
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obj::{
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InstructionRef, RelocationFlags, ResolvedInstructionRef, ResolvedRelocation,
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InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef, ResolvedRelocation,
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ScannedInstruction,
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},
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};
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@@ -35,6 +35,7 @@ impl Arch for ArchArm64 {
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address: u64,
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code: &[u8],
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_section_index: usize,
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_relocations: &[Relocation],
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_diff_config: &DiffObjConfig,
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) -> Result<Vec<ScannedInstruction>> {
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let start_address = address;
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@@ -194,6 +194,7 @@ impl Arch for ArchMips {
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address: u64,
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code: &[u8],
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_section_index: usize,
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_relocations: &[Relocation],
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diff_config: &DiffObjConfig,
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) -> Result<Vec<ScannedInstruction>> {
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let instruction_flags = self.instruction_flags(diff_config);
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@@ -170,6 +170,7 @@ pub trait Arch: Send + Sync + Debug {
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address: u64,
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code: &[u8],
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section_index: usize,
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relocations: &[Relocation],
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diff_config: &DiffObjConfig,
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) -> Result<Vec<ScannedInstruction>>;
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@@ -301,6 +302,7 @@ impl Arch for ArchDummy {
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_address: u64,
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_code: &[u8],
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_section_index: usize,
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_relocations: &[Relocation],
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_diff_config: &DiffObjConfig,
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) -> Result<Vec<ScannedInstruction>> {
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Ok(Vec::new())
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@@ -87,6 +87,7 @@ impl Arch for ArchPpc {
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address: u64,
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code: &[u8],
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_section_index: usize,
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_relocations: &[Relocation],
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_diff_config: &DiffObjConfig,
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) -> Result<Vec<ScannedInstruction>> {
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ensure!(code.len() & 3 == 0, "Code length must be a multiple of 4");
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@@ -1,6 +1,6 @@
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use alloc::{boxed::Box, string::String, vec::Vec};
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use anyhow::{Result, anyhow, bail};
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use anyhow::{Context, Result, anyhow, bail};
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use iced_x86::{
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Decoder, DecoderOptions, DecoratorKind, FormatterOutput, FormatterTextKind, GasFormatter,
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Instruction, IntelFormatter, MasmFormatter, NasmFormatter, NumberKind, OpKind, Register,
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@@ -10,7 +10,9 @@ use object::{Endian as _, Object as _, ObjectSection as _, pe};
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use crate::{
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arch::Arch,
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diff::{DiffObjConfig, X86Formatter, display::InstructionPart},
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obj::{InstructionRef, RelocationFlags, ResolvedInstructionRef, ScannedInstruction},
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obj::{
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InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef, ScannedInstruction,
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},
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};
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#[derive(Debug)]
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@@ -80,18 +82,48 @@ impl ArchX86 {
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}
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}
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const DATA_OPCODE: u16 = u16::MAX - 1;
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impl Arch for ArchX86 {
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fn scan_instructions(
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&self,
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address: u64,
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code: &[u8],
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_section_index: usize,
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relocations: &[Relocation],
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_diff_config: &DiffObjConfig,
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) -> Result<Vec<ScannedInstruction>> {
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let mut out = Vec::with_capacity(code.len() / 2);
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let mut decoder = self.decoder(code, address);
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let mut instruction = Instruction::default();
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while decoder.can_decode() {
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let mut reloc_iter = relocations.iter().peekable();
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'outer: while decoder.can_decode() {
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let address = decoder.ip();
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while let Some(reloc) = reloc_iter.peek() {
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if reloc.address < address {
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reloc_iter.next();
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} else if reloc.address == address {
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// If the instruction starts at a relocation, it's inline data
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let size = self.reloc_size(reloc.flags).with_context(|| {
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format!("Unsupported inline x86 relocation {:?}", reloc.flags)
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})?;
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if decoder.set_position(decoder.position() + size).is_ok() {
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decoder.set_ip(address + size as u64);
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out.push(ScannedInstruction {
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ins_ref: InstructionRef {
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address,
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size: size as u8,
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opcode: DATA_OPCODE,
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},
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branch_dest: None,
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});
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reloc_iter.next();
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continue 'outer;
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}
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} else {
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break;
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}
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}
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decoder.decode_out(&mut instruction);
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let branch_dest = match instruction.op0_kind() {
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OpKind::NearBranch16 => Some(instruction.near_branch16() as u64),
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@@ -101,7 +133,7 @@ impl Arch for ArchX86 {
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};
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out.push(ScannedInstruction {
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ins_ref: InstructionRef {
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address: instruction.ip(),
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address,
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size: instruction.len() as u8,
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opcode: instruction.mnemonic() as u16,
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},
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@@ -117,6 +149,21 @@ impl Arch for ArchX86 {
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diff_config: &DiffObjConfig,
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cb: &mut dyn FnMut(InstructionPart) -> Result<()>,
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) -> Result<()> {
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if resolved.ins_ref.opcode == DATA_OPCODE {
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let (mnemonic, imm) = match resolved.ins_ref.size {
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2 => (".word", self.endianness.read_u16_bytes(resolved.code.try_into()?) as u64),
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4 => (".dword", self.endianness.read_u32_bytes(resolved.code.try_into()?) as u64),
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_ => bail!("Unsupported x86 inline data size {}", resolved.ins_ref.size),
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};
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cb(InstructionPart::opcode(mnemonic, DATA_OPCODE))?;
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if resolved.relocation.is_some() {
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cb(InstructionPart::reloc())?;
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} else {
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cb(InstructionPart::unsigned(imm))?;
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}
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return Ok(());
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}
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let mut decoder = self.decoder(resolved.code, resolved.ins_ref.address);
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let mut formatter = self.formatter(diff_config);
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let mut instruction = Instruction::default();
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@@ -406,7 +453,7 @@ mod test {
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0xc7, 0x85, 0x68, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04, 0x85, 0x00,
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0x00, 0x00, 0x00,
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];
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let scanned = arch.scan_instructions(0, &code, 0, &DiffObjConfig::default()).unwrap();
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let scanned = arch.scan_instructions(0, &code, 0, &[], &DiffObjConfig::default()).unwrap();
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assert_eq!(scanned.len(), 2);
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assert_eq!(scanned[0].ins_ref.address, 0);
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assert_eq!(scanned[0].ins_ref.size, 10);
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@@ -32,7 +32,13 @@ pub fn no_diff_code(
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symbol.address + symbol.size
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)
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})?;
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let ops = obj.arch.scan_instructions(symbol.address, data, section_index, diff_config)?;
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let ops = obj.arch.scan_instructions(
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symbol.address,
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data,
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section_index,
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§ion.relocations,
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diff_config,
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)?;
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let mut instruction_rows = Vec::<InstructionDiffRow>::new();
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for i in &ops {
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instruction_rows
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@@ -89,12 +95,14 @@ pub fn diff_code(
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left_symbol.address,
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left_data,
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left_section_idx,
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&left_section.relocations,
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diff_config,
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)?;
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let right_ops = right_obj.arch.scan_instructions(
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right_symbol.address,
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right_data,
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right_section_idx,
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&right_section.relocations,
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diff_config,
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)?;
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let (mut left_rows, mut right_rows) = diff_instructions(&left_ops, &right_ops)?;
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