Matt Arsenault 542720b2bc TableGen: Support physical register inputs > 255 ...

This was truncating register value that didn't fit in unsigned char.
Switch AMDGPU sendmsg intrinsics to using a tablegen pattern.

llvm-svn: 366695

2019-07-22 15:02:34 +00:00

..

AsmMatcherEmitter.cpp

[TableGen] AsmMatcher: allow repeated input operands

2019-05-30 07:38:09 +00:00

AsmWriterEmitter.cpp

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AsmWriterInst.cpp

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AsmWriterInst.h

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Attributes.cpp

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CallingConvEmitter.cpp

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CMakeLists.txt

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CodeEmitterGen.cpp

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CodeGenDAGPatterns.cpp

[TableGen] Do not set ReadNone attribute on intrinsics with side effects

2019-07-17 10:53:13 +00:00

CodeGenDAGPatterns.h

TableGen: Add address space to matchers

2019-07-15 20:59:42 +00:00

CodeGenHwModes.cpp

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CodeGenHwModes.h

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CodeGenInstruction.cpp

Allow target to handle STRICT floating-point nodes

2019-06-05 22:33:10 +00:00

CodeGenInstruction.h

Allow target to handle STRICT floating-point nodes

2019-06-05 22:33:10 +00:00

CodeGenIntrinsics.h

[Attributor] Deduce "willreturn" function attribute

2019-07-17 15:15:43 +00:00

CodeGenMapTable.cpp

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CodeGenRegisters.cpp

[AMDGPU] Allow register tuples to set asm names

2019-07-19 18:05:01 +00:00

CodeGenRegisters.h

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CodeGenSchedule.cpp

[TableGen] Include schedule model name in diagnostic.

2019-04-15 10:06:26 +00:00

CodeGenSchedule.h

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CodeGenTarget.cpp

[Attributor] Deduce "willreturn" function attribute

2019-07-17 15:15:43 +00:00

CodeGenTarget.h

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CTagsEmitter.cpp

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DAGISelEmitter.cpp

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DAGISelMatcher.cpp

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DAGISelMatcher.h

TableGen: Support physical register inputs > 255

2019-07-22 15:02:34 +00:00

DAGISelMatcherEmitter.cpp

TableGen: Support physical register inputs > 255

2019-07-22 15:02:34 +00:00

DAGISelMatcherGen.cpp

TableGen: Support physical register inputs > 255

2019-07-22 15:02:34 +00:00

DAGISelMatcherOpt.cpp

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DFAPacketizerEmitter.cpp

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DisassemblerEmitter.cpp

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ExegesisEmitter.cpp

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FastISelEmitter.cpp

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FixedLenDecoderEmitter.cpp

Re-commit r363744: [tblgen][disasm] Allow multiple encodings to disassemble to the same instruction

2019-06-18 23:34:46 +00:00

GlobalISelEmitter.cpp

TableGen/GlobalISel: Fix handling of truncstore patterns

2019-07-15 21:15:20 +00:00

InfoByHwMode.cpp

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InfoByHwMode.h

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InstrDocsEmitter.cpp

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InstrInfoEmitter.cpp

[TableGen] Generate offsets into a flat array for getOperandType

2019-07-16 22:39:18 +00:00

IntrinsicEmitter.cpp

[Attributor] Deduce "willreturn" function attribute

2019-07-17 15:15:43 +00:00

LLVMBuild.txt

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OptParserEmitter.cpp

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PredicateExpander.cpp

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PredicateExpander.h

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PseudoLoweringEmitter.cpp

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RegisterBankEmitter.cpp

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RegisterInfoEmitter.cpp

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RISCVCompressInstEmitter.cpp

[RISCV] Replace map with set in getReqFeatures

2019-06-10 17:15:45 +00:00

SDNodeProperties.cpp

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SDNodeProperties.h

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SearchableTableEmitter.cpp

[AMDGPU] gfx1010 SearchableTableEmitter patch for NSA

2019-05-13 21:59:03 +00:00

SequenceToOffsetTable.h

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SubtargetEmitter.cpp

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SubtargetFeatureInfo.cpp

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SubtargetFeatureInfo.h

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TableGen.cpp

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TableGenBackends.h

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tdtags

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Types.cpp

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Types.h

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WebAssemblyDisassemblerEmitter.cpp

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WebAssemblyDisassemblerEmitter.h

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X86DisassemblerShared.h

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X86DisassemblerTables.cpp

[X86Disassembler] Unify the EVEX and VEX code in emitContextTable. Merge the ATTR_VEXL/ATTR_EVEXL bits. NFCI

2019-06-13 22:15:25 +00:00

X86DisassemblerTables.h

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X86EVEX2VEXTablesEmitter.cpp

[X86] Remove check on isAsmParserOnly from EVEX2VEX tablegenerator. NFCI

2019-04-09 07:40:19 +00:00

X86FoldTablesEmitter.cpp

[X86] Make the X86FoldTablesEmitter functional again. Fix the spacing in the output to make it easier to diff.

2019-06-01 06:20:55 +00:00

X86ModRMFilters.cpp

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X86ModRMFilters.h

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X86RecognizableInstr.cpp

[X86] Add VP2INTERSECT instructions

2019-05-31 02:50:41 +00:00

X86RecognizableInstr.h

[X86] Split the VEX_WPrefix in X86Inst tablegen class into 3 separate fields with clear meanings.

2019-04-09 07:40:06 +00:00