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e736b97efffb79ceeced268163967248d56dbbda
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137 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen e736b97eff Extract some methods from verifyLiveIntervals. 
No functional change.

llvm-svn: 161149
 2012-08-02 00:20:20 +00:00
Jakob Stoklund Olesen a766b4746d Also verify RegUnit intervals at uses. 
llvm-svn: 161147
 2012-08-01 23:52:40 +00:00
Jakob Stoklund Olesen c6fd3deee6 Verify two-address constraints more carefully. 
Include <undef> operands and virtual registers after leaving SSA form.

llvm-svn: 160734
 2012-07-25 16:49:11 +00:00
Pete Cooper dcf94db677 Fix crash in machine verifier when trying to print the def of a register which has no def 
llvm-svn: 160531
 2012-07-19 23:40:38 +00:00
Bill Wendling d163405df8 Remove tabs. 
llvm-svn: 160475
 2012-07-19 00:04:14 +00:00
Jakob Stoklund Olesen da9ea1d6bc Check for extra kill flags on live-out virtual registers. 
This would previously get reported as the misleading "Virtual register
def doesn't dominate all uses."

llvm-svn: 159460
 2012-06-29 21:00:00 +00:00
Jakob Stoklund Olesen a57fc12ec9 Enforce stricter liveness rules for PHIs. 
Verify that all paths from the entry block to a virtual register read
pass through a def. Enable this check even when MRI->isSSA() is false.

Verify that the live range of a virtual register is live out of all
predecessor blocks, even for PHI-values.

This requires that PHIElimination sometimes inserts IMPLICIT_DEF
instruction in predecessor blocks.

llvm-svn: 159150
 2012-06-25 18:18:27 +00:00
Jakob Stoklund Olesen b033dede17 Also verify the def index for early clobbers. 
llvm-svn: 159039
 2012-06-22 22:23:58 +00:00
Jakob Stoklund Olesen 781e0b9fd7 Fix some more LiveInterval enumerations. 
Deterministically enumerate the virtual registers instead.

llvm-svn: 158872
 2012-06-20 23:23:59 +00:00
Akira Hatanaka 1b420ac4c8 Make machine verifier check the first instruction of the last bundle instead of 
the last instruction of a basic block.

llvm-svn: 158468
 2012-06-14 20:51:13 +00:00
Pete Cooper cd72016cab Move terminator machine verification to check MachineBasicBlock::instr_iterator instead of MBB::iterator 
llvm-svn: 158154
 2012-06-07 17:41:39 +00:00
Jakob Stoklund Olesen 00e7dffefb Properly verify liveness with bundled machine instructions. 
Bundles should be treated as one atomic transaction when checking
liveness. That is how the register allocator (and VLIW targets) treats
bundles.

llvm-svn: 158116
 2012-06-06 22:34:30 +00:00
Jakob Stoklund Olesen 54038d796c Switch all register list clients to the new MC*Iterator interface. 
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

llvm-svn: 157854
 2012-06-01 23:28:30 +00:00
Evan Cheng 76f6e2671a Optional def can be either a def or a use (of reg0). 
llvm-svn: 157640
 2012-05-29 19:40:44 +00:00
Jakob Stoklund Olesen 14a8745990 Fix a verifier bug. 
Make sure useless (def-only) intervals also get verified.

llvm-svn: 157000
 2012-05-17 18:32:40 +00:00
Jakob Stoklund Olesen 3c52f0281f Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). 
The getPointerRegClass() hook can return register classes that depend on
the calling convention of the current function (ptr_rc_tailcall).

So far, we have been able to infer the calling convention from the
subtarget alone, but as we add support for multiple calling conventions
per target, that no longer works.

Patch by Yiannis Tsiouris!

llvm-svn: 156328
 2012-05-07 22:10:26 +00:00
Jakob Stoklund Olesen d1bd8fba13 Enable machine code verification after PreSched2 passes. 
The late scheduler depends on accurate liveness information if it is
breaking anti-dependencies, so we should be able to verify it.

Relax the terminator checking in the machine code verifier so it can
handle the basic blocks created by if conversion.

llvm-svn: 153614
 2012-03-28 23:31:15 +00:00
Jakob Stoklund Olesen b21df32cf5 Skip liveness verification when MRI->tracksLiveness() is false. 
Extract the liveness verification into its own method.

This makes it possible to run the machine code verifier after liveness
information is no longer required to be valid.

llvm-svn: 153596
 2012-03-28 20:47:35 +00:00
Jakob Stoklund Olesen 99014ff206 Report the defining instruction. 
llvm-svn: 152460
 2012-03-10 00:44:11 +00:00
Jakob Stoklund Olesen 9f3e5744ab Add SSA verification to MachineVerifier. 
Somehow we never verified SSA dominance before.

llvm-svn: 152458
 2012-03-10 00:36:06 +00:00
Jakob Stoklund Olesen 6ea6a14458 Use SmallPtrSet instead of DenseSet. 
llvm-svn: 152457
 2012-03-10 00:36:04 +00:00
Craig Topper 4b02a29eba Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. 
llvm-svn: 152016
 2012-03-05 05:37:41 +00:00
Jakob Stoklund Olesen 8017d80505 Move the operand iterator into MachineInstrBundle.h where it belongs. 
Extract a base class and provide four specific sub-classes for iterating
over const/non-const bundles/instructions.

This eliminates the mystery bool constructor argument.

llvm-svn: 151684
 2012-02-29 00:33:41 +00:00
Jakob Stoklund Olesen 16c4a972db Handle regmasks in the machine code verifier. 
llvm-svn: 151607
 2012-02-28 01:42:41 +00:00
Jakob Stoklund Olesen 5aafb56dc0 Update machine code verifier. 
After the SlotIndex slot names were updated, it is possible to apply
stricter checks to live intervals.

Also treat bundles as bags of operands when checking live intervals.

llvm-svn: 151531
 2012-02-27 18:24:30 +00:00