Commit Graph

37 Commits

Author SHA1 Message Date
Juergen Ributzka 05c5a93283 [weak vtables] Place class definitions into anonymous namespaces to prevent weak vtables.
This patch places class definitions in implementation files into anonymous
namespaces to prevent weak vtables. This eliminates the need of providing an
out-of-line definition to pin the vtable explicitly to the file.

llvm-svn: 195092
2013-11-19 03:08:35 +00:00
Juergen Ributzka d12ccbd343 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064
2013-11-19 00:57:56 +00:00
Alexey Samsonov 49109a279c Revert r194865 and r194874.
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997
2013-11-18 09:31:53 +00:00
Juergen Ributzka dbedae89b9 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865
2013-11-15 22:34:48 +00:00
Craig Topper b94011fd28 Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
llvm-svn: 186274
2013-07-14 04:42:23 +00:00
Andrew Trick 40c4f38071 Support BufferSize on ProcResGroup for unified MOp schedulers.
And add Sandybridge/Haswell resource buffers.

llvm-svn: 184034
2013-06-15 04:50:06 +00:00
Benjamin Kramer b22643a47d tblgen: Assert that InstRWs doesn't grows when we don't expect it.
llvm-svn: 183690
2013-06-10 20:19:35 +00:00
Benjamin Kramer 58bd79c4b1 tblgen: always lookup values from the original vector as it could be grown under our feet.
PR16281.

llvm-svn: 183630
2013-06-09 15:20:23 +00:00
Arnold Schwaighofer f84a03a589 CodeGenSchedule: Use resize instead of copying a vector
llvm-svn: 183465
2013-06-07 00:04:30 +00:00
Arnold Schwaighofer 3bd2524b60 CodeGenSchedule: smallvector.push_back(smallvector[0]) is dangerous
The element passed to push_back is not copied before the vector reallocates.
The client needs to copy the element first before passing it to push_back.

No test case, will be tested by follow-up swift scheduler model change (it
segfaults without this change).

llvm-svn: 183459
2013-06-06 23:23:14 +00:00
Andrew Trick 78a085170a Fix a tblgen subtargetemitter bug, for future Swift support.
This fixes some of the ridiculously complex code for optimizing the
machine model tables that are shared among all processors of a given
target. A9 and Swift both use the "special" feature that maps old
itinerary classes to new machine model defs. They map different
overlapping subsets of instructions, which wasn't handled correctly.

llvm-svn: 183302
2013-06-05 06:55:20 +00:00
Andrew Trick cf398b220d Machine model: verify well-formed processor resource groups.
llvm-svn: 180161
2013-04-23 23:45:14 +00:00
Andrew Trick d97ff1fcee Fix TableGen subtarget-emitter to handle A9/Swift.
A9 uses itinerary classes, Swift uses RW lists. This tripped some
verification when we're expanding variants. I had to refine the
verification a bit.

llvm-svn: 178357
2013-03-29 19:08:31 +00:00
Dan Gohman f6169d020c Revert r178166. According to Howard, this code is actually ok.
llvm-svn: 178319
2013-03-29 00:13:08 +00:00
Dan Gohman 38a723830c Avoid undefined behavior from passing a std::vector's own contents
in as an argument to push_back.

llvm-svn: 178166
2013-03-27 18:44:56 +00:00
Andrew Trick e97978f94c TableGen SubtargetEmitter fix to allow A9 and Swift to coexist.
Allow variants to be defined only for some processors on a target.

llvm-svn: 178074
2013-03-26 21:36:39 +00:00
Andrew Trick e7bac5f547 TableGen fix for the new machine model.
Properly handle cases where a group of instructions have different
SchedRW lists with the same itinerary class.
This was supposed to work, but I left in an early break.

llvm-svn: 177317
2013-03-18 20:42:25 +00:00
Andrew Trick bf8a28dc52 Machine model. Allow mixed itinerary classes and SchedRW lists.
We always supported a mixture of the old itinerary model and new
per-operand model, but it required a level of indirection to map
itinerary classes to SchedRW lists. This was done for ARM A9.

Now we want to define x86 SchedRW lists, with the goal of removing its
itinerary classes, but still support the itineraries in the mean
time. When I original developed the model, Atom did not have
itineraries, so there was no reason to expect this requirement.

llvm-svn: 177226
2013-03-16 18:58:55 +00:00
Jakob Stoklund Olesen a4a361df5b Add SchedRW as an Instruction field.
Don't require instructions to inherit Sched<...>. Sometimes it is more
convenient to say:

  let SchedRW = ... in {
    ...
  }

Which is now possible.

llvm-svn: 177199
2013-03-15 22:51:13 +00:00
Andrew Trick 4e67cba8a6 MachineModel: Add a ProcResGroup class.
This allows abitrary groups of processor resources. Using something in
a subset automatically counts againts the superset. Currently, this
only works if the superset is also a ProcResGroup as opposed to a
SuperUnit.

This allows SandyBridge to be expressed naturally, which will be
checked in shortly.

def SBPort01 : ProcResGroup<[SBPort0, SBPort1]>;
def SBPort15 : ProcResGroup<[SBPort1, SBPort5]>;
def SBPort23  : ProcResGroup<[SBPort2, SBPort3]>;
def SBPort015 : ProcResGroup<[SBPort0, SBPort1, SBPort5]>;

llvm-svn: 177112
2013-03-14 21:21:50 +00:00
Andrew Trick 4fe440d45c MachineModel: Inconsequential TableGen SubtargetEmitter fix.
Drive by fix. I noticed some missing logic that might bite future
users. This shouldn't affect the final output on currently modeled
targets.

llvm-svn: 174142
2013-02-01 03:19:54 +00:00
Chandler Carruth 91d19d8e93 Sort the #include lines for utils/...
I've tried to find main moudle headers where possible, but the TableGen
stuff may warrant someone else looking at it.

llvm-svn: 169251
2012-12-04 10:37:14 +00:00
Rafael Espindola 7296139d5e Fix a build problem with xlc. The error message was
"../llvm-git/utils/TableGen/CodeGenSchedule.cpp", line 1594.12: 1540-0218 (S) The call does not match any parameter list for "operator+".
"../llvm-git/include/llvm/ADT/STLExtras.h", line 130.1: 1540-1283 (I) "template <class _Iterator, class Func> llvm::operator+(mapped_iterator<_Iterator,Func>::difference_type, const mapped_iterator<_Iterator,Func> &)" is not a viable candidate.

Patch by Kai.

llvm-svn: 167311
2012-11-02 20:57:36 +00:00
Joerg Sonnenberger 635debe85b Remove exception handling usage from tblgen.
Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set. 

llvm-svn: 166712
2012-10-25 20:33:17 +00:00
Joerg Sonnenberger 7090937330 Don't use stack unwinding to provide the location information for
SetTheory, but pass down the location explicitly.

llvm-svn: 166629
2012-10-24 22:03:59 +00:00