Commit Graph

180 Commits

Author SHA1 Message Date
Chandler Carruth 8a8cd2bab9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Juergen Ributzka 310034e166 Convert register liveness tracking to work on a sub-register level instead of just register units.
Reviewed by Andy

llvm-svn: 197315
2013-12-14 06:52:56 +00:00
Andrew Trick 27709d0b3c Revert "Convert liveness tracking to work on a sub-register level instead of just register units."
This reverts commit r197253.

This was a great change, but Juergen should be the commit author.

llvm-svn: 197262
2013-12-13 19:04:08 +00:00
Andrew Trick 8df84fa2f2 Convert liveness tracking to work on a sub-register level instead of just register units.
llvm-svn: 197253
2013-12-13 18:36:56 +00:00
Andrew Trick e2f7cc4cf3 LiveRegUnits: Use *MBB for consistency and convenience.
llvm-svn: 192634
2013-10-14 22:18:59 +00:00
Andrew Trick 276dd453f0 Use a SparseSet in LiveRegUnits.
Some clients may add block live ins and may track liveness over a
large scope. This guarantees an efficient implementation in all cases
with no memory allocation/deallocation, independent of the number of
target registers. It could be slightly less convenient but is fine in
the expected case.

llvm-svn: 192622
2013-10-14 20:45:17 +00:00
Andrew Trick ff3585c51c Convert LiveRegUnits methods to the current convention (it's new code).
llvm-svn: 192619
2013-10-14 20:45:09 +00:00
Benjamin Kramer a9767aed80 fConversion: Attempt #2 at fixing the MSVC build.
llvm-svn: 192492
2013-10-11 19:49:09 +00:00
Benjamin Kramer 24906d9697 IfConversion: Try to unbreak the MSVC build.
llvm-svn: 192487
2013-10-11 19:39:48 +00:00
Matthias Braun d616ccc069 Remove kill flags after if conversion if necessary
When if converting something like:
true:
   ... = R0<kill>

false:
   ... = R0<kill>

then the instructions of the true block must not have a <kill> flag
anymore, as the instruction of the false block follow and do still read
the R0 value.
Specifically this patch determines the set of register live-in in the
false block (possibly after simulating the liveness changes of the
duplicated instructions). Each of these live-in registers mustn't be
killed.

llvm-svn: 192482
2013-10-11 19:04:37 +00:00
Arnold Schwaighofer d2f96b91ca IfConverter: Use TargetSchedule for instruction latencies
For targets that have instruction itineraries this means no change. Targets
that move over to the new schedule model will use be able the new schedule
module for instruction latencies in the if-converter (the logic is such that if
there is no itineary we will use the new sched model for the latencies).

Before, we queried "TTI->getInstructionLatency()" for the instruction latency
and the extra prediction cost. Now, we query the TargetSchedule abstraction for
the instruction latency and TargetInstrInfo for the extra predictation cost. The
TargetSchedule abstraction will internally call "TTI->getInstructionLatency" if
an itinerary exists, otherwise it will use the new schedule model.

ATTENTION: Out of tree targets!

(I will also send out an email later to LLVMDev)

This means, if your target implements

 unsigned getInstrLatency(const InstrItineraryData *ItinData,
                          const MachineInstr *MI,
                          unsigned *PredCost);

and returns a value for "PredCost", you now also need to implement

 unsigned getPredictationCost(const MachineInstr *MI);

(if your target uses the IfConversion.cpp pass)

radar://15077010

llvm-svn: 191671
2013-09-30 15:28:56 +00:00
Joey Gouly a5153cb025 [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.
IT blocks can only be one instruction lonf, and can only contain a subset of
the 16 instructions.

Patch by Artyom Skrobov!

llvm-svn: 190309
2013-09-09 14:21:49 +00:00
Quentin Colombet bdab227e53 Fix a bug in IfConverter with nested predicates.
Prior to this patch, IfConverter may widen the cases where a sequence of
instructions were executed because of the way it uses nested predicates. This
result in incorrect execution.

For instance, Let A be a basic block that flows conditionally into B and B be a
predicated block.
B can be predicated with A.BrToBPredicate into A iff B.Predicate is less
"permissive" than A.BrToBPredicate, i.e., iff A.BrToBPredicate subsumes
B.Predicate.

The IfConverter was checking the opposite: B.Predicate subsumes
A.BrToBPredicate.

<rdar://problem/14379453>

llvm-svn: 187071
2013-07-24 20:20:37 +00:00
Chad Rosier abdb1d69ab Simplify logic now that r182490 is in place. No functional change intended.
llvm-svn: 182531
2013-05-22 23:17:36 +00:00
Evan Cheng 8b8e8d88ff Teach if-converter to avoid removing BBs whose addresses are takne. rdar://13782395
llvm-svn: 181160
2013-05-05 18:03:49 +00:00
Hal Finkel 95081bff72 Manually remove successors in if conversion when CopyAndPredicateBlock is used
In the simple and triangle if-conversion cases, when CopyAndPredicateBlock is
used because the to-be-predicated block has other predecessors, we need to
explicitly remove the old copied block from the successors list. Normally if
conversion relies on TII->AnalyzeBranch combined with BB->CorrectExtraCFGEdges
to cleanup the successors list, but if the predicated block contained an
un-analyzable branch (such as a now-predicated return), then this will fail.

These extra successors were causing a problem on PPC because it was causing
later passes (such as PPCEarlyReturm) to leave dead return-only basic blocks in
the code.

llvm-svn: 179227
2013-04-10 22:05:25 +00:00
Jakob Stoklund Olesen e0ef47436c Avoid creating duplicate CFG edges in the IfConversion pass.
Patch by Stefan Hepp.

llvm-svn: 173395
2013-01-24 23:59:08 +00:00
Benjamin Kramer 56b31bd9d7 Split TargetLowering into a CodeGen and a SelectionDAG part.
This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still
a complete mess but as long as the edges consist of virtual call it doesn't
cause breakage. BasicTTI did static calls and thus broke some build
configurations.

llvm-svn: 172246
2013-01-11 20:05:37 +00:00
Jakob Stoklund Olesen f623e9870d Use MachineInstrBuilder in a few CodeGen passes.
This automatically passes a context pointer to MI->addOperand().

llvm-svn: 170711
2012-12-20 18:08:06 +00:00
Chandler Carruth ed0881b2a6 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Benjamin Kramer f29db275b2 Reduce duplicated hash map lookups.
llvm-svn: 162362
2012-08-22 15:37:57 +00:00
Craig Topper a538d831e6 Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed.
llvm-svn: 162347
2012-08-22 06:07:19 +00:00
Evan Cheng c5adccab1a Start implementing pre-ra if-converter: using speculation and selects to eliminate branches.
llvm-svn: 158234
2012-06-08 21:53:50 +00:00
Jakob Stoklund Olesen 54038d796c Switch all register list clients to the new MC*Iterator interface.
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

llvm-svn: 157854
2012-06-01 23:28:30 +00:00
Evan Cheng 50954fb3e1 If-converter models predicated defs as read + write. The read should be marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs.
llvm-svn: 157662
2012-05-30 00:42:02 +00:00