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172 Commits

Author SHA1 Message Date
Sean Silva a4e2c5fc86 Refactor Record* by-ID comparator to Record.h 
This is a generally useful utility; there's no reason to have it hidden
in CodeGenDAGPatterns.cpp.

Also, rename it to fit the other comparators in Record.h

Review by Jakob.

llvm-svn: 164189
 2012-09-19 01:47:00 +00:00
Owen Anderson 16ba4b2d83 Improve tblgen code cleanliness: create an unknown_class, from which the unknown def inherits. Make tblgen check for that class, rather than checking for the def itself. 
llvm-svn: 163664
 2012-09-11 23:47:08 +00:00
Tom Stellard b7246a763b Tablegen: Add OperandWithDefaultOps Operand type 
This Operand type takes a default argument, and is initialized to
this value if it does not appear in a patter.

llvm-svn: 163315
 2012-09-06 14:15:52 +00:00
Jakob Stoklund Olesen a9d322ae61 Check all patterns for missing instruction flags. 
Both single-instruction and multi-instruction patterns can be checked
for missing mayLoad / mayStore, and hasSideEffects flags.

llvm-svn: 162734
 2012-08-28 03:26:49 +00:00
Richard Smith 228e6d4cf3 Fix integer undefined behavior due to signed left shift overflow in LLVM. 
Reviewed offline by chandlerc.

llvm-svn: 162623
 2012-08-24 23:29:28 +00:00
Jakob Stoklund Olesen c2272df1be Infer instruction properties from single-instruction patterns. 
Previously, instructions without a primary patterns wouldn't get their
properties inferred. Now, we use all single-instruction patterns for
inference, including 'def : Pat<>' instances.

This causes a lot of instruction flags to change.

- Many instructions no longer have the UnmodeledSideEffects flag because
  their flags are now inferred from a pattern.

- Instructions with intrinsics will get a mayStore flag if they already
  have UnmodeledSideEffects and a mayLoad flag if they already have
  mayStore. This is because intrinsics properties are linear.

- Instructions with atomic_load patterns get a mayStore flag because
  atomic loads can't be reordered. The correct workaround is to create
  pseudo-instructions instead of using normal loads. PR13693.

llvm-svn: 162614
 2012-08-24 22:46:53 +00:00
Jakob Stoklund Olesen f5dc1bcfe1 Stop inferring isVariadic from instruction patterns. 
Instructions are now only marked as variadic if they use variable_ops in
their ins list.

A variadic SDNode is typically used for call nodes that have the call
arguments as operands.

A variadic MachineInstr can actually encode a variable number of
operands, for example ARM's stm/ldm instructions. A call instruction
does not have to be variadic. The call argument registers are added as
implicit operands.

This change remove the MCID::Variadic flags from most call and return
instructions, allowing us to better verify their operands.

llvm-svn: 162599
 2012-08-24 21:08:09 +00:00
Jakob Stoklund Olesen 8a276c26bd Verify explicit instruction properties when they can be inferred. 
It is now allowed to explicitly set hasSideEffects, mayStore, and
mayLoad on instructions with patterns.

Verify that the patterns are consistent with the explicit flags.

llvm-svn: 162569
 2012-08-24 17:08:41 +00:00
Jakob Stoklund Olesen 94ed4d42f8 Heed guessInstructionProperties, and stop warning on redundant flags. 
Emit TableGen errors if guessInstructionProperties is 0 and
instruction properties can't be inferred from patterns.

Allow explicit instruction properties even when they can be inferred.

This patch doesn't change the TableGen output. Redundant properties
are not yet verified because the tree has errors.

llvm-svn: 162516
 2012-08-24 00:31:16 +00:00
Jim Grosbach ab27c5e994 TableGen: Pattern<> references to null_frag are a nop. 
A standalone pattern defined in a multiclass expansion should handle
null_frag references just like patterns on instructions. Follow-up to
r160333.

llvm-svn: 160384
 2012-07-17 18:39:36 +00:00
Jim Grosbach 514410ba07 TableGen: Allow conditional instruction pattern in multiclass. 
Define a 'null_frag' SDPatternOperator node, which if referenced in an
instruction Pattern, results in the pattern being collapsed to be as-if
'[]' had been specified instead. This allows supporting a multiclass
definition where some instaniations have ISel patterns associated and
others do not.

For example,
multiclass myMulti<RegisterClass rc, SDPatternOperator OpNode = null_frag> {
  def _x : myI<(outs rc:), (ins rc:), []>;
  def _r : myI<(outs rc:), (ins rc:), [(set rc:, (OpNode rc:))]>;
}

defm foo : myMulti<GRa, not>;
defm bar : myMulti<GRb>;

llvm-svn: 160333
 2012-07-17 00:47:06 +00:00
Benjamin Kramer 11983a4f85 tblgen: remove duplicated newlines. 
llvm-svn: 155038
 2012-04-18 19:22:47 +00:00
Jim Grosbach 1752ffbfe5 Tidy up. No need for a Twine here, as it's just constants. 
llvm-svn: 155026
 2012-04-18 18:39:27 +00:00
Jim Grosbach 7670374c06 Clean up warning text. Remove extraneous prefix. 
llvm-svn: 155015
 2012-04-18 18:09:50 +00:00
Jim Grosbach 3ae48a6236 TableGen use PrintWarning rather than fprintf(stderr,...) for warnings. 
That way we get source line number information from the diagnostics.

llvm-svn: 155014
 2012-04-18 17:46:41 +00:00
Benjamin Kramer b0640db80e Include cstdio in a few place that depended on getting it transitively through StringExtras.h 
llvm-svn: 153328
 2012-03-23 11:35:30 +00:00
Craig Topper c4965bce14 Convert assert(0) to llvm_unreachable 
llvm-svn: 149814
 2012-02-05 07:21:30 +00:00
David Blaikie a5708dc3a3 Provide better messages in llvm_unreachable. 
llvm-svn: 148293
 2012-01-17 07:00:13 +00:00
David Blaikie b48ed1a4cb Remove unreachable code. (replace with llvm_unreachable to help GCC where necessary) 
llvm-svn: 148284
 2012-01-17 04:43:56 +00:00
Jakob Stoklund Olesen dd8fbf572e Delete CodeInit and CodeRecTy from TableGen. 
The code type was always identical to a string anyway. Now it is simply
a synonym. The code literal syntax [{...}] is still valid.

llvm-svn: 148092
 2012-01-13 03:38:34 +00:00
David Blaikie edbb58c577 Remove unnecessary default cases in switches that cover all enum values. 
llvm-svn: 147855
 2012-01-10 16:47:17 +00:00
Jakob Stoklund Olesen d9444d455e Ban rematerializable instructions with side effects. 
TableGen infers unmodeled side effects on instructions without a
pattern.  Fix some instruction definitions where that was overlooked.

Also raise an error if a rematerializable instruction has unmodeled side
effects. That doen't make any sense.

llvm-svn: 141929
 2011-10-14 01:00:49 +00:00
Peter Collingbourne 84c287e33c Move TableGen's parser and entry point into a library 
This is the first step towards splitting LLVM and Clang's tblgen executables.

llvm-svn: 140951
 2011-10-01 16:41:13 +00:00
David Greene af8ee2cdee Unconstify Inits 
Remove const qualifiers from Init references, per Chris' request.

llvm-svn: 136531
 2011-07-29 22:43:06 +00:00
David Greene e32ebf220a [AVX] Create Inits Via Factory Method 
Replace uses of new *Init with *Init::get.  This hides the allocation
implementation so that we can unique Inits in various ways.

llvm-svn: 136486
 2011-07-29 19:07:07 +00:00