Commit Graph

33 Commits

Author SHA1 Message Date
Chandler Carruth 3309ef6f02 Teach the target parsing framework to directly compute the length of all
of its strings when expanding the string literals from the macros, and
push all of the APIs to be StringRef instead of C-string APIs.

This (remarkably) removes a very non-trivial number of strlen calls. It
even deletes code and complexity from one of the primary users -- Clang.

llvm-svn: 246374
2015-08-30 07:51:04 +00:00
Chandler Carruth 799e880e95 Refactor the ARM target parsing to use a def file with macros to expand
the necessary tables.

This will allow me to restructure the code and structures using this to
be significantly more efficient. It also removes the duplication of the
list of several enumerators. It also enshrines that the order of
enumerators match the order of the entries in the tables, something the
implementation code actually uses.

No functionality changed (yet).

llvm-svn: 246370
2015-08-30 05:27:31 +00:00
Chandler Carruth 4fc3a9862c [Triple] Use clang-format to normalize the formatting of the ARM target
parsing logic prior to making substantial changes to it.

This parsing logic is incredibly wasteful, so I'm planning to rewrite
it. Just unittesting the triple parsing logic spends well over 80% of
its time in the ARM parsing logic, and others have measured significant
time spent here in real production compiles.

Stay tuned...

llvm-svn: 246369
2015-08-30 02:17:15 +00:00
Chandler Carruth bb47b9a367 [Triple] Stop abusing a class to have only static methods and just use
the namespace that we are already using for the enums that are produced
by the parsing.

llvm-svn: 246367
2015-08-30 02:09:48 +00:00
Vedant Kumar 366dd9fd2b [ARM] Fix MachO CPU Subtype selection
Differential Revision: http://reviews.llvm.org/D12040

llvm-svn: 245744
2015-08-21 21:52:48 +00:00
Renato Golin 980b6cc42b Revert "[ARM] Fix MachO CPU Subtype selection"
This reverts commit r245081, as it breaks many builds.

llvm-svn: 245086
2015-08-14 19:35:47 +00:00
Vedant Kumar 2f079be789 [ARM] Fix MachO CPU Subtype selection
This patch makes the Darwin ARM backend take advantage of TargetParser.  It
also teaches TargetParser about ARMV7K for the first time. This makes target
triple parsing more consistent across llvm.

Differential Revision: http://reviews.llvm.org/D11996

llvm-svn: 245081
2015-08-14 18:36:47 +00:00
Alexandros Lamprineas 4ea707555a - Added support for parsing HWDiv features using Target Parser.
- Architecture extensions are represented as a bitmap.

Phabricator: http://reviews.llvm.org/D11457
llvm-svn: 243335
2015-07-27 22:26:59 +00:00
Alexandros Lamprineas 69718d242a Edited the CPUNames table of TargetParser
- Changed the default FPU of cortex-m4.
- Removed "cortex-m4f" entry. Currently not supported.

Change-Id: I73121e358aa9e7ba68eb001c2143df390ff2352a
Phabricator: http://reviews.llvm.org/D11100
llvm-svn: 242528
2015-07-17 15:49:32 +00:00
Alexandros Lamprineas 0e20b8dc93 - TargetParser does not handle armv7l in parseArchProfile().
- ARM V7L matches the 'A' profile of ARM architecture.

Change-Id: I80c8b973f5c93fb040c177a227644d56b1b83ea8
Phabricator: http://reviews.llvm.org/D11261
llvm-svn: 242406
2015-07-16 14:54:41 +00:00
Alexandros Lamprineas fcd93d539e -Added API for retrieving the default FPU of a CPU from TargetParser.
-Implemented as a table lookup.

Change-Id: Iaad0eaf4b29b06827e6700269496dc1ba20e9018
Phabricator: http://reviews.llvm.org/D11100
llvm-svn: 242284
2015-07-15 10:46:21 +00:00
Alexandros Lamprineas a04e6b1853 Caused regressions: compile Release+Asserts failed on clang-native-arm-cortex-a9
Revert "-Added API for retrieving the default FPU of a CPU from TargetParser."

This reverts commit 01199ab0c6ff2d5c4f6b2c05a95ec011e41c4669.

llvm-svn: 242147
2015-07-14 14:34:06 +00:00
Alexandros Lamprineas ab9907a217 -Added API for retrieving the default FPU of a CPU from TargetParser.
-Implemented as a table lookup.

Change-Id: Ibf7217f6bd2769e9c06835a5aede3d072dee6757
Phabricator: http://reviews.llvm.org/D11100
llvm-svn: 242141
2015-07-14 13:20:48 +00:00
Javed Absar 3f7c8934e4 [ARM]: Extend -mfpu options for half-precision and vfpv3xd
removing default label in switch as it results.
This is part of earlier commit http://reviews.llvm.org/D1064

Subscribers: llvm-commits
llvm-svn: 240932
2015-06-29 09:53:33 +00:00
Javed Absar d5526303b7 [ARM]: Extend -mfpu options for half-precision and vfpv3xd
Some of the the permissible ARM -mfpu options, which are supported in GCC,
are currently not present in llvm/clang.This patch adds the options:
'neon-fp16', 'vfpv3-fp16', 'vfpv3-d16-fp16', 'vfpv3xd' and 'vfpv3xd-fp16.
These are related to half-precision floating-point and single precision.

Reviewers: rengolin, ranjeet.singh

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10645

llvm-svn: 240930
2015-06-29 09:32:29 +00:00
John Brawn d9e39d53b6 [ARM] Disabling vfp4 should disable fp16
ARMTargetParser::getFPUFeatures should disable fp16 whenever it
disables vfp4, as otherwise something like -mcpu=cortex-a7 -mfpu=none
leaves us with fp16 enabled (though the only effect that will have is
a wrong build attribute).

Differential Revision: http://reviews.llvm.org/D10397

llvm-svn: 239599
2015-06-12 09:38:51 +00:00
NAKAMURA Takumi 1781a687e7 TargetParser: Fix comments in enum(s) introduced in r239150. [-Wdocumentation]
llvm-svn: 239211
2015-06-06 01:41:35 +00:00
Benjamin Kramer f2d06a574a [TargetParser] Properly attach functions of ARMTargetParser to the class
llvm-svn: 239158
2015-06-05 14:33:02 +00:00
John Brawn 985c04e8fa [ARM] Add support for -sp- FPUs and FPU none to TargetParser
These are added mainly for the benefit of clang, but this also means that they
are now allowed in .fpu directives and we emit the correct .fpu directive when
single-precision-only is used.

Differential Revision: http://reviews.llvm.org/D10238

llvm-svn: 239151
2015-06-05 13:31:19 +00:00
John Brawn d03d22922d [ARM] Add knowledge of FPU subtarget features to TargetParser
Add getFPUFeatures to TargetParser, which gets the list of subtarget features
that are enabled/disabled for each FPU, and use it when handling the .fpu
directive.

No functional change in this commit, though clang will start behaving
differently once it starts using this.

Differential Revision: http://reviews.llvm.org/D10237

llvm-svn: 239150
2015-06-05 13:29:24 +00:00
Artyom Skrobov acd1cd66c1 [ARMTargetParser] Follow-up for r239099: one case was missed
llvm-svn: 239147
2015-06-05 12:39:28 +00:00
Artyom Skrobov 85aebc8c01 Simplify ARMTargetParser::getArchSynonym
Summary:
1) The only caller, ARMTargetParser::parseArch, uses the results for an "endswith" test; so, including the "arm" prefix into the result is unnecessary.
2) Most ARMTargetParser::parseArch callers pass it the output from ARMTargetParser::getCanonicalArchName; so, make this behaviour the default. Then, including the "arm" prefix into the cases is unnecessary.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10249

llvm-svn: 239099
2015-06-04 21:26:58 +00:00
Renato Golin 230d298320 [ARMTargetParser] Move IAS arch ext parser. NFC
The plan was to move the whole table into the already existing ArchExtNames
but some fields depend on a table-generated file, and we don't yet have this
feature in the generic lib/Support side.

Once the minimum target-specific table-generated files are available in a
generic fashion to these libraries, we'll have to keep it in the ASM parser.

llvm-svn: 238651
2015-05-30 10:30:02 +00:00
Renato Golin 42dad6477d [ARMTargetParser] Adding sub-arch information for Clang. NFC
llvm-svn: 238429
2015-05-28 15:05:18 +00:00
Renato Golin 7374fcdb38 [ARMTargetParser] Adding a few more CPUs for Clang CPU detection. NFC.
llvm-svn: 238415
2015-05-28 12:10:37 +00:00