Commit Graph

61 Commits

Author SHA1 Message Date
Jim Grosbach 005155e236 previous patch was a little too tricky for its own good. Don't try to
overload UserInInstr. Explicitly check Allocatable. The early exit in the
condition will mean the performance impact of the extra test should be
minimal.

llvm-svn: 113016
2010-09-03 21:45:15 +00:00
Jim Grosbach df6b67bf85 The register allocator shouldn't consider allocating reserved registers.
llvm-svn: 112728
2010-09-01 19:28:41 +00:00
Jim Grosbach cb2e56fa82 tidy up a few 80-column and trailing whitespace bits.
llvm-svn: 112726
2010-09-01 19:16:29 +00:00
Jakob Stoklund Olesen 2c325dc907 Ignore unallocatable registers in RegAllocFast.
llvm-svn: 112632
2010-08-31 19:54:25 +00:00
Eli Friedman ac305d2024 Delete dead comment.
llvm-svn: 111744
2010-08-21 20:19:51 +00:00
Owen Anderson a7aed18624 Reapply r110396, with fixes to appease the Linux buildbot gods.
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Devang Patel 8a18aee421 While emitting DBG_VALUE for registers spilled at the end of a block do not use location of MBB->end(). If a block does not have terminator then incoming iterator points to end().
llvm-svn: 110411
2010-08-06 00:26:18 +00:00
Owen Anderson bda59bd247 Revert r110396 to fix buildbots.
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Owen Anderson 755aceb5d0 Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Devang Patel d71bc1ae4e While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack.
llvm-svn: 110235
2010-08-04 18:42:02 +00:00
Jakob Stoklund Olesen 36cf119049 Fix a bug in the -regalloc=fast handling of exotic two-address instruction with
multiple defs, like t2LDRSB_POST.

The first def could accidentally steal the physreg that the second, tied def was
required to be allocated to.

Now, the tied use-def is treated more like an early clobber, and the physreg is
reserved before allocating the other defs.

This would never be a problem when the tied def was the only def which is the
usual case.

This fixes MallocBench/gs for thumb2 -O0.

llvm-svn: 109715
2010-07-29 00:52:19 +00:00
Devang Patel d61b735d25 Fix memory leak reported by valgrind.
Do not visit operands of old instruction. Visit all operands of new instruction.

llvm-svn: 108767
2010-07-19 23:25:39 +00:00
Jakob Stoklund Olesen 37c42a3d02 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.

llvm-svn: 108507
2010-07-16 04:45:42 +00:00
Devang Patel 57e72370ae Update DBG_VALUE to refer appropriate stack slot in case of a spill.
llvm-svn: 108023
2010-07-09 21:48:31 +00:00
Jakob Stoklund Olesen 4c82a9e7d0 Detect and handle COPY in many places.
This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.

llvm-svn: 107547
2010-07-03 00:04:37 +00:00
Jakob Stoklund Olesen dadea5b178 Fix the handling of partial redefines in the fast register allocator.
A partial redefine needs to be treated like a tied operand, and the register
must be reloaded while processing use operands.

This fixes a bug where partially redefined registers were processed as normal
defs with a reload added. The reload could clobber another use operand if it was
a kill that allowed register reuse.

llvm-svn: 107193
2010-06-29 19:15:30 +00:00
Jakob Stoklund Olesen 0d94d7af78 Add more special treatment for inline asm in RegAllocFast.
When an instruction has tied operands and physreg defines, we must take extra
care that the tied operands conflict with neither physreg defs nor uses.

The special treatment is given to inline asm and instructions with tied operands
/ early clobbers and physreg defines.

This fixes PR7509.

llvm-svn: 107043
2010-06-28 18:34:34 +00:00
Jakob Stoklund Olesen 246e9a07a2 Avoid processing early clobbers twice in RegAllocFast.
Early clobbers defining a virtual register were first alocated to a physreg and
then processed as a physreg EC, spilling the virtreg.

This fixes PR7382.

llvm-svn: 105998
2010-06-15 16:20:57 +00:00
Jakob Stoklund Olesen 864827afb0 Keep track of the call instructions whose clobber lists were skipped during fast
register allocation.

Process all of the clobber lists at the end of the function, marking the
registers as used in MachineRegisterInfo.

This is necessary in case the calls clobber callee-saved registers (sic).

llvm-svn: 105473
2010-06-04 18:08:29 +00:00
Jakob Stoklund Olesen e0eddb21f5 Add support for partial redefs to the fast register allocator.
A partial redef now triggers a reload if required. Also don't add
<imp-def,dead> operands for physical superregisters.

Kill flags are still treated as full register kills, and <imp-use,kill> operands
are added for physical superregisters as before.

llvm-svn: 104167
2010-05-19 21:36:05 +00:00
Jakob Stoklund Olesen 663543b4d7 Properly handle multiple definitions of a virtual register in the same
instruction.

This can happen on ARM:

>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>

llvm-svn: 104056
2010-05-18 21:10:50 +00:00
Jakob Stoklund Olesen 585792738b Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.

llvm-svn: 103975
2010-05-17 21:02:08 +00:00
Jakob Stoklund Olesen 70563bbba5 Remove debug option. Add comment on spill order determinism.
llvm-svn: 103961
2010-05-17 20:01:22 +00:00
Jakob Stoklund Olesen 176a9c4272 Avoid allocating the same physreg to multiple virtregs in one instruction.
While that approach works wonders for register pressure, it tends to break
everything.

This should unbreak the arm-linux builder and fix a number of miscompilations.

llvm-svn: 103946
2010-05-17 17:18:59 +00:00
Jakob Stoklund Olesen f5e8c86424 Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.
llvm-svn: 103940
2010-05-17 15:30:37 +00:00