Commit Graph

129 Commits

Author SHA1 Message Date
Chris Lattner 249e1acf1b fix accidentally inverted conditional and add comment.
llvm-svn: 79312
2009-08-18 04:33:15 +00:00
Chris Lattner 523d2f6e2c turn this conditional into something humans might actually
be able to understand ;-)

llvm-svn: 79311
2009-08-18 04:30:35 +00:00
David Greene ec9bc28812 Re-apply LiveInterval index dumping patch, with fixes suggested by Bill
and others.

llvm-svn: 78003
2009-08-03 21:55:09 +00:00
Daniel Dunbar 796e43eede Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream.

llvm-svn: 76965
2009-07-24 10:36:58 +00:00
Chris Lattner 1eede6c635 revert r76602, 76603, and r76615, pending design discussions.
llvm-svn: 76646
2009-07-21 21:12:58 +00:00
David Greene 3b458645be Add PrefixPrinter arguments to the dump routines for MachineFunction and
MachineBasicBlock.  We'll use these shortly.

llvm-svn: 76603
2009-07-21 18:27:05 +00:00
Dan Gohman bb2f10759e If a MachineBasicBlock has multiple ways of reaching another block,
allow it to have multiple CFG edges to that block. This is needed
to allow MachineBasicBlock::isOnlyReachableByFallthrough to work
correctly. This fixes PR4126.

llvm-svn: 71018
2009-05-05 21:10:19 +00:00
Dan Gohman 6b42dfddf4 Reapply 68073, with fixes. EH Landing-pad basic blocks are not
entered via fall-through. Don't miss fallthroughs from blocks
terminated by conditional branches. Also, move
isOnlyReachableByFallthrough out of line.

llvm-svn: 68129
2009-03-31 18:39:13 +00:00
Dan Gohman ff62c62b7c Constify arguments in isSuccessor and isLayoutSuccessor.
llvm-svn: 68054
2009-03-30 20:06:29 +00:00
Dan Gohman f87dc9264a Delete unnecessary parens around return values.
llvm-svn: 61950
2009-01-08 22:19:34 +00:00
Dan Gohman 0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Dan Gohman a78bae34a5 Add a new MachineBasicBlock utility function, isLayoutSuccessor, that
can be used when deciding if a block can transfer control to another
via a fall-through instead of a branch.

llvm-svn: 56968
2008-10-02 22:09:09 +00:00
Dan Gohman 38453eebdc Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
2008-09-13 17:58:21 +00:00
Dan Gohman 804c95df52 Fold the useful features of alist and alist_node into ilist, and
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.

llvm-svn: 54146
2008-07-28 21:51:04 +00:00
Dan Gohman 0ece943845 Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.
Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746
2008-07-17 23:49:46 +00:00
Dan Gohman 3b46030375 Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
2008-07-07 23:14:23 +00:00
Mon P Wang 3e58393c3d Added addition atomic instrinsics and, or, xor, min, and max.
llvm-svn: 50663
2008-05-05 19:05:59 +00:00
Evan Cheng 3980a7911a - Check if a register is livein before removing it. It may have already been removed.
- Do not iterate over SmallPtrSet, the order of iteration is not deterministic.

llvm-svn: 50209
2008-04-24 09:06:33 +00:00
Evan Cheng c799065cc3 Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Bill Wendling d7a258d325 Rename PrintableName to Name.
llvm-svn: 47629
2008-02-26 21:47:57 +00:00
Bill Wendling c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625
2008-02-26 21:11:01 +00:00
Dan Gohman 3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Chris Lattner f3efadcb5b remove #includage
llvm-svn: 45697
2008-01-07 07:42:25 +00:00
Chris Lattner 03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00