6fe33fdd63
Simplify some code in MachineVerifier that was doing the correct thing, but not
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in the most obvious way.
llvm-svn: 122610
2010-12-28 23:45:38 +00:00
b95bfe1667
Add knowledge of phi-def and phi-kill valnos to MachineVerifier's predecessor
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valno verification. The "Different value live out of predecessor" check is
incorrect in the case of phi-def valnos, so just skip that check for phi-def
valnos and instead check that all of the valnos for predecessors have phi-kill.
Fixes PR8863.
llvm-svn: 122581
2010-12-27 05:17:23 +00:00
4ffda706d0
MachineVerifier should count landing pad successors as basic blocks rather than
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out-edges. Fixes PR8824.
llvm-svn: 122228
2010-12-20 04:19:48 +00:00
660bce67f3
Teach MachineVerifier that early clobber defs begin at USE slots and other defs
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begin at DEF slots. Fixes the second half of PR8813.
llvm-svn: 122225
2010-12-20 03:15:20 +00:00
bc2461c5f9
Add a missing check from r122218.
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llvm-svn: 122224
2010-12-20 02:59:51 +00:00
fc0c6b1ea9
Don't assume that an instruction ending a register's live range always reads
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the register; it may be a dead def instead. Fixes PR8820.
llvm-svn: 122218
2010-12-20 01:22:37 +00:00
1b67d6c565
Ignore debug values when performing MachineVerifier liveness checks. Fixes
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PR8822.
llvm-svn: 122207
2010-12-20 00:08:10 +00:00
0b111b1aee
Early clobber operands are allowed to be defined at use indices. This fixes one
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half of PR8813.
llvm-svn: 122205
2010-12-19 23:50:53 +00:00
7e24173a3c
Fix PR8811 by teaching MachineVerifier about optional defs.
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llvm-svn: 122199
2010-12-19 21:37:23 +00:00
bf4550e3fb
Pass a Banner argument to the machine code verifier both from
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createMachineVerifierPass and MachineFunction::verify.
The banner is printed before the machine code dump, just like the printer pass.
llvm-svn: 122113
2010-12-18 00:06:56 +00:00
a043b62870
Allow missing kill flags on an untied operand of a two-address instruction when
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the operand uses the same register as a tied operand:
%r1 = add %r1, %r1
If add were a three-address instruction, kill flags would be required on at
least one of the uses. Since it is a two-address instruction, the tied use
operand must not have a kill flag.
This change makes the kill flag on the untied use operand optional.
llvm-svn: 122082
2010-12-17 19:18:41 +00:00
bcc230a765
Only avoid the check if we're the last operand before the variable
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operands in a variadic instruction.
llvm-svn: 119446
2010-11-17 00:55:36 +00:00
08c083148b
Make the verifier a little quieter on instructions that it's probably
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(and likely) wrong about anyhow.
llvm-svn: 119320
2010-11-16 01:58:21 +00:00
2551f13c83
Be more precise about verifying missing kill flags.
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It is legal for an instruction to have two operands using the same register,
only one a kill. This is interpreted as a kill.
llvm-svn: 117981
2010-11-01 23:59:53 +00:00
d7a824006e
Add kill flag verification.
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At least X86FloatingPoint requires correct kill flags after register allocation,
and targets using register scavenging benefit. Conservative kill flags are not
enough.
llvm-svn: 117960
2010-11-01 21:51:31 +00:00
31fffb62d9
Add basic LiveStacks verification.
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When an instruction refers to a spill slot with a LiveStacks entry, check that
the spill slot is live at the instruction.
llvm-svn: 117944
2010-11-01 19:49:52 +00:00
db84d8f4fd
Disable more of physical register live intervals verification.
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llvm-svn: 117762
2010-10-30 01:26:11 +00:00
b98755472e
Print out the connected components in the verifier after complaining about their
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multiplicity.
llvm-svn: 117630
2010-10-29 00:40:57 +00:00
dc5e7065a4
One day, physical register live ranges will be sensible.
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llvm-svn: 117602
2010-10-28 20:44:22 +00:00
0e7a011a00
Physical registers trivially have multiple connected components all the time.
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Only virtuals should be requires to be connected.
llvm-svn: 117422
2010-10-27 00:39:01 +00:00
260fa289df
Verify that live intervals are connected. If there are multiple connected
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components, each should get its own virtual register.
llvm-svn: 117407
2010-10-26 22:36:07 +00:00
b7050233fb
Teach MachineBasicBlock::print() to annotate instructions and blocks with
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SlotIndexes when available.
llvm-svn: 117392
2010-10-26 20:21:46 +00:00
db594373bd
Remmeber to print full live interval on verification error.
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llvm-svn: 117391
2010-10-26 20:21:43 +00:00
9eabfa3a39
Don't verify physical registers going into landing pads.
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Magic is happening that we don't understand.
llvm-svn: 117370
2010-10-26 16:49:23 +00:00
8a09620dc2
Verify LiveIntervals against the CFG, ensuring that live-in values are live-out
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of all predecessors.
llvm-svn: 117191
2010-10-23 00:49:09 +00:00
Cameron Zwarich
Jakob Stoklund Olesen
Eric Christopher